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Searched refs:intel_rb_format (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_context.c133 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; in intel_bits_per_pixel()
796 intel_rb_format(rb), in intel_process_dri2_buffer()
839 intel_rb_format(rb), in intel_update_image_buffer()
861 format = intel_rb_format(back_rb); in intel_update_image_buffers()
863 format = intel_rb_format(front_rb); in intel_update_image_buffers()
Dintel_fbo.h119 intel_rb_format(const struct intel_renderbuffer *rb) in intel_rb_format() function
Di915_vtbl.c607 value |= i915_render_target_format_for_mesa_format[intel_rb_format(irb)]; in i915_set_draw_region()
774 assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT); in i915_update_draw_buffer()
787 && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT) { in i915_update_draw_buffer()
Di830_vtbl.c647 value |= i830_render_target_format_for_mesa_format[intel_rb_format(irb)]; in i830_set_draw_region()
808 assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT); in i830_update_draw_buffer()
821 && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT) { in i830_update_draw_buffer()
Dintel_blit.c453 switch (intel_rb_format(irb)) { in intelClearWithBlit()
Dintel_fbo.c623 _mesa_get_format_name(intel_rb_format(irb))); in intel_validate_framebuffer()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_fbo.h182 intel_rb_format(const struct intel_renderbuffer *rb) in intel_rb_format() function
Dbrw_context.c1310 return _mesa_get_format_bytes(intel_rb_format(rb)) * 8; in intel_bits_per_pixel()
1593 intel_rb_format(rb), in intel_process_dri2_buffer()
1676 intel_rb_format(rb), true); in intel_update_image_buffer()
1710 format = intel_rb_format(back_rb); in intel_update_image_buffers()
1712 format = intel_rb_format(front_rb); in intel_update_image_buffers()
Dbrw_misc_state.c114 (intel_rb_format(srb) == MESA_FORMAT_Z24_UNORM_S8_UINT || in brw_depthbuffer_format()
115 intel_rb_format(srb) == MESA_FORMAT_Z32_FLOAT_S8X24_UINT)) { in brw_depthbuffer_format()
Dintel_pixel_bitmap.c228 switch (_mesa_get_render_format(ctx, intel_rb_format(irb))) { in do_blit_bitmap()
Dbrw_wm_surface_state.c227 mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); in gen6_update_renderbuffer_surface()
860 mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); in gen4_update_renderbuffer_surface()
1018 _mesa_get_render_format(ctx, intel_rb_format(irb))]; in update_renderbuffer_read_surfaces()
Dbrw_draw.c549 _mesa_get_render_format(ctx, intel_rb_format(irb)); in brw_predraw_resolve_framebuffer()
630 _mesa_get_render_format(ctx, intel_rb_format(irb)); in brw_postdraw_set_buffers_need_resolve()
Dintel_fbo.c760 _mesa_get_format_name(intel_rb_format(irb))); in intel_validate_framebuffer()