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Searched refs:isDS (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DSIInsertWaits.cpp248 if (TII->isDS(MI) || TII->isFLAT(MI)) { in isOpRelevant()
254 if (TII->isDS(MI)) { in isOpRelevant()
DSIInstrInfo.h303 static bool isDS(const MachineInstr &MI) { in isDS() function
307 bool isDS(uint16_t Opcode) const { in isDS() function
DSIInstrInfo.cpp106 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
210 if (isDS(LdSt)) { in getMemOpBaseRegImmOfs()
305 if (isDS(FirstLdSt) && isDS(SecondLdSt)) { in shouldClusterMemOps()
1384 if (isDS(MIa)) { in areMemAccessesTriviallyDisjoint()
1385 if (isDS(MIb)) in areMemAccessesTriviallyDisjoint()
DSIWholeQuadMode.cpp162 if (TII->isWQM(Opcode) || TII->isDS(Opcode)) { in scanInstructions()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUSubtarget.cpp655 (TII->isDS(MI1) && TII->isDS(MI2))) { in apply()
DSIInstrInfo.h430 static bool isDS(const MachineInstr &MI) { in isDS() function
434 bool isDS(uint16_t Opcode) const { in isDS() function
DSIInsertWaitcnts.cpp552 if (TII->isDS(Inst) && (Inst.mayStore() || Inst.mayLoad())) { in updateByEvent()
668 if (TII->isDS(Inst) && Inst.mayStore()) { in updateByEvent()
1321 if (TII->isDS(Inst) && TII->usesLGKM_CNT(Inst)) { in updateEventWaitcntAfter()
DSIInstrInfo.cpp163 if (isDS(Opc0) && isDS(Opc1)) { in areLoadsFromSameBasePtr()
272 if (isDS(LdSt)) { in getMemOpBaseRegImmOfs()
431 } else if (isDS(FirstLdSt) && isDS(SecondLdSt)) { in shouldClusterMemOps()
2172 if (isDS(MIa)) { in areMemAccessesTriviallyDisjoint()
2173 if (isDS(MIb)) in areMemAccessesTriviallyDisjoint()