Searched refs:isMoveReg (Results 1 – 25 of 26) sorted by relevance
12
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 253 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg() function
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 229 bool isMoveReg : 1; variable
|
| D | InstrInfoEmitter.cpp | 576 if (Inst.isMoveReg) OS << "|(1ULL<<MCID::MoveReg)"; in emitRecord()
|
| D | CodeGenInstruction.cpp | 309 isMoveReg = R->getValueAsBit("isMoveReg"); in CodeGenInstruction()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 153 let isMoveReg = 1;
160 let isMoveReg = 1;
519 let isMoveReg = 1 in {
528 } // isMoveReg
|
| D | Mips16InstrInfo.cpp | 103 if (MI.isMoveReg()) { in isCopyInstr()
|
| D | MipsDSPInstrInfo.td | 450 bit isMoveReg = 1;
461 bit isMoveReg = 1;
505 bit isMoveReg = 1;
514 bit isMoveReg = 1;
|
| D | MicroMipsInstrInfo.td | 254 let isMoveReg = 1;
419 let isMoveReg = 1;
426 let isMoveReg = 1;
|
| D | MicroMipsInstrFPU.td | 134 let isMoveReg = 1;
|
| D | Mips16InstrInfo.td | 873 let isMoveReg = 1;
884 let isMoveReg = 1;
895 let isMoveReg = 0;
|
| D | MipsSEInstrInfo.cpp | 242 } else if (MI.isMoveReg() || isORCopyInst(MI)) { in isCopyInstr()
|
| D | MicroMipsDSPInstrInfo.td | 389 bit isMoveReg = 1;
|
| D | Mips64InstrInfo.td | 407 let isMoveReg = 1 in {
|
| D | MipsMSAInstrInfo.td | 1793 bit isMoveReg = 1;
1888 bit isMoveReg = 1;
2434 bit isMoveReg = 1;
|
| D | MipsInstrInfo.td | 1769 let isMoveReg = 1;
1782 let isMoveReg = 1;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrMMX.td | 212 let SchedRW = [WriteVecMove], hasSideEffects = 0, isMoveReg = 1 in {
219 } // SchedRW, hasSideEffects, isMoveReg
|
| D | X86InstrInfo.td | 1483 let hasSideEffects = 0, isMoveReg = 1 in {
1652 SchedRW = [WriteMove], isMoveReg = 1 in {
1719 let hasSideEffects = 0, isMoveReg = 1 in
|
| D | X86InstrSSE.td | 373 let hasSideEffects = 0, isMoveReg = 1 in
471 isMoveReg = 1 in {
565 isMoveReg = 1, SchedRW = [SchedWriteFMoveLS.XMM.RR] in {
|
| D | X86InstrInfo.cpp | 3118 if (MI.isMoveReg()) { in isCopyInstr()
|
| D | X86InstrAVX512.td | 2816 let isMoveReg = 1, hasSideEffects = 0, SchedRW = [WriteMove] in
3337 let isMoveReg = 1 in
3442 let isMoveReg = 1 in
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 558 bool isMoveReg(QueryType Type = IgnoreBundle) const {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 1002 let isMoveReg = 1 in {
1010 } // isMoveReg
1029 let isMoveReg = 1 in {
1075 } // isMoveReg
|
| D | ARMInstrThumb.td | 1174 let hasSideEffects = 0, isMoveReg = 1 in {
|
| D | ARMBaseInstrInfo.cpp | 948 if (!MI.isMoveReg() || in isCopyInstr()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | Target.td | 445 bit isMoveReg = 0; // Is this instruction a move register instruction?
|
12