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Searched refs:isl_dev (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/intel/blorp/
Dblorp_blit.c1079 const struct gen_device_info *devinfo = blorp->isl_dev->info; in brw_blorp_build_nir_shader()
1393 blorp_surf_convert_to_single_slice(const struct isl_device *isl_dev, in blorp_surf_convert_to_single_slice() argument
1416 isl_surf_get_image_surf(isl_dev, &info->surf, in blorp_surf_convert_to_single_slice()
1444 surf_fake_interleaved_msaa(const struct isl_device *isl_dev, in surf_fake_interleaved_msaa() argument
1450 blorp_surf_convert_to_single_slice(isl_dev, info); in surf_fake_interleaved_msaa()
1458 surf_retile_w_to_y(const struct isl_device *isl_dev, in surf_retile_w_to_y() argument
1464 blorp_surf_convert_to_single_slice(isl_dev, info); in surf_retile_w_to_y()
1471 if (isl_dev->info->gen > 6 && in surf_retile_w_to_y()
1473 surf_fake_interleaved_msaa(isl_dev, info); in surf_retile_w_to_y()
1476 if (isl_dev->info->gen == 6) { in surf_retile_w_to_y()
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Dblorp_genX_exec.h589 batch->blorp->isl_dev->info->max_vs_threads - 1; in blorp_emit_vs_config()
824 batch->blorp->isl_dev->info->max_wm_threads - 1; in blorp_emit_ps_config()
872 batch->blorp->isl_dev->info->max_wm_threads - 1; in blorp_emit_ps_config()
1253 const struct isl_device *isl_dev = batch->blorp->isl_dev; in blorp_emit_surface_state() local
1279 isl_surf_fill_state(batch->blorp->isl_dev, state, in blorp_emit_surface_state()
1286 blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset, in blorp_emit_surface_state()
1295 uint32_t *aux_addr = state + isl_dev->ss.aux_addr_offset; in blorp_emit_surface_state()
1296 blorp_surface_reloc(batch, state_offset + isl_dev->ss.aux_addr_offset, in blorp_emit_surface_state()
1307 dst_addr.offset += state_offset + isl_dev->ss.clear_value_offset; in blorp_emit_surface_state()
1309 isl_dev->ss.clear_value_size); in blorp_emit_surface_state()
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Dblorp_clear.c327 get_fast_clear_rect(batch->blorp->isl_dev, surf->aux_surf, in blorp_fast_clear()
410 if (batch->blorp->isl_dev->info->gen < 6) in blorp_clear()
444 if (batch->blorp->isl_dev->info->gen == 4 && in blorp_clear()
446 blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, &params.dst); in blorp_clear()
450 blorp_surf_convert_to_uncompressed(batch->blorp->isl_dev, &params.dst, in blorp_clear()
499 if (ISL_DEV_GEN(batch->blorp->isl_dev) == 6) { in blorp_clear_depth_stencil()
745 if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 9) { in blorp_ccs_resolve()
748 } else if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 8) { in blorp_ccs_resolve()
761 if (batch->blorp->isl_dev->info->gen >= 9) { in blorp_ccs_resolve()
861 assert(batch->blorp->isl_dev->info->gen >= 7); in blorp_mcs_partial_resolve()
Dblorp.c34 struct isl_device *isl_dev) in blorp_init() argument
37 blorp->isl_dev = isl_dev; in blorp_init()
138 if (is_render_target && blorp->isl_dev->info->gen <= 6) in brw_blorp_surface_info_init()
Dblorp_priv.h76 blorp_surf_convert_to_single_slice(const struct isl_device *isl_dev,
79 blorp_surf_convert_to_uncompressed(const struct isl_device *isl_dev,
Dblorp.h44 const struct isl_device *isl_dev; member
61 struct isl_device *isl_dev);
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_wm_surface_state.c183 brw->isl_dev.ss.size, in brw_emit_surface_state()
184 brw->isl_dev.ss.align, in brw_emit_surface_state()
187 isl_surf_fill_state(&brw->isl_dev, state, .surf = &surf, .view = &view, in brw_emit_surface_state()
189 *surf_offset + brw->isl_dev.ss.addr_offset, in brw_emit_surface_state()
206 uint32_t *aux_addr = state + brw->isl_dev.ss.aux_addr_offset; in brw_emit_surface_state()
209 brw->isl_dev.ss.aux_addr_offset, in brw_emit_surface_state()
589 brw->isl_dev.ss.size, in brw_emit_buffer_surface_state()
590 brw->isl_dev.ss.align, in brw_emit_buffer_surface_state()
593 isl_buffer_fill_state(&brw->isl_dev, dw, in brw_emit_buffer_surface_state()
596 *out_offset + brw->isl_dev.ss.addr_offset, in brw_emit_buffer_surface_state()
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Dintel_screen.h65 struct isl_device isl_dev; member
Dintel_screen.c702 ok = isl_surf_init(&screen->isl_dev, &surf, in intel_create_image_common()
723 ok = isl_surf_get_ccs_surf(&screen->isl_dev, &surf, &aux_surf, 0); in intel_create_image_common()
1088 ok = isl_surf_init(&screen->isl_dev, &surf, in intel_create_image_from_fds_common()
1138 ok = isl_surf_get_ccs_surf(&screen->isl_dev, &surf, &aux_surf, in intel_create_image_from_fds_common()
2489 isl_device_init(&screen->isl_dev, &screen->devinfo, in intelInitScreen2()
Dintel_mipmap_tree.c595 if (!isl_surf_init_s(&brw->isl_dev, &mt->surf, &init_info)) in make_surface()
609 if (!isl_surf_init_s(&brw->isl_dev, &mt->surf, &init_info)) in make_surface()
613 if (!isl_surf_init_s(&brw->isl_dev, &mt->surf, &init_info)) in make_surface()
954 if (!isl_surf_get_ccs_surf(&brw->isl_dev, &mt->surf, &temp_ccs_surf, in create_ccs_buf_for_image()
1717 isl_surf_get_mcs_surf(&brw->isl_dev, &mt->surf, &temp_mcs_surf); in intel_miptree_alloc_mcs()
1750 if (!isl_surf_get_ccs_surf(&brw->isl_dev, &mt->surf, &temp_ccs_surf, 0)) in intel_miptree_alloc_ccs()
1838 isl_surf_get_hiz_surf(&brw->isl_dev, &mt->surf, &temp_hiz_surf); in intel_miptree_alloc_hiz()
Dbrw_context.c899 brw->isl_dev = screen->isl_dev; in brwCreateContext()
Dbrw_context.h860 struct isl_device isl_dev; member
Dbrw_blorp.c75 blorp_init(&brw->blorp, brw, &brw->isl_dev); in brw_blorp_init()
/external/mesa3d/src/intel/vulkan/
Danv_image.c324 ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl, in make_surface()
353 ok = isl_surf_init(&dev->isl_dev, &image->planes[plane].shadow_surface.isl, in make_surface()
399 ok = isl_surf_get_hiz_surf(&dev->isl_dev, in make_surface()
425 ok = isl_surf_get_ccs_surf(&dev->isl_dev, in make_surface()
466 ok = isl_surf_get_mcs_surf(&dev->isl_dev, in make_surface()
949 isl_buffer_fill_state(&device->isl_dev, state_inout->state.map, in anv_image_fill_surface_state()
982 isl_surf_get_image_surf(&device->isl_dev, isl_surf, in anv_image_fill_surface_state()
1022 isl_surf_fill_state(&device->isl_dev, state_inout->state.map, in anv_image_fill_surface_state()
1042 device->isl_dev.ss.aux_addr_offset; in anv_image_fill_surface_state()
1053 isl_surf_fill_image_param(&device->isl_dev, image_param_out, in anv_image_fill_surface_state()
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DgenX_cmd_buffer.c172 const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; in add_surface_state_reloc() local
176 state.offset + isl_dev->ss.addr_offset, bo, offset); in add_surface_state_reloc()
187 const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; in add_image_view_relocs() local
198 state.state.offset + isl_dev->ss.aux_addr_offset, in add_image_view_relocs()
498 for (; i < cmd_buffer->device->isl_dev.ss.clear_value_size; i += 4) { in init_fast_clear_state_entry()
547 cmd_buffer->device->isl_dev.ss.clear_value_offset; in genX()
550 unsigned copy_size = cmd_buffer->device->isl_dev.ss.clear_value_size; in genX()
783 const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; in genX() local
812 const uint32_t ss_stride = align_u32(isl_dev->ss.size, isl_dev->ss.align); in genX()
815 num_states * ss_stride, isl_dev->ss.align); in genX()
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Danv_device.c269 _mesa_sha1_update(&sha1_ctx, &device->isl_dev.has_bit6_swizzling, in anv_physical_device_init_uuids()
270 sizeof(device->isl_dev.has_bit6_swizzling)); in anv_physical_device_init_uuids()
421 isl_device_init(&device->isl_dev, &device->info, swizzled); in anv_physical_device_init()
816 isl_device_get_sample_counts(&pdevice->isl_dev); in anv_GetPhysicalDeviceProperties()
1392 device->isl_dev = physical_device->isl_dev; in anv_CreateDevice()
2471 isl_buffer_fill_state(&device->isl_dev, state.map, in anv_fill_buffer_surface_state()
Danv_batch_chain.c645 struct isl_device *isl_dev = &cmd_buffer->device->isl_dev; in anv_cmd_buffer_alloc_surface_state() local
647 isl_dev->ss.size, isl_dev->ss.align); in anv_cmd_buffer_alloc_surface_state()
Danv_private.h765 struct isl_device isl_dev; member
856 struct isl_device isl_dev; member
2524 assert(device->isl_dev.ss.clear_value_size % 4 == 0); in anv_fast_clear_state_entry_size()
2525 return device->isl_dev.ss.clear_value_size + 4; in anv_fast_clear_state_entry_size()
2551 addr.offset += device->isl_dev.ss.clear_value_size; in anv_image_get_needs_resolve_addr()
Danv_blorp.c93 blorp_init(&device->blorp, device, &device->isl_dev); in anv_device_init_blorp()
160 ok = isl_surf_init(&device->isl_dev, isl_surf, in get_blorp_surf_for_anv_buffer()
Danv_formats.c760 sampleCounts = isl_device_get_sample_counts(&physical_device->isl_dev); in anv_get_image_format_properties()