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/external/eigen/lapack/
Dsvd.cpp14 …*jobz, int *m, int* n, Scalar* a, int *lda, RealScalar *s, Scalar *u, int *ldu, Scalar *vt, int *l…
27 else if(*ldu <1 || (*jobz=='A' && *ldu <*m)
28 || (*jobz=='O' && *m<*n && *ldu<*m)) *info = -8;
62 matrix(u,*m,*m,*ldu) = svd.matrixU();
67 matrix(u,*m,diag_size,*ldu) = svd.matrixU();
77 matrix(u,*m,*m,*ldu) = svd.matrixU();
85 …*jobv, int *m, int* n, Scalar* a, int *lda, RealScalar *s, Scalar *u, int *ldu, Scalar *vt, int *l…
99 else if(*ldu <1 || ((*jobu=='A' || *jobu=='S') && *ldu<*m)) *info = -9;
128 if(*jobu=='A') matrix(u,*m,*m,*ldu) = svd.matrixU();
129 else if(*jobu=='S') matrix(u,*m,diag_size,*ldu) = svd.matrixU();
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/
Dldu-ldg.ll4 declare i8 @llvm.nvvm.ldu.global.i.i8.p1i8(i8 addrspace(1)* %ptr, i32 %align)
5 declare i32 @llvm.nvvm.ldu.global.i.i32.p1i32(i32 addrspace(1)* %ptr, i32 %align)
12 ; ldu.global.u8
13 %val = tail call i8 @llvm.nvvm.ldu.global.i.i8.p1i8(i8 addrspace(1)* %ptr, i32 4)
19 ; ldu.global.u32
20 %val = tail call i32 @llvm.nvvm.ldu.global.i.i32.p1i32(i32 addrspace(1)* %ptr, i32 4)
Dldu-reg-plus-offset.ll7 ; CHECK: ldu.global.u32 %r{{[0-9]+}}, [%r{{[0-9]+}}+32];
8 ; CHECK: ldu.global.u32 %r{{[0-9]+}}, [%r{{[0-9]+}}+36];
10 %t1 = call i32 @llvm.nvvm.ldu.global.i.i32.p0i32(i32* %p2, i32 4)
12 %t2 = call i32 @llvm.nvvm.ldu.global.i.i32.p0i32(i32* %p3, i32 4)
18 declare i32 @llvm.nvvm.ldu.global.i.i32.p0i32(i32*, i32)
Dldu-i8.ll5 declare i8 @llvm.nvvm.ldu.global.i.i8.p0i8(i8*, i32)
9 ; CHECK: ldu.global.u8
12 %val = tail call i8 @llvm.nvvm.ldu.global.i.i8.p0i8(i8* %a, i32 4)
Dbug26185-2.ll3 ; Verify that we correctly emit code for extending ldg/ldu. We do not expose
4 ; extending variants in the backend, but the ldg/ldu selection code may pick
Dbug26185.ll3 ; Verify that we correctly emit code for i8 ldg/ldu. We do not expose 8-bit
/external/llvm/test/CodeGen/NVPTX/
Dldu-ldg.ll4 declare i8 @llvm.nvvm.ldu.global.i.i8.p1i8(i8 addrspace(1)* %ptr, i32 %align)
5 declare i32 @llvm.nvvm.ldu.global.i.i32.p1i32(i32 addrspace(1)* %ptr, i32 %align)
12 ; ldu.global.u8
13 %val = tail call i8 @llvm.nvvm.ldu.global.i.i8.p1i8(i8 addrspace(1)* %ptr, i32 4)
19 ; ldu.global.u32
20 %val = tail call i32 @llvm.nvvm.ldu.global.i.i32.p1i32(i32 addrspace(1)* %ptr, i32 4)
Dldu-reg-plus-offset.ll7 ; CHECK: ldu.global.u32 %r{{[0-9]+}}, [%r{{[0-9]+}}+32];
8 ; CHECK: ldu.global.u32 %r{{[0-9]+}}, [%r{{[0-9]+}}+36];
10 %t1 = call i32 @llvm.nvvm.ldu.global.i.i32.p0i32(i32* %p2, i32 4)
12 %t2 = call i32 @llvm.nvvm.ldu.global.i.i32.p0i32(i32* %p3, i32 4)
18 declare i32 @llvm.nvvm.ldu.global.i.i32.p0i32(i32*, i32)
Dldu-i8.ll5 declare i8 @llvm.nvvm.ldu.global.i.i8.p0i8(i8*, i32)
9 ; CHECK: ldu.global.u8
12 %val = tail call i8 @llvm.nvvm.ldu.global.i.i8.p0i8(i8* %a, i32 4)
Dbug26185-2.ll3 ; Verify that we correctly emit code for extending ldg/ldu. We do not expose
4 ; extending variants in the backend, but the ldg/ldu selection code may pick
Dbug26185.ll3 ; Verify that we correctly emit code for i8 ldg/ldu. We do not expose 8-bit
/external/eigen/Eigen/src/SVD/
DJacobiSVD_LAPACKE.h53 lapack_int lda = internal::convert_index<lapack_int>(matrix.outerStride()), ldu, ldvt; \
60 ldu = internal::convert_index<lapack_int>(m_matrixU.outerStride()); \
62 } else { ldu=1; u=&dummy; }\
71 …ACKE_TYPE*)m_temp.data(), lda, (LAPACKE_RTYPE*)m_singularValues.data(), u, ldu, vt, ldvt, superb.d…
/external/eigen/Eigen/src/SparseLU/
DSparseLU_panel_bmod.h104 Index ldu = internal::first_multiple<Index>(u_rows, PacketSize); in panel_bmod() local
105 … Map<ScalarMatrix, Aligned, OuterStride<> > U(tempv.data(), u_rows, u_cols, OuterStride<>(ldu)); in panel_bmod()
145 eigen_assert(tempv.size()>w*ldu + nrow*w + 1); in panel_bmod()
149 MappedMatrixBlock L(tempv.data()+w*ldu+offset, nrow, u_cols, OuterStride<>(ldl)); in panel_bmod()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Instrumentation/MemorySanitizer/
Dmsan_x86intrinsics.ll28 %call = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p)
32 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %p) nounwind
39 ; CHECK: call <16 x i8> @llvm.x86.sse3.ldu.dq
/external/tensorflow/tensorflow/core/kernels/
Dcuda_solvers.cc616 Scalar* S, Scalar* U, int ldu, Scalar* VT, int ldvt, int* dev_lapack_info) { in GesvdImpl() argument
626 ldu, CUDAComplex(VT), ldvt, in GesvdImpl()
636 int lda, Scalar* dev_S, Scalar* dev_U, int ldu, Scalar* dev_VT, \
641 dev_S, dev_U, ldu, dev_VT, ldvt, dev_lapack_info); \
653 int ldu, Scalar* V, int ldv, in GesvdjBatchedImpl() argument
663 ldu, CUDAComplex(V), ldv, &lwork, svdj_info, batch_size)); in GesvdjBatchedImpl()
669 ldu, CUDAComplex(V), ldv, CUDAComplex(dev_workspace.mutable_data()), in GesvdjBatchedImpl()
679 Scalar* dev_S, Scalar* dev_U, int ldu, Scalar* dev_V, int ldv, \
684 lda, dev_S, dev_U, ldu, dev_V, ldv, \
Dcuda_solvers.h313 int lda, Scalar* dev_S, Scalar* dev_U, int ldu, Scalar* dev_VT,
317 int lda, Scalar* dev_S, Scalar* dev_U, int ldu,
Dsvd_op_gpu.cu.cc63 int64 ldu, const Scalar* M, in ComputeValueOfVKernel() argument
68 Scalar v = M[i + m * batch] * U[ldu * (i + m * batch)] * S[batch]; in ComputeValueOfVKernel()
/external/llvm/test/CodeGen/X86/
Dsse3-intrinsics-x86.ll54 %res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1]
57 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly
Dsse3-intrinsics-fast-isel.ll109 %call = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %bc)
113 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dppc64-pre-inc-no-extra-phi.ll26 ; CHECK: ldu {{[0-9]+}}, 8({{[0-9]+}})
Dload-two-flts.ll53 ; CHECK-NOT: ldu {{[0-9]+}}, 8(5)
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding.s.cs42 0xe8,0x44,0x00,0x81 = ldu 2, 128(4)
/external/llvm/test/CodeGen/PowerPC/
Dload-two-flts.ll53 ; CHECK-NOT: ldu {{[0-9]+}}, 8(5)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dsse3-intrinsics-fast-isel.ll124 %call = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %bc)
128 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly
Dsse3-intrinsics-x86.ll127 %res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1]
130 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly

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