Searched refs:lmul (Results 1 – 14 of 14) sorted by relevance
| /external/llvm/test/CodeGen/XCore/ |
| D | mul64.ll | 12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
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| D | addsub64.ll | 46 define i64 @lmul(i32 %a, i32 %b, i32 %c, i32 %d) {
57 ; CHECK-LABEL: lmul:
58 ; CHECK: lmul r1, r0, r1, r0, r2, r3
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| D | threads.ll | 80 ; CHECK: lmul {{r[0-9]}}, r0, r11, [[R2]], [[R0]], [[R1]]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/XCore/ |
| D | mul64.ll | 12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
|
| D | addsub64.ll | 46 define i64 @lmul(i32 %a, i32 %b, i32 %c, i32 %d) {
57 ; CHECK-LABEL: lmul:
58 ; CHECK: lmul r1, r0, r1, r0, r2, r3
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| D | threads.ll | 80 ; CHECK: lmul {{r[0-9]}}, r0, r11, [[R2]], [[R0]], [[R1]]
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| /external/swiftshader/third_party/LLVM/test/CodeGen/XCore/ |
| D | mul64.ll | 12 ; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
35 ; CHECK-NEXT: lmul
37 ; CHECK-NEXT: lmul
47 ; CHECK-NEXT: lmul
|
| D | addsub64.ll | 46 define i64 @lmul(i32 %a, i32 %b, i32 %c, i32 %d) {
57 ; CHECK: lmul:
58 ; CHECK: lmul r1, r0, r1, r0, r2, r3
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| /external/compiler-rt/lib/builtins/ |
| D | muldi3.c | 43 ARM_EABI_FNALIAS(lmul, muldi3) in ARM_EABI_FNALIAS() argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/XCore/ |
| D | xcore.txt | 683 # CHECK: lmul r11, r0, r2, r5, r8, r10
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| /external/llvm/test/MC/Disassembler/XCore/ |
| D | xcore.txt | 683 # CHECK: lmul r11, r0, r2, r5, r8, r10
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 538 "lmul $dst1, $dst2, $src1, $src2, $src3, $src4",
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 537 "lmul $dst1, $dst2, $src1, $src2, $src3, $src4", []>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 530 "lmul $dst1, $dst2, $src1, $src2, $src3, $src4", []>;
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