/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/eva/ |
D | valid_R6.s | 25 … lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf] 26 … lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f] 27 … lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
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D | valid_preR6.s | 29 … lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf] 30 … lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f] 31 … lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
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D | invalid.s | 16 lwe $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid register number 17 lwe $4, 8($33) # CHECK: :[[@LINE]]:15: error: invalid register number 18 lwe $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset 19 lwe $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
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D | invalid_R6.s | 25 lwe $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid register number 26 lwe $4, 8($33) # CHECK: :[[@LINE]]:25: error: invalid register number 27 …lwe $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs… 28 …lwe $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs…
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D | invalid-noeva-wrong-error.s | 40 …lwe $15,255($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct… 41 …lwe $13,-256($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct… 42 …lwe $15,-200($a1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
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/external/llvm/test/MC/Mips/eva/ |
D | valid_R6.s | 25 … lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf] 26 … lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f] 27 … lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
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D | valid_preR6.s | 29 … lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf] 30 … lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f] 31 … lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
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D | invalid.s | 16 lwe $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction 17 lwe $4, 8($33) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset 18 lwe $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset 19 lwe $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
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D | invalid_R6.s | 25 lwe $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction 26 …lwe $4, 8($33) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs… 27 …lwe $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs… 28 …lwe $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs…
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D | invalid-noeva-wrong-error.s | 40 …lwe $15,255($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s… 41 …lwe $13,-256($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s… 42 …lwe $15,-200($a1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | mimg.s | 39 image_load v[5:6], v[1:4], s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16 72 image_store v5, v[1:4], s[8:15] dmask:0x1 unorm glc slc r128 lwe da d16 179 image_load_mip_pck v[5:6], v[1:4], s[8:15] dmask:0x1 unorm glc slc tfe lwe da 188 image_load_pck_sgn v5, v[1:4], s[8:15] dmask:0x1 lwe 208 image_store_mip_pck v1, v[2:5], s[12:19] dmask:0x1 unorm glc slc lwe da 306 image_atomic_add v9, v5, s[8:15] dmask:0x1 unorm glc slc lwe da 310 image_atomic_add v10, v6, s[8:15] dmask:0x1 lwe
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 225 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 226 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 227 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 228 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 229 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 230 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 231 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 232 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 233 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 234 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … [all …]
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D | AMDGPUAsmGFX8.rst | 224 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 225 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 226 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 227 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 228 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 229 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 230 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 231 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 232 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 233 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … [all …]
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D | AMDGPUAsmGFX9.rst | 310 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 311 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 312 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 313 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 314 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 315 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 316 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 317 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 318 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … 319 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` … [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
D | micromips32r6-eva.s | 28 # CHECK-EL: lwe $4, 8($2) # encoding: [0x82,0x60,0x08,0x6e] 55 # CHECK-EB: lwe $4, 8($2) # encoding: [0x60,0x82,0x6e,0x08] 72 lwe $4, 8($2)
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D | micromips-eva.s | 36 # CHECK-EL: lwe $4, 8($2) # encoding: [0x82,0x60,0x08,0x6e] 71 # CHECK-EB: lwe $4, 8($2) # encoding: [0x60,0x82,0x6e,0x08] 92 lwe $4, 8($2)
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/external/llvm/test/MC/Mips/ |
D | micromips-loadstore-instructions.s | 51 # CHECK-EL: lwe $4, 8($2) # encoding: [0x82,0x60,0x08,0x6e] 97 # CHECK-EB: lwe $4, 8($2) # encoding: [0x60,0x82,0x6e,0x08] 140 lwe $4, 8($2)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | mimg_vi.txt | 35 # VI: image_load v5, v1, s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16 ; encoding: [0x00,0xf1… 96 # VI: image_load_pck_sgn v5, v1, s[8:15] dmask:0x1 lwe ; encoding: [0x00,0x01,0x0e,0xf0,0x01,0x05,0… 102 # VI: image_store_mip_pck v1, v2, s[12:19] dmask:0x1 unorm glc slc lwe da ; encoding: [0x00,0x71,0x… 149 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm lwe ; encoding: [0x00,0x11,0x4a,0xf0,0x01,0x… 203 # GFX80: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc lwe da d16 ; encod… 204 # GFX81: image_gather4 v[252:253], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc lwe da d16 ; encod… 215 # VI: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc tfe lwe da ; encoding…
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | MIMGInstructions.td | 144 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da), 146 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da" 202 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da), 204 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da" 255 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da); 256 let AsmString = asm#" $vdst, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"; 319 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da), 321 let AsmString = asm#" $vdata, $vaddr, $srsrc, $ssamp$dmask$unorm$glc$slc$r128$tfe$lwe$da"
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D | SIInstrFormats.td | 256 bits<1> lwe; 269 let Inst{17} = lwe;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/ |
D | invalid.s | 70 lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid register number 71 lwe $4, 8($33) # CHECK: :[[@LINE]]:13: error: invalid register number 72 lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset 73 lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
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/external/llvm/test/MC/Mips/micromips/ |
D | invalid.s | 70 lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction 71 lwe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset 72 lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset 73 lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
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/external/llvm/lib/Target/AMDGPU/ |
D | SIIntrinsics.td | 68 llvm_i32_ty], // lwe(imm) 83 llvm_i32_ty], // lwe(imm)
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/external/llvm/test/MC/Mips/micromips32r6/ |
D | invalid.s | 158 lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction 159 lwe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset 160 lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset 161 lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
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/external/llvm/test/MC/Mips/micromips64r6/ |
D | invalid.s | 187 lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction 188 …lwe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offs… 189 …lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offs… 190 …lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offs…
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