| /external/u-boot/board/zyxel/nsa310s/ |
| D | nsa310s.c | 98 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG); in reset_phy()
101 miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg); in reset_phy()
102 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); in reset_phy()
114 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG); in reset_phy()
121 miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg); in reset_phy()
123 miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0); in reset_phy()
126 miiphy_write(name, phyaddr, 0x4, 0x1e1); in reset_phy()
127 miiphy_write(name, phyaddr, 0x9, 0x300); in reset_phy()
129 miiphy_write(name, phyaddr, 0x10, 0x3860); in reset_phy()
130 miiphy_write(name, phyaddr, 0x0, 0x9140); in reset_phy()
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| /external/u-boot/board/LaCie/common/ |
| D | common.c | 31 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 2); in mv_phy_88e1116_init()
34 miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg); in mv_phy_88e1116_init()
35 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 0); in mv_phy_88e1116_init()
51 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 3); in mv_phy_88e1318_init()
54 miiphy_write(name, phyaddr, 16, reg); in mv_phy_88e1318_init()
60 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 2); in mv_phy_88e1318_init()
63 miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg); in mv_phy_88e1318_init()
64 miiphy_write(name, phyaddr, MII_MARVELL_PHY_PAGE, 0); in mv_phy_88e1318_init()
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| /external/u-boot/board/varisys/cyrus/ |
| D | eth.c | 39 miiphy_write(DEFAULT_FM_MDIO_NAME, phy, 0xb, 0x8104); in cyrus_phy_tuning()
41 miiphy_write(DEFAULT_FM_MDIO_NAME, phy, 0xc, 0xf0f0); in cyrus_phy_tuning()
43 miiphy_write(DEFAULT_FM_MDIO_NAME, phy, 0xb, 0x8105); in cyrus_phy_tuning()
45 miiphy_write(DEFAULT_FM_MDIO_NAME, phy, 0xc, 0x0000); in cyrus_phy_tuning()
47 miiphy_write(DEFAULT_FM_MDIO_NAME, phy, 0xb, 0x8106); in cyrus_phy_tuning()
49 miiphy_write(DEFAULT_FM_MDIO_NAME, phy, 0xc, 0x0000); in cyrus_phy_tuning()
51 miiphy_write(DEFAULT_FM_MDIO_NAME, phy, 0x0, 0x1340); in cyrus_phy_tuning()
|
| /external/u-boot/board/freescale/mx6qarm2/ |
| D | mx6qarm2.c | 179 miiphy_write("FEC", phy, MII_MMD_ACCESS_CTRL_REG, 0x7); in fecmxc_mii_postcall()
180 miiphy_write("FEC", phy, MII_MMD_ACCESS_ADDR_DATA_REG, 0x8016); in fecmxc_mii_postcall()
181 miiphy_write("FEC", phy, MII_MMD_ACCESS_CTRL_REG, 0x4007); in fecmxc_mii_postcall()
185 miiphy_write("FEC", phy, MII_MMD_ACCESS_ADDR_DATA_REG, val); in fecmxc_mii_postcall()
188 miiphy_write("FEC", phy, MII_DBG_PORT_REG, 0x5); in fecmxc_mii_postcall()
191 miiphy_write("FEC", phy, MII_DBG_PORT2_REG, val); in fecmxc_mii_postcall()
193 miiphy_write("FEC", phy, MII_BMCR, 0xa100); in fecmxc_mii_postcall()
|
| /external/u-boot/board/gumstix/pepper/ |
| D | board.c | 272 miiphy_write(devname, 0x0, 0x0b, 0x8104); in board_eth_init()
273 miiphy_write(devname, 0x0, 0xc, 0xa0a0); in board_eth_init()
276 miiphy_write(devname, 0x0, 0x0b, 0x8105); in board_eth_init()
277 miiphy_write(devname, 0x0, 0x0c, 0x0000); in board_eth_init()
280 miiphy_write(devname, 0x0, 0x0b, 0x8106); in board_eth_init()
281 miiphy_write(devname, 0x0, 0x0c, 0x0000); in board_eth_init()
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| /external/u-boot/board/Marvell/openrd/ |
| D | openrd.c | 131 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in mv_phy_init()
134 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in mv_phy_init()
135 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in mv_phy_init()
151 miiphy_write("egiga1", 0xEE, 0xEE, 24); in reset_phy()
|
| /external/u-boot/board/compulab/cl-som-am57x/ |
| D | eth.c | 137 miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG, in cl_som_am57x_rgmii_clk_delay()
142 miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG, in cl_som_am57x_rgmii_clk_delay()
145 miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_ADDR_REG, in cl_som_am57x_rgmii_clk_delay()
150 miiphy_write(devname, CL_SOM_AM57X_PHY_ADDR2, AR8033_PHY_DEBUG_DATA_REG, in cl_som_am57x_rgmii_clk_delay()
|
| /external/u-boot/board/cloudengines/pogo_e02/ |
| D | pogo_e02.c | 92 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy()
95 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy()
96 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy()
|
| /external/u-boot/board/Seagate/nas220/ |
| D | nas220.c | 107 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy()
110 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy()
111 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy()
|
| /external/u-boot/board/Marvell/dreamplug/ |
| D | dreamplug.c | 117 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in mv_phy_88e1116_init()
120 miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); in mv_phy_88e1116_init()
121 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in mv_phy_88e1116_init()
|
| /external/u-boot/board/Marvell/guruplug/ |
| D | guruplug.c | 120 miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2); in mv_phy_88e1121_init()
123 miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg); in mv_phy_88e1121_init()
124 miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0); in mv_phy_88e1121_init()
|
| /external/u-boot/board/Marvell/sheevaplug/ |
| D | sheevaplug.c | 122 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy()
125 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy()
126 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy()
|
| /external/u-boot/board/d-link/dns325/ |
| D | dns325.c | 120 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy()
123 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy()
124 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy()
|
| /external/u-boot/board/Seagate/dockstar/ |
| D | dockstar.c | 126 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy()
129 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy()
130 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy()
|
| /external/u-boot/board/Seagate/goflexhome/ |
| D | goflexhome.c | 128 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy()
131 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy()
132 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy()
|
| /external/u-boot/board/keymile/km_arm/ |
| D | km_arm.c | 347 if (miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_SPEC_CTRL_REG, in reset_phy()
352 if (miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_LED_SEL_REG, in reset_phy()
447 if (miiphy_write(name, CONFIG_PHY_BASE_ADR, in reset_phy()
458 if (miiphy_write(name, CONFIG_PHY_BASE_ADR, in reset_phy()
467 if (miiphy_write(name, CONFIG_PHY_BASE_ADR, in reset_phy()
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| /external/u-boot/board/Synology/ds109/ |
| D | ds109.c | 165 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy()
168 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); in reset_phy()
169 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); in reset_phy()
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| /external/u-boot/board/freescale/mpc8548cds/ |
| D | mpc8548cds.c | 280 miiphy_write(DEFAULT_MII_NAME, in configure_rgmii()
290 miiphy_write(DEFAULT_MII_NAME, in configure_rgmii()
293 miiphy_write(DEFAULT_MII_NAME, in configure_rgmii()
296 miiphy_write(DEFAULT_MII_NAME, in configure_rgmii()
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| /external/u-boot/board/freescale/ls1088a/ |
| D | eth_ls1088aqds.c | 129 ret = miiphy_write(dev, phy_addr, 0x1f, 3); in sgmii_configure_repeater()
141 miiphy_write(dev, phy_addr, 0x1f, 0); in sgmii_configure_repeater()
195 miiphy_write(dev, phy_addr, 0x1f, 0); in sgmii_configure_repeater()
242 ret = miiphy_write(dev, phy_addr, 0x1f, 3); in qsgmii_configure_repeater()
249 miiphy_write(dev, phy_addr, 0x1f, 0); in qsgmii_configure_repeater()
285 miiphy_write(dev, phy_addr, 0x1f, 0); in qsgmii_configure_repeater()
|
| /external/u-boot/board/Marvell/gplugd/ |
| D | gplugd.c | 122 miiphy_write(name, phy_adr, PHY_LED_MAN_REG, 0x00); in reset_phy()
123 miiphy_write(name, phy_adr, PHY_LED_PAR_SEL_REG, PHY_LED_VAL); in reset_phy()
|
| /external/u-boot/board/egnite/ethernut5/ |
| D | ethernut5.c | 172 miiphy_write(devname, 0, 18, mode); in board_eth_init()
174 miiphy_write(devname, 0, MII_BMCR, BMCR_RESET); in board_eth_init()
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| /external/u-boot/board/compulab/cm_t335/ |
| D | cm_t335.c | 156 miiphy_write(devname, 0x0, AR8051_PHY_DEBUG_ADDR_REG, in board_eth_init()
158 miiphy_write(devname, 0x0, AR8051_PHY_DEBUG_DATA_REG, in board_eth_init()
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| /external/u-boot/drivers/net/phy/ |
| D | mv88e6352.c | 69 ret = miiphy_write(devname, phy_addr, COMMAND_REG, command); in sw_reg_read()
93 ret = miiphy_write(devname, phy_addr, DATA_REG, data); in sw_reg_write()
100 ret = miiphy_write(devname, phy_addr, COMMAND_REG, value); in sw_reg_write()
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| /external/u-boot/board/freescale/ls2080aqds/ |
| D | eth.c | 134 ret = miiphy_write(dev[mii_bus], riser_phy_addr[dpmac], 0x1f, in sgmii_configure_repeater()
149 miiphy_write(dev[mii_bus], riser_phy_addr[dpmac], in sgmii_configure_repeater()
208 miiphy_write(dev[mii_bus], riser_phy_addr[dpmac], 0x1f, 0); in sgmii_configure_repeater()
272 ret = miiphy_write(dev, phy_addr, 0x1f, 3); in qsgmii_configure_repeater()
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| /external/u-boot/drivers/net/ |
| D | bcm-sf2-eth.h | 54 int (*miiphy_write)(struct mii_dev *bus, int phyaddr, int devad, member
|