Searched refs:mips32r2 (Results 1 – 25 of 555) sorted by relevance
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/external/llvm/test/MC/Mips/ |
D | mips-hwr-register-names.s | 6 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \ 10 # CHECK-NEXT: .set mips32r2 15 # CHECK-NEXT: .set mips32r2 21 # CHECK-NEXT: .set mips32r2 26 # CHECK-NEXT: .set mips32r2 32 # CHECK-NEXT: .set mips32r2 37 # CHECK-NEXT: .set mips32r2 43 # CHECK-NEXT: .set mips32r2 48 # CHECK-NEXT: .set mips32r2 54 # CHECK-NEXT: .set mips32r2 [all …]
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D | user-macro-argument-separation.s | 1 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \ 3 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \ 5 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \
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D | micromips-control-instructions.s | 1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r2 -mattr=micromips \ 15 # CHECK-EL-NOT: .set mips32r2 57 # CHECK-EB-NOT: .set mips32r2
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
D | mips-hwr-register-names.s | 6 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \ 10 # CHECK-NEXT: .set mips32r2 15 # CHECK-NEXT: .set mips32r2 21 # CHECK-NEXT: .set mips32r2 26 # CHECK-NEXT: .set mips32r2 32 # CHECK-NEXT: .set mips32r2 37 # CHECK-NEXT: .set mips32r2 43 # CHECK-NEXT: .set mips32r2 48 # CHECK-NEXT: .set mips32r2 54 # CHECK-NEXT: .set mips32r2 [all …]
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D | user-macro-argument-separation.s | 1 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \ 3 # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \ 5 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \
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D | micromips-control-instructions.s | 1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips -show-inst \ 3 # RUN: llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r2 -mattr=micromips -show-inst \ 15 # CHECK-EL-NOT: .set mips32r2 60 # CHECK-EB-NOT: .set mips32r2
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/external/llvm/test/CodeGen/Mips/Fast-ISel/ |
D | simplestorefp1.ll | 1 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ 5 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ 6 ; RUN: < %s | FileCheck %s -check-prefix=mips32r2 33 ; mips32r2: lui $[[REG1a:[0-9]+]], 16371 34 ; mips32r2: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353 35 ; mips32r2: lui $[[REG1b:[0-9]+]], 21403 36 ; mips32r2: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951 37 ; mips32r2: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]] 38 ; mips32r2: mthc1 $[[REG2a]], $f[[REG3]] 39 ; mips32r2: sdc1 $f[[REG3]], 0(${{[0-9]+}}) [all …]
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D | loadstoreconv.ll | 1 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ 5 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \ 6 ; RUN: < %s | FileCheck %s -check-prefix=mips32r2 71 ; mips32r2-LABEL: .ent _Z4sc_iv 80 ; mips32r2: lbu $[[REG1:[0-9]+]], 0(${{[0-9]+}}) 81 ; mips32r2: seb ${{[0-9]+}}, $[[REG1]] 109 ; mips32r2-LABEL: .ent _Z4ss_iv 118 ; mips32r2: lhu $[[REG1:[0-9]+]], 0(${{[0-9]+}}) 119 ; mips32r2: seh ${{[0-9]+}}, $[[REG1]] 162 ; mips32r2-LABEL: .ent _Z5sc_ssv [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/Fast-ISel/ |
D | simplestorefp1.ll | 1 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \ 5 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \ 6 ; RUN: < %s | FileCheck %s -check-prefix=mips32r2 33 ; mips32r2: lui $[[REG1a:[0-9]+]], 16371 34 ; mips32r2: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353 35 ; mips32r2: lui $[[REG1b:[0-9]+]], 21403 36 ; mips32r2: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951 37 ; mips32r2: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]] 38 ; mips32r2: mthc1 $[[REG2a]], $f[[REG3]] 39 ; mips32r2: sdc1 $f[[REG3]], 0(${{[0-9]+}}) [all …]
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D | loadstoreconv.ll | 1 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \ 5 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \ 6 ; RUN: < %s | FileCheck %s -check-prefix=mips32r2 71 ; mips32r2-LABEL: .ent _Z4sc_iv 80 ; mips32r2: lbu $[[REG1:[0-9]+]], 0(${{[0-9]+}}) 81 ; mips32r2: seb ${{[0-9]+}}, $[[REG1]] 109 ; mips32r2-LABEL: .ent _Z4ss_iv 118 ; mips32r2: lhu $[[REG1:[0-9]+]], 0(${{[0-9]+}}) 119 ; mips32r2: seh ${{[0-9]+}}, $[[REG1]] 162 ; mips32r2-LABEL: .ent _Z5sc_ssv [all …]
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D | shift.ll | 1 ; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \ 4 ; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
D | buildpairextractelementf64.ll | 3 ; RUN: llc -march=mipsel -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,ALL 4 ; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,ALL 5 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,… 6 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,ALL
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D | elf_eflags.ll | 20 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | FileChec… 21 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | FileCheck -check-prefix=CHECK-LE3… 22 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static … 23 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -chec… 33 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o …
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D | ase_warnings.ll | 2 ; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+msa -mattr=+fp64 < %s 2>&1 | \ 18 ; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+dspr2 < %s 2>&1 | \ 32 ; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+virt < %s 2>&1 | \ 42 ; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+crc < %s 2>&1 | \ 52 ; RUN: llc -march=mips -mattr=+mips32r2 -mattr=+ginv < %s 2>&1 | \
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D | 2008-07-16-SignExtInReg.ll | 1 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s 3 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s
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D | micromips-directives.ll | 4 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | \ 6 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=-micromips %s -o - | \
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/external/llvm/test/CodeGen/Mips/ |
D | buildpairextractelementf64.ll | 3 ; RUN: llc -march=mipsel -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,ALL 4 ; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,ALL 5 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,… 6 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,ALL
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D | elf_eflags.ll | 21 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | FileChec… 22 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | FileCheck -check-prefix=CHECK-LE3… 23 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static … 24 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -chec… 34 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o …
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D | micromips-directives.ll | 4 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | \ 6 ; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=-micromips %s -o - | \
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D | 2008-07-16-SignExtInReg.ll | 1 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s 3 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s
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D | micromips-or16.ll | 1 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ 3 ; RUN: llc -O0 -march=mips -mcpu=mips32r2 -mattr=+micromips \
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | sqrt.ll | 1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s 2 ; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
D | sqrt.ll | 1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s 2 ; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s 5 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 -asm-show-inst < %s | FileCheck %s --…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mt/ |
D | set-directive.s | 1 # RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \ 3 # RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=asm -o - | \
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D | module-directive.s | 1 # RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=obj -o - | \ 3 # RUN: llvm-mc < %s -arch=mips -mcpu=mips32r2 -filetype=asm -o - | \
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