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Searched refs:notx (Results 1 – 22 of 22) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dor-xor.ll195 %notx = xor i32 %x, -1
197 %or2 = or i32 %notx, %y
208 %notx = xor i32 %x, -1
210 %or2 = or i32 %notx, %y
222 %notx = xor i32 %x, -1
224 %and2 = and i32 %notx, %y
235 %notx = xor i32 %x, -1
237 %and2 = and i32 %notx, %y
261 %notx = xor i8 %x, -1
262 %or = or i8 %notx, 7
[all …]
Dxor.ll569 ; %notx = xor i32 %x, -1
570 ; %cmp = icmp sgt i32 %notx, %y
571 ; %smax = select i1 %cmp, i32 %notx, i32 %y
600 %notx = xor i32 %x, -1
601 %cmp1 = icmp sgt i32 %notx, %y
602 %smax = select i1 %cmp1, i32 %notx, i32 %y
614 %notx = xor i32 %x, -1
615 %cmp1 = icmp slt i32 %notx, %y
616 %smin = select i1 %cmp1, i32 %notx, i32 %y
628 %notx = xor i32 %x, -1
[all …]
Dmax-of-nots.ll11 %notx = xor <2 x i32> %x, <i32 -1, i32 -1>
13 %cmp = icmp ult <2 x i32> %notx, %noty
14 %min = select <2 x i1> %cmp, <2 x i32> %notx, <2 x i32> %noty
25 %notx = xor <2 x i32> %x, <i32 -1, i32 -1>
27 %cmp = icmp sle <2 x i32> %notx, %noty
28 %min = select <2 x i1> %cmp, <2 x i32> %notx, <2 x i32> %noty
Dcanonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll166 define i1 @n1(i8 %x, i8 %y, i8 %notx) {
173 %ret = icmp uge i8 %tmp0, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll170 define i1 @n1(i8 %x, i8 %y, i8 %notx) {
177 %ret = icmp eq i8 %tmp0, %notx ; not %x
Dcanonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll159 define i1 @n0(i8 %x, i8 %y, i8 %notx) {
168 %ret = icmp eq i8 %tmp1, %notx ; not %x
Dcanonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll159 define i1 @n0(i8 %x, i8 %y, i8 %notx) {
168 %ret = icmp ne i8 %tmp1, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll166 define i1 @n1(i8 %x, i8 %y, i8 %notx) {
173 %ret = icmp ult i8 %tmp0, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll170 define i1 @n1(i8 %x, i8 %y, i8 %notx) {
177 %ret = icmp ne i8 %tmp0, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll177 define i1 @n1(i8 %y, i8 %notx) {
186 %ret = icmp ugt i8 %tmp0, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll177 define i1 @n1(i8 %y, i8 %notx) {
186 %ret = icmp ule i8 %tmp0, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll192 define i1 @n1(i8 %y, i8 %notx) {
201 %ret = icmp sgt i8 %tmp0, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll192 define i1 @n1(i8 %y, i8 %notx) {
201 %ret = icmp sle i8 %tmp0, %notx ; not %x
Ddemorgan.ll197 %notx = xor i8 %A, -1
198 %c = and i8 %notx, %B
239 %notx = xor i8 %A, -1
240 %c = or i8 %notx, %B
Dcanonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll167 define i1 @n1(i8 %x, i8 %y, i8 %notx) {
174 %ret = icmp slt i8 %tmp0, %notx ; not %x
Dcanonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll167 define i1 @n1(i8 %x, i8 %y, i8 %notx) {
174 %ret = icmp sge i8 %tmp0, %notx ; not %x
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dbics.ll10 %notx = xor i32 %x, -1
11 %and = and i32 %notx, %y
/external/llvm/test/Transforms/InstCombine/
Dor-xor.ll144 %notx = xor i32 %x, -1
146 %or2 = or i32 %notx, %y
157 %notx = xor i32 %x, -1
159 %and2 = and i32 %notx, %y
/external/llvm/test/CodeGen/X86/
Dbmi.ll134 %notx = xor i32 %x, -1
135 %and = and i32 %notx, %y
261 %notx = xor i64 %x, -1
262 %and = and i64 %y, %notx
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dbmi.ll73 %notx = xor i32 %x, -1
74 %and = and i32 %notx, %y
282 %notx = xor i64 %x, -1
283 %and = and i64 %y, %notx
/external/v8/src/compiler/ppc/
Dcode-generator-ppc.cc891 __ notx(kSpeculationPoisonRegister, scratch); in GenerateSpeculationPoisonFromCodeStartRegister() local
1353 __ notx(i.OutputRegister(), i.InputRegister(0), i.OutputRCBit()); in AssembleArchInstruction() local
/external/v8/src/ppc/
Dassembler-ppc.h726 inline void notx(Register dst, Register src, RCBit rc = LeaveRC) { in PPC_X_OPCODE_B_FORM_LIST()