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Searched refs:op_addReg (Results 1 – 7 of 7) sorted by relevance

/external/capstone/arch/X86/
DX86Mapping.h49 void op_addReg(MCInst *MI, int reg);
DX86GenAsmWriter1_reduce.inc2305 op_addReg(MI, X86_REG_DX);
2311 op_addReg(MI, X86_REG_AX);
2317 op_addReg(MI, X86_REG_EAX);
2323 op_addReg(MI, X86_REG_RAX);
2329 op_addReg(MI, X86_REG_AL);
2341 op_addReg(MI, X86_REG_CL);
2460 op_addReg(MI, X86_REG_CL);
DX86GenAsmWriter_reduce.inc2531 op_addReg(MI, X86_REG_RAX);
2605 op_addReg(MI, X86_REG_AX);
2625 op_addReg(MI, X86_REG_EAX);
2636 op_addReg(MI, X86_REG_RAX);
2647 op_addReg(MI, X86_REG_AL);
2692 op_addReg(MI, X86_REG_DX);
DX86GenAsmWriter1.inc14097 op_addReg(MI, X86_REG_ST0);
14133 op_addReg(MI, X86_REG_DX);
14139 op_addReg(MI, X86_REG_AX);
14145 op_addReg(MI, X86_REG_EAX);
14151 op_addReg(MI, X86_REG_RAX);
14157 op_addReg(MI, X86_REG_AL);
14169 op_addReg(MI, X86_REG_CL);
14416 op_addReg(MI, X86_REG_CL);
DX86GenAsmWriter.inc14429 op_addReg(MI, X86_REG_RAX);
14620 op_addReg(MI, X86_REG_AX);
14639 op_addReg(MI, X86_REG_EAX);
14654 op_addReg(MI, X86_REG_RAX);
14665 op_addReg(MI, X86_REG_AL);
14700 op_addReg(MI, X86_REG_ST0);
14787 op_addReg(MI, X86_REG_DX);
DX86Mapping.c47867 void op_addReg(MCInst *MI, int reg) in op_addReg() function
/external/capstone/arch/PowerPC/
DPPCInstPrinter.c711 static void op_addReg(MCInst *MI, unsigned int reg) in op_addReg() function
951 op_addReg(MI, PPC_REG_CR0 + cr - PPC_CR0); in printAliasInstrEx()