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Searched refs:pbs_mode (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_pbs.c33 int ddr3_tip_pbs(u32 dev_num, enum pbs_dir pbs_mode) in ddr3_tip_pbs() argument
39 (pbs_mode == PBS_RX_MODE) ? HWS_HIGH2LOW : HWS_LOW2HIGH; in ddr3_tip_pbs()
40 enum hws_dir dir = (pbs_mode == PBS_RX_MODE) ? OPER_READ : OPER_WRITE; in ddr3_tip_pbs()
41 int iterations = (pbs_mode == PBS_RX_MODE) ? 31 : 63; in ddr3_tip_pbs()
42 u32 res_valid_mask = (pbs_mode == PBS_RX_MODE) ? 0x1f : 0x3f; in ddr3_tip_pbs()
69 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
82 validation_val = (pbs_mode == PBS_RX_MODE) ? 0x1f : 0; in ddr3_tip_pbs()
88 (pbs_mode == PBS_RX_MODE) ? 0x1f : 0x3f; in ddr3_tip_pbs()
141 (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
163 (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
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Dddr3_init.h192 int ddr3_tip_print_pbs_result(u32 dev_num, u32 cs_num, enum pbs_dir pbs_mode);
193 int ddr3_tip_clean_pbs_result(u32 dev_num, enum pbs_dir pbs_mode);