Home
last modified time | relevance | path

Searched refs:pllout (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c20 u32 pll_cfg0, pll_cfg1, pllout; in decode_frac_pll() local
72 pllout = pll_refclk / (divr_val + 1) * 8 * divf_val / in decode_frac_pll()
75 return pllout / (pllout_div + 1); in decode_frac_pll()
86 u32 pllout; in decode_sscg_pll() local
241 pllout = pll_refclk / (divr1 + 1) * sse * (divf1 + 1) / in decode_sscg_pll()
244 return pllout / (pllout_div + 1) / div; in decode_sscg_pll()
/external/u-boot/arch/arm/mach-tegra/
Dclock.c263 int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout, unsigned rate) in clock_set_pllout() argument
271 if (pllout + 1 > pll_num_clkouts[clkid]) in clock_set_pllout()
280 if (pllout == PLL_OUT2 || pllout == PLL_OUT4) in clock_set_pllout()
285 clrsetbits_le32(&pll->pll_out[pllout >> 1], in clock_set_pllout()
/external/u-boot/arch/arm/include/asm/arch-tegra/
Dclock.h73 int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout,