| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r700_asm.c | 47 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in r700_bytecode_alu_build()
93 alu->pred_sel = G_SQ_ALU_WORD0_PRED_SEL(word0); in r700_bytecode_alu_read()
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| D | r600_asm.c | 648 alu_prev->pred_sel == alu->pred_sel) { in replace_gpr_with_pv_ps()
658 alu_prev->pred_sel == alu->pred_sel) { in replace_gpr_with_pv_ps()
768 if (prev[i]->pred_sel) in merge_inst_groups()
774 if (slots[i]->pred_sel) in merge_inst_groups()
1593 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in r600_bytecode_alu_build()
2223 alu->pred_sel ? alu->pred_sel==2 ? '0':'1':' '); in r600_bytecode_disasm()
2722 alu->pred_sel = G_SQ_ALU_WORD0_PRED_SEL(word0); in r600_bytecode_alu_read()
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| D | eg_asm.c | 271 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in eg_bytecode_alu_build()
282 S_SQ_ALU_WORD0_PRED_SEL(alu->pred_sel) | in eg_bytecode_alu_build()
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| D | r600_asm.h | 59 unsigned pred_sel; member
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| /external/llvm/lib/Target/AMDGPU/ |
| D | EvergreenInstructions.td | 416 let pred_sel = 0;
464 LAST:$last, R600_Pred:$pred_sel,
466 " "#name#" $last OQAP, $src0$src0_rel $pred_sel",
486 LAST:$last, R600_Pred:$pred_sel,
488 " "#name#" $last "#dst#"$src0$src0_rel, $src1$src1_rel, $pred_sel",
519 LAST:$last, R600_Pred:$pred_sel, BANK_SWIZZLE:$bank_swizzle),
520 " "#name# "$last "#dst#"$src0$src0_rel, $src1$src1_rel, $src2$src2_rel, $pred_sel",
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| D | R600ExpandSpecialInstrs.cpp | 90 AMDGPU::OpName::pred_sel); in runOnMachineFunction()
92 AMDGPU::OpName::pred_sel); in runOnMachineFunction()
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| D | R600Packetizer.cpp | 190 int OpI = TII->getOperandIdx(MII->getOpcode(), AMDGPU::OpName::pred_sel), in isLegalToPacketizeTogether()
191 OpJ = TII->getOperandIdx(MIJ->getOpcode(), AMDGPU::OpName::pred_sel); in isLegalToPacketizeTogether()
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| D | R600InstrFormats.td | 75 bits<2> pred_sel;
90 let Word0{30-29} = pred_sel;
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| D | R600Instructions.td | 98 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
103 "$pred_sel $bank_swizzle"),
141 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
147 "$pred_sel $bank_swizzle"),
182 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
188 "$pred_sel"
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| D | R600InstrInfo.cpp | 1331 OPERAND_CASE(AMDGPU::OpName::pred_sel) in getSlotedOps()
1373 getSlotedOps(AMDGPU::OpName::pred_sel, Slot))); in buildSlotOfVectorInstruction()
1374 MIB->getOperand(getOperandIdx(Opcode, AMDGPU::OpName::pred_sel)) in buildSlotOfVectorInstruction()
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| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_ssa_builder.cpp | 187 assert(n.bc.pred_sel); in visit()
192 psi->src[4] = sh.get_pred_sel(n.bc.pred_sel - PRED_SEL_0); in visit()
314 value* ps = sh.get_pred_sel(an->bc.pred_sel - PRED_SEL_0); in rename_use()
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| D | sb_dump.cpp | 339 sblog << (a.bc.pred_sel-2) << " [" << *a.pred << "] "; in dump_op()
406 sblog << (n->bc.pred_sel-2) << " [" << *n->pred << "] "; in dump_alu()
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| D | sb_bc_dump.cpp | 357 s << (n.bc.pred_sel>=2 ? (n.bc.pred_sel == 2 ? "0" : "1") : " "); in dump()
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| D | sb_bc_builder.cpp | 388 .PRED_SEL(bc.pred_sel) in build_alu()
410 .PRED_SEL(bc.pred_sel) in build_alu()
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| D | sb_bc_decoder.cpp | 299 bc.pred_sel = w0.get_PRED_SEL(); in decode_alu()
318 bc.pred_sel = iw0.get_PRED_SEL(); in decode_alu()
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| D | sb_bc.h | 515 unsigned pred_sel:2; member
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| D | sb_bc_finalize.cpp | 345 n->bc.pred_sel = PRED_SEL_OFF; in finalize_alu_group()
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| D | sb_bc_parser.cpp | 462 if (n->bc.pred_sel) { in prepare_alu_group()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | EvergreenInstructions.td | 490 let pred_sel = 0;
533 LAST:$last, R600_Pred:$pred_sel,
535 " "#name#" $last OQAP, $src0$src0_rel $pred_sel",
555 LAST:$last, R600_Pred:$pred_sel,
557 " "#name#" $last "#dst#"$src0$src0_rel, $src1$src1_rel, $pred_sel",
588 LAST:$last, R600_Pred:$pred_sel, BANK_SWIZZLE:$bank_swizzle),
589 " "#name# "$last "#dst#"$src0$src0_rel, $src1$src1_rel, $src2$src2_rel, $pred_sel",
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| D | R600ExpandSpecialInstrs.cpp | 106 R600::OpName::pred_sel); in runOnMachineFunction()
108 R600::OpName::pred_sel); in runOnMachineFunction()
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| D | R600Packetizer.cpp | 188 int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel), in isLegalToPacketizeTogether()
189 OpJ = TII->getOperandIdx(MIJ->getOpcode(), R600::OpName::pred_sel); in isLegalToPacketizeTogether()
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| D | R600InstrFormats.td | 85 bits<2> pred_sel;
100 let Word0{30-29} = pred_sel;
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| D | R600Instructions.td | 109 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
114 "$pred_sel $bank_swizzle"),
152 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
158 "$pred_sel $bank_swizzle"),
193 LAST:$last, R600_Pred:$pred_sel, LITERAL:$literal,
199 "$pred_sel"
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| D | R600InstrInfo.cpp | 1310 OPERAND_CASE(R600::OpName::pred_sel) in getSlotedOps()
1352 getSlotedOps(R600::OpName::pred_sel, Slot))); in buildSlotOfVectorInstruction()
1353 MIB->getOperand(getOperandIdx(Opcode, R600::OpName::pred_sel)) in buildSlotOfVectorInstruction()
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