Home
last modified time | relevance | path

Searched refs:r128 (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dmimg.s39 image_load v[5:6], v[1:4], s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16
48 image_load v5, v[1:4], s[8:15] r128
72 image_store v5, v[1:4], s[8:15] dmask:0x1 unorm glc slc r128 lwe da d16
82 image_store v5, v[1:4], s[8:15] r128
242 image_sample v193, v[237:240], s[28:35], s[4:7] r128
331 image_atomic_add v10, v6, s[8:15] dmask:0x1 r128
/external/llvm/test/CodeGen/X86/
Davx512-i1test.ll28 %r128 = and i64 %r111, 576460752303423488
29 %phitmp = icmp eq i64 %r128, 0
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DMIMGInstructions.td144 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
146 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
202 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
204 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
255 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da);
256 let AsmString = asm#" $vdst, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da";
319 R128:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
321 let AsmString = asm#" $vdata, $vaddr, $srsrc, $ssamp$dmask$unorm$glc$slc$r128$tfe$lwe$da"
DSIInstrFormats.td254 bits<1> r128;
267 let Inst{15} = r128;
DAMDGPU.td24 def FeatureMIMG_R128 : SubtargetFeature<"mimg-r128",
/external/ltp/runtest/
Dltp-aio-stress.part139 ADS1010 aio-stress -I500 -o3 -S -r128 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file3 $TMPDIR/…
52 ADS1023 aio-stress -I500 -o3 -O -r128 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $TMPDIR…
65 ADS1036 aio-stress -I500 -o1 -S -r128 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $T…
78 ADS1049 aio-stress -I500 -o1 -O -r128 -t8 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 …
/external/llvm/include/llvm/IR/
DIntrinsicsAMDGPU.td195 llvm_i1_ty, // r128(imm)
210 llvm_i1_ty, // r128(imm)
224 llvm_i1_ty, // r128(imm)
247 llvm_i1_ty, // r128(imm)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Davx512-i1test.ll45 %r128 = and i64 %r111, 576460752303423488
46 %phitmp = icmp eq i64 %r128, 0
/external/llvm/lib/Target/AMDGPU/
DSIIntrinsics.td63 llvm_i32_ty, // r128(imm)
78 llvm_i32_ty, // r128(imm)
DSIInstrInfo.td558 def r128 : NamedOperandBit<"R128", NamedMatchClass<"R128">>;
3387 r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
3388 asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da",
3418 r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
3419 asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
3451 r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
3452 asm#" $vdst, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
3511 r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
3512 asm#" $vdata, $vaddr, $srsrc, $ssamp$dmask$unorm$glc$slc$r128$tfe$lwe$da",
3548 r128:$r128, tfe:$tfe, lwe:$lwe, da:$da),
[all …]
DSIInstructions.td2526 i32:$r128, i32:$da, i32:$glc, i32:$slc, i32:$tfe, i32:$lwe),
2529 (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $da))
2543 imm:$r128, imm:$da, imm:$glc, imm:$slc, imm:$tfe, imm:$lwe),
2546 (as_i1imm $r128), (as_i1imm $tfe), (as_i1imm $lwe), (as_i1imm $da))
2556 (name vt:$addr, v8i32:$rsrc, imm:$dmask, imm:$r128, imm:$da, imm:$glc,
2560 (as_i1imm $r128), 0, 0, (as_i1imm $da))
2570 (name v4f32:$data, vt:$addr, v8i32:$rsrc, i32:$dmask, imm:$r128, imm:$da,
2574 (as_i1imm $r128), 0, 0, (as_i1imm $da))
2584 (name i32:$vdata, vt:$addr, v8i32:$rsrc, imm:$r128, imm:$da, imm:$slc),
2585 (opcode $vdata, $addr, $rsrc, 1, 1, 1, (as_i1imm $slc), (as_i1imm $r128), 0, 0, (as_i1imm $da))
[all …]
DSIInstrFormats.td573 bits<1> r128;
585 let Inst{15} = r128;
/external/libdrm/
D.gitignore71 r128.kld
/external/fonttools/Lib/fontTools/pens/
DmomentsPen.py265 r128 = 21*r55
282 …119 - 9*r120 - r122*r53 + r123 + 54*r124 + 60*r125 + 54*r126 + r127*r35 + r128*y3 - r129*x1 + 81*r…
283 …2 + 27*r51*y2 + 15*r51*y3)/9240 - r52*(r56 + r63 + r78 + r79)/9240 - r53*(r128 + r25*y3 + 42*r43 +…
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrInfo.td67 def r128: LoadDForm<GPRC>;
99 def r128: LoadAForm<GPRC>;
131 def r128: LoadXForm<GPRC>;
179 def r128: StoreDForm<GPRC>;
209 def r128: StoreAForm<GPRC>;
241 def r128: StoreXForm<GPRC>;
1230 def r128: ANDRegInst<GPRC>;
1292 def r128: ANDCRegInst<GPRC>;
1408 def r128: ORRegInst<GPRC>;
1495 def r128: LRRegInst<GPRC>;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dmimg_vi.txt33 # FIXME: This test is incorrect because r128 assumes a 128-bit SRSRC.
35 # VI: image_load v5, v1, s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16 ; encoding: [0x00,0xf1…
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUOperandSyntax.rst285 r128 subsection
295 r128 Specifies 128 bits texture resource size.
/external/neon_2_sse/
DNEON_2_SSE.h8214 __m128i a128, r128; variable
8216 r128 = _mm_slli_epi16 (a128, b);
8217 r128 = _mm_packs_epi16 (r128,r128); //saturated s8, use 64 low bits only
8218 return64(r128);
8226 __m128i a128, r128; variable
8228 r128 = _mm_slli_epi32 (a128, b); //shift_res
8229 r128 = _mm_packs_epi32 (r128,r128); //saturated s16, use 64 low bits only
8230 return64(r128);
8264 __m128i a128, r128; variable
8266 r128 = _mm_slli_epi16 (a128, b); //shift_res
[all …]
/external/lz4/
DNEWS112 r128:
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_tgsi_mem.c290 LLVMValueRef r128 = i1false; in image_append_args() local
300 emit_data->args[emit_data->arg_count++] = r128; in image_append_args()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/ARM/
Dcast.ll288 …; CHECK: Found an estimated cost of 65 for instruction: %r128 = fptoui <4 x double> undef to <4…
289 %r128 = fptoui <4 x double> undef to <4 x i64>
/external/llvm/test/Analysis/CostModel/ARM/
Dcast.ll288 …; CHECK: Found an estimated cost of 65 for instruction: %r128 = fptoui <4 x double> undef to <4…
289 %r128 = fptoui <4 x double> undef to <4 x i64>
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp2458 int Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::r128); in validateMIMGR128()