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/external/llvm/test/MC/Lanai/
Dv11.s15 add %r17, %r18, %r21
17 add.f %r17, %r18, %r21
19 addc %r17, %r18, %r21
21 addc.f %r17, %r18, %r21
43 and %r17, %r18, %r21
45 and.f %r17, %r18, %r21
145 ld %r18[%r17], %r21
147 uld %r18[%r17], %r21
221 ld %r18[*%r17], %r21
223 uld %r18[*%r17], %r21
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Lanai/
Dv11.s15 add %r17, %r18, %r21
17 add.f %r17, %r18, %r21
19 addc %r17, %r18, %r21
21 addc.f %r17, %r18, %r21
43 and %r17, %r18, %r21
45 and.f %r17, %r18, %r21
145 ld %r18[%r17], %r21
147 uld %r18[%r17], %r21
221 ld %r18[*%r17], %r21
223 uld %r18[*%r17], %r21
[all …]
/external/llvm/test/MC/Disassembler/Lanai/
Dv11.txt16 # CHECK: add %r17, %r18, %r21
18 # CHECK: add.f %r17, %r18, %r21
20 # CHECK: addc %r17, %r18, %r21
22 # CHECK: addc.f %r17, %r18, %r21
44 # CHECK: and %r17, %r18, %r21
46 # CHECK: and.f %r17, %r18, %r21
120 # CHECK: ld [%r17 add %r18], %r21
122 # CHECK: uld [%r17 add %r18], %r21
184 # CHECK: ld [*%r17 add %r18], %r21
246 # CHECK: ld [%r17* add %r18], %r21
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Lanai/
Dv11.txt16 # CHECK: add %r17, %r18, %r21
18 # CHECK: add.f %r17, %r18, %r21
20 # CHECK: addc %r17, %r18, %r21
22 # CHECK: addc.f %r17, %r18, %r21
44 # CHECK: and %r17, %r18, %r21
46 # CHECK: and.f %r17, %r18, %r21
120 # CHECK: ld [%r17 add %r18], %r21
122 # CHECK: uld [%r17 add %r18], %r21
184 # CHECK: ld [*%r17 add %r18], %r21
246 # CHECK: ld [%r17* add %r18], %r21
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Hexagon/
Dload-GPRel.s10 #CHECK: 4d1ac4d2 { r18 = memb(gp+#46118) }
11 r18 = memb(gp+#46118) define
12 #CHECK: 4d1ac4d2 { r18 = memb(gp+#46118) }
13 r18 = memb(#46118) define
15 #CHECK: 4d81f772 { r18 = memw(gp+#134892) }
16 r18 = memw(gp+#134892) define
17 #CHECK: 4d81f772 { r18 = memw(gp+#134892) }
18 r18 = memw(#134892) define
DasmMap.s29 #CHECK: 457fc012 { if (!p0) r18 = memuh(r31+#0)
30 if (!p0) r18=memuh(r31)
149 #CHECK: 3e1ec032 { memb(r30+#0) -= r18
150 memb(r30)-=r18
233 #CHECK: 4312c801 if (p1.new) r1 = memb(r18+#0)
235 if (p1.new) r1=memb(r18)
283 p1=cmp.eq(r18,##1159699785)
341 #CHECK: 4692df01 if (!p1.new) memw(r18+#0) = r31
343 if (!p1.new) memw(r18)=r31
350 p2=cmp.eq(r18,##1895120239)
[all …]
Dstore-GPRel.s14 { r6 = add(r18,r13)
18 { r6 = add(r18,r13)
22 { r17 = add(r26,r18)
25 { r17 = add(r26,r18)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Lanai/
Dcomparisons_i64.ll31 ; CHECK: sub.f %r6, %r18, %r0
35 ; CHECK-NEXT: sub.f %r6, %r18, %r0
44 ; CHECK: sub.f %r6, %r18, %r0
48 ; CHECK-NEXT: sub.f %r6, %r18, %r0
57 ; CHECK: sub.f %r6, %r18, %r0
61 ; CHECK-NEXT: sub.f %r6, %r18, %r0
70 ; CHECK: sub.f %r6, %r18, %r0
74 ; CHECK-NEXT: sub.f %r6, %r18, %r0
83 ; CHECK: sub.f %r6, %r18, %r0
87 ; CHECK-NEXT: sub.f %r6, %r18, %r0
[all …]
Dpeephole-compare.mir9 # sel.eq $r18, $r3, $rv
189 - { reg: '$r18', virtual-reg: '%2' }
206 liveins: $r6, $r7, $r18
208 %2 = COPY $r18
232 - { reg: '$r18', virtual-reg: '%2' }
249 liveins: $r6, $r7, $r18
251 %2 = COPY $r18
275 - { reg: '$r18', virtual-reg: '%2' }
293 liveins: $r6, $r7, $r18, $r19
296 %2 = COPY $r18
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/
Deor.ll30 ; CHECK: ldi r18, 210
32 ; CHECK: eor r24, r18
40 ; CHECK: eor r22, r18
50 ; CHECK: ldi r18, 210
52 ; CHECK: eor r22, r18
60 ; CHECK: eor r18, r10
76 ; CHECK: eor r18, r30
/external/libunwind/src/ia64/
DGinstall_cursor.S69 ld8 r18 = [r3], 2*LOC_SIZE // r18 = loc[IA64_REG_FR18]
80 and r18 = -4, r18
87 ldf.fill f18 = [r18] // f18 restored (don't touch no more)
169 ld8 r18 = [r2], (B5_LOC_OFF - B3_LOC_OFF) // r18 = b3_loc
181 and r18 = -4, r18
188 ld8 r18 = [r18] // r18 = *b3_loc
221 mov b3 = r18 // b3 restored (don't touch no more)
288 ld8 r18 = [r3] // r18 restored (don't touch no more)
/external/libffi/src/or1k/
Dsysv.S49 l.sw -20(r1), r18
56 l.ori r18, r6, 0x0 /* save ret address */
90 l.sw 4(r18), r12
93 l.sw 0(r18), r11
102 l.lwz r18, -20(r1)
/external/llvm/test/CodeGen/MIR/Lanai/
Dpeephole-compare.mir9 # sel.eq %r18, %r3, %rv
193 - { reg: '%r18', virtual-reg: '%2' }
210 liveins: %r6, %r7, %r18
212 %2 = COPY %r18
240 - { reg: '%r18', virtual-reg: '%2' }
257 liveins: %r6, %r7, %r18
259 %2 = COPY %r18
287 - { reg: '%r18', virtual-reg: '%2' }
305 liveins: %r6, %r7, %r18, %r19
308 %2 = COPY %r18
[all …]
/external/llvm/test/MC/Hexagon/
DasmMap.s29 #CHECK: 457fc012 { if (!p0) r18 = memuh(r31{{ *}}+{{ *}}#0)
30 if (!p0) r18=memuh(r31)
149 #CHECK: 3e1ec032 { memb(r30{{ *}}+{{ *}}#0) {{ *}}-={{ *}} r18
150 memb(r30)-=r18
233 #CHECK: 4312c801 if (p1.new) r1 = memb(r18{{ *}}+{{ *}}#0)
235 if (p1.new) r1=memb(r18)
283 p1=cmp.eq(r18,##1159699785)
341 #CHECK: 4692df01 if (!p1.new) memw(r18{{ *}}+{{ *}}#0) = r31
343 if (!p1.new) memw(r18)=r31
350 p2=cmp.eq(r18,##1895120239)
[all …]
/external/llvm/test/CodeGen/Lanai/
Dcomparisons_i64.ll32 ; CHECK: subb.f %r6, %r18, %r3
42 ; CHECK: subb.f %r18, %r6, %r3
52 ; CHECK: subb.f %r6, %r18, %r3
62 ; CHECK: subb.f %r18, %r6, %r3
72 ; CHECK: subb.f %r18, %r6, %r3
82 ; CHECK: subb.f %r6, %r18, %r3
92 ; CHECK: subb.f %r18, %r6, %r3
102 ; CHECK: subb.f %r6, %r18, %r3
Dselect.ll10 ; CHECK: sel.ne %r7, %r18, %rv
18 ; CHECK: sel.eq %r7, %r18, %rv
27 ; CHECK: sel.ne %r7, %r18, %rv
/external/libffi/src/ia64/
Dunix.S105 addl r18 = @ltoffx(.Lst_table), gp
107 ld8.mov r18 = [r18], .Lst_table
110 shladd r18 = r16, 3, r18
112 ld8 r17 = [r18]
115 add r17 = r17, r18
185 add r18 = 24, sp
191 (p8) st8 [r18] = r11
352 addl r18 = @ltoffx(.Lld_table), gp
355 ld8.mov r18 = [r18], .Lld_table
358 shladd r18 = r16, 3, r18
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/ia64/
Dunix.S105 addl r18 = @ltoffx(.Lst_table), gp
107 ld8.mov r18 = [r18], .Lst_table
110 shladd r18 = r16, 3, r18
112 ld8 r17 = [r18]
115 add r17 = r17, r18
185 add r18 = 24, sp
191 (p8) st8 [r18] = r11
352 addl r18 = @ltoffx(.Lld_table), gp
355 ld8.mov r18 = [r18], .Lld_table
358 shladd r18 = r16, 3, r18
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/calling-conv/c/
Dreturn.ll27 ; CHECK: ldi r18, 0
29 ; CHECK-NEXT: mov r20, r18
31 ; CHECK-NEXT: mov r22, r18
33 ; CHECK-NEXT: mov r24, r18
/external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ebb/
Dbusy_loop.S16 std r18, 128(%r1)
57 li r18, 0x1818
58 std r18, -200(%r1)
117 cmpwi r18, 0x1818
160 li r18, 0xad
212 ld r18, -200(%r1)
213 cmpwi r18, 0x1818
256 ld r18, 128(%r1)
/external/skia/infra/skqp/docker/android-skqp/
DDockerfile24 RUN wget -O /root/android-ndk-r18-linux-x86_64.zip https://storage.googleapis.com/skia-cdn/android-…
25 unzip /root/android-ndk-r18-linux-x86_64.zip && \
26 rm -f /root/android-ndk-r18-linux-x86_64.zip
40 ENV ANDROID_NDK=/root/android-ndk-r18
/external/skqp/infra/skqp/docker/android-skqp/
DDockerfile24 RUN wget -O /root/android-ndk-r18-linux-x86_64.zip https://storage.googleapis.com/skia-cdn/android-…
25 unzip /root/android-ndk-r18-linux-x86_64.zip && \
26 rm -f /root/android-ndk-r18-linux-x86_64.zip
40 ENV ANDROID_NDK=/root/android-ndk-r18
/external/libunwind/tests/
Dia64-test-stack-asm.S45 alloc r18 = ar.pfs, 0, 0, 0, 0 // read ar.pfs
67 st8 [r3] = r18, (SAVED_BSP_OFF - SAVED_PFS_OFF)
71 mov r18 = ar.rnat
80 st8 [r3] = r18
106 ld8 r18 = [r3], (SAVED_RNAT_OFF-SAVED_PFS_OFF);; // saved pfs
112 mov ar.pfs = r18
Dia64-test-rbs-asm.S46 alloc r18 = ar.pfs, 2, (n)-2, 2, 0;/* read ar.pfs */ \
74 st8 [r3] = r18, (SAVED_BSP_OFF - SAVED_PFS_OFF); \
77 mov r18 = ar.rnat; \
87 st8 [r3] = r18; \
100 ld8 r18 = [r3], (SAVED_RNAT_OFF-SAVED_PFS_OFF);;/* saved pfs */ \
105 mov ar.pfs = r18; \
188 mov r18 = in1
220 mov in1 = r18
/external/swiftshader/third_party/LLVM/test/CodeGen/MBlaze/
Dsvol.ll21 ; CHECK: swi r18, r1
28 ; CHECK: lwi r18, r1
56 ; CHECK: swi r18, r1
61 ; CHECK: lwi r18, r1

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