| /external/swiftshader/third_party/LLVM/lib/Target/ |
| D | TargetRegisterInfo.cpp | 24 regclass_iterator RCB, regclass_iterator RCE, in TargetRegisterInfo()
61 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ in getMinimalPhysRegClass()
87 for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), in getAllocatableSet()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 220 typedef const TargetRegisterClass * const * regclass_iterator; typedef
224 regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses
228 regclass_iterator RegClassBegin,
229 regclass_iterator RegClassEnd,
448 regclass_iterator regclass_begin() const { return RegClassBegin; } in regclass_begin()
449 regclass_iterator regclass_end() const { return RegClassEnd; } in regclass_end()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 222 using regclass_iterator = const TargetRegisterClass * const *;
234 regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses
241 regclass_iterator RCB,
242 regclass_iterator RCE,
677 regclass_iterator regclass_begin() const { return RegClassBegin; } in regclass_begin()
678 regclass_iterator regclass_end() const { return RegClassEnd; } in regclass_end()
679 iterator_range<regclass_iterator> regclasses() const { in regclasses()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 258 typedef const TargetRegisterClass * const * regclass_iterator; typedef
265 regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses
270 regclass_iterator RegClassBegin,
271 regclass_iterator RegClassEnd,
640 regclass_iterator regclass_begin() const { return RegClassBegin; } in regclass_begin()
641 regclass_iterator regclass_end() const { return RegClassEnd; } in regclass_end()
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCRegisterInfo.h | 138 typedef const MCRegisterClass *regclass_iterator; typedef
290 regclass_iterator regclass_begin() const { return Classes; } in regclass_begin()
291 regclass_iterator regclass_end() const { return Classes+NumClasses; } in regclass_end()
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| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 31 regclass_iterator RCB, regclass_iterator RCE, in TargetRegisterInfo()
134 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ in getMinimalPhysRegClass()
164 for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), in getAllocatableSet()
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| D | RegisterClassInfo.cpp | 159 for (TargetRegisterInfo::regclass_iterator in computePSetLimit()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 137 using regclass_iterator = const MCRegisterClass *;
427 regclass_iterator regclass_begin() const { return Classes; } in regclass_begin()
428 regclass_iterator regclass_end() const { return Classes+NumClasses; } in regclass_end()
429 iterator_range<regclass_iterator> regclasses() const { in regclasses()
|
| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 137 typedef const MCRegisterClass *regclass_iterator; typedef
408 regclass_iterator regclass_begin() const { return Classes; } in regclass_begin()
409 regclass_iterator regclass_end() const { return Classes+NumClasses; } in regclass_end()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | RenderMachineFunction.cpp | 248 for (TargetRegisterInfo::regclass_iterator rcItr = tri->regclass_begin(), in translateRegClassNamesToCurrentFunction()
351 for (TargetRegisterInfo::regclass_iterator rcItr = tri->regclass_begin(), in initWorst()
370 for (TargetRegisterInfo::regclass_iterator rc1Itr = tri->regclass_begin(), in initWorst()
376 for (TargetRegisterInfo::regclass_iterator rc2Itr = tri->regclass_begin(); in initWorst()
433 for (TargetRegisterInfo::regclass_iterator rcItr = tri->regclass_begin(), in initCapacity()
478 for (TargetRegisterInfo::regclass_iterator in resetPressureAndLiveStates()
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| D | VirtRegMap.cpp | 82 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in runOnMachineFunction()
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| D | MachineLICM.cpp | 330 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in runOnMachineFunction()
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| D | RegAllocLinearScan.cpp | 407 for (TargetRegisterInfo::regclass_iterator RCI = tri_->regclass_begin(), in INITIALIZE_PASS_DEPENDENCY()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 60 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in ResourcePriorityQueue()
367 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in regPressureDelta()
374 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in regPressureDelta()
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| D | ScheduleDAGRRList.cpp | 1662 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in RegReductionPQBase()
1930 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in dumpRegPressure()
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| D | TargetLowering.cpp | 2357 for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(), in getRegForInlineAsmConstraint()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 43 regclass_iterator RCB, regclass_iterator RCE, in TargetRegisterInfo()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 718 for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(), in hasLegalSuperRegRegClasses()
735 for (TargetRegisterInfo::regclass_iterator I = RC->superregclasses_begin(), in findRepresentativeClass()
2757 for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(), in getRegForInlineAsmConstraint()
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| D | ScheduleDAGRRList.cpp | 1550 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in RegReductionPQBase()
1820 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), in dumpRegPressure()
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