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Searched refs:replaceRegWith (Results 1 – 25 of 67) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DCombinerHelper.cpp33 MRI.replaceRegWith(DstReg, SrcReg); in tryCombineCopy()
DInstructionSelect.cpp174 MRI.replaceRegWith(DstReg, SrcReg); in runOnMachineFunction()
/external/llvm/lib/Target/AMDGPU/
DSIFrameLowering.cpp166 MRI.replaceRegWith(ScratchRsrcReg, Reg); in emitPrologue()
199 MRI.replaceRegWith(ScratchWaveOffsetReg, Reg); in emitPrologue()
/external/llvm/lib/Target/Sparc/
DSparcFrameLowering.cpp325 MRI.replaceRegWith(reg, mapped_reg); in remapRegsForLeafProc()
331 MRI.replaceRegWith(preg, mapped_preg); in remapRegsForLeafProc()
/external/llvm/lib/Target/X86/
DX86FixupSetCC.cpp177 MRI->replaceRegWith(ZExt->getOperand(0).getReg(), InsertReg); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/
DSparcFrameLowering.cpp342 MRI.replaceRegWith(reg, mapped_reg); in remapRegsForLeafProc()
348 MRI.replaceRegWith(preg, mapped_preg); in remapRegsForLeafProc()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86FixupSetCC.cpp178 MRI->replaceRegWith(ZExt->getOperand(0).getReg(), InsertReg); in runOnMachineFunction()
DX86FlagsCopyLowering.cpp894 MRI->replaceRegWith(MI.getOperand(0).getReg(), in rewriteCopy()
917 MRI->replaceRegWith(SetBI.getOperand(0).getReg(), Reg); in rewriteSetCarryExtended()
1042 MRI->replaceRegWith(SetCCI.getOperand(0).getReg(), CondReg); in rewriteSetCC()
/external/llvm/lib/CodeGen/
DOptimizePHIs.cpp174 MRI->replaceRegWith(OldReg, SingleValReg); in OptimizeBB()
DUnreachableBlockElim.cpp207 MRI.replaceRegWith(Output, Input); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DOptimizePHIs.cpp183 MRI->replaceRegWith(OldReg, SingleValReg); in OptimizeBB()
DUnreachableBlockElim.cpp212 MRI.replaceRegWith(OutputReg, InputReg); in runOnMachineFunction()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DOptimizePHIs.cpp168 MRI->replaceRegWith(MI->getOperand(0).getReg(), SingleValReg); in OptimizeBB()
DUnreachableBlockElim.cpp202 MRI.replaceRegWith(Output, Input); in runOnMachineFunction()
DMachineRegisterInfo.cpp136 void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) { in replaceRegWith() function in MachineRegisterInfo
DStrongPHIElimination.cpp363 MRI->replaceRegWith(DestReg, NewReg); in runOnMachineFunction()
829 MRI->replaceRegWith(Reg, NewReg); in MergeLIsAndRename()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyRegColoring.cpp174 MRI->replaceRegWith(Old, New); in runOnMachineFunction()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyRegColoring.cpp172 MRI->replaceRegWith(Old, New); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonVExtract.cpp155 MRI.replaceRegWith(ExtR, ElemR); in runOnMachineFunction()
DHexagonGenPredicate.cpp437 MRI->replaceRegWith(OutR.R, NewOutR); in convertToPredForm()
482 MRI->replaceRegWith(DR.R, SR.R); in eliminatePredCopies()
/external/llvm/lib/Target/Hexagon/
DHexagonGenPredicate.cpp419 MRI->replaceRegWith(OutR.R, NewOutR); in convertToPredForm()
465 MRI->replaceRegWith(DR.R, SR.R); in eliminatePredCopies()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIOptimizeExecMaskingPreRA.cpp235 MRI.replaceRegWith(SavedExec, AMDGPU::EXEC); in runOnMachineFunction()
DSIInstrInfo.cpp1554 MRI.replaceRegWith(PCReg, Scav); in insertIndirectBranch()
3970 MRI.replaceRegWith(getNamedOperand(Inst, AMDGPU::OpName::sdst)->getReg(), in moveToVALU()
4056 MRI.replaceRegWith(DstReg, Inst.getOperand(1).getReg()); in moveToVALU()
4070 MRI.replaceRegWith(DstReg, NewDstReg); in moveToVALU()
4106 MRI.replaceRegWith(OldDstReg, ResultReg); in moveScalarAddSub()
4139 MRI.replaceRegWith(Dest.getReg(), ResultReg); in lowerScalarAbs()
4172 MRI.replaceRegWith(Dest.getReg(), NewDest); in lowerScalarXnor()
4218 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitUnaryOp()
4284 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitAddSub()
4351 MRI.replaceRegWith(Dest.getReg(), FullDestReg); in splitScalar64BitBinaryOp()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVMergeBaseOffset.cpp111 MRI->replaceRegWith(Tail.getOperand(0).getReg(), in foldOffset()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineRegisterInfo.h174 void replaceRegWith(unsigned FromReg, unsigned ToReg);

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