/external/llvm/test/CodeGen/AMDGPU/ |
D | sra.ll | 49 ; FUNC-LABEL: {{^}}s_ashr_i64: 50 ; GCN: s_ashr_i64 s[{{[0-9]}}:{{[0-9]}}], s[{{[0-9]}}:{{[0-9]}}], 8 53 define void @s_ashr_i64(i64 addrspace(1)* %out, i32 %in) { 127 ; XGCN: s_ashr_i64 {{s\[[0-9]+:[0-9]+\], s\[[0-9]+:[0-9]+\], s[0-9]+}} 128 ; XGCN: s_ashr_i64 {{s\[[0-9]+:[0-9]+\], s\[[0-9]+:[0-9]+\], s[0-9]+}}
|
D | sign_extend.ll | 125 ; GCN-DAG: s_ashr_i64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 48
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | sra.ll | 79 ; FUNC-LABEL: {{^}}s_ashr_i64: 80 ; GCN: s_ashr_i64 s[{{[0-9]}}:{{[0-9]}}], s[{{[0-9]}}:{{[0-9]}}], 8 83 define amdgpu_kernel void @s_ashr_i64(i64 addrspace(1)* %out, i32 %in) { 157 ; XGCN: s_ashr_i64 {{s\[[0-9]+:[0-9]+\], s\[[0-9]+:[0-9]+\], s[0-9]+}} 158 ; XGCN: s_ashr_i64 {{s\[[0-9]+:[0-9]+\], s\[[0-9]+:[0-9]+\], s[0-9]+}}
|
D | sign_extend.ll | 183 ; SI-DAG: s_ashr_i64 s{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 48
|
/external/llvm/test/MC/AMDGPU/ |
D | sop2.s | 127 s_ashr_i64 s[2:3], s[4:5], s6 label
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | sop2.s | 133 s_ashr_i64 s[2:3], s[4:5], s6 label
|
D | gfx7_asm_all.s | 18933 s_ashr_i64 s[10:11], s[2:3], s2 label 18936 s_ashr_i64 s[12:13], s[2:3], s2 label 18939 s_ashr_i64 s[102:103], s[2:3], s2 label 18942 s_ashr_i64 flat_scratch, s[2:3], s2 label 18945 s_ashr_i64 vcc, s[2:3], s2 label 18948 s_ashr_i64 tba, s[2:3], s2 label 18951 s_ashr_i64 tma, s[2:3], s2 label 18954 s_ashr_i64 ttmp[10:11], s[2:3], s2 label 18957 s_ashr_i64 exec, s[2:3], s2 label 18960 s_ashr_i64 s[10:11], s[4:5], s2 label [all …]
|
D | gfx8_asm_all.s | 19605 s_ashr_i64 s[10:11], s[2:3], s2 label 19608 s_ashr_i64 s[12:13], s[2:3], s2 label 19611 s_ashr_i64 s[100:101], s[2:3], s2 label 19614 s_ashr_i64 flat_scratch, s[2:3], s2 label 19617 s_ashr_i64 vcc, s[2:3], s2 label 19620 s_ashr_i64 tba, s[2:3], s2 label 19623 s_ashr_i64 tma, s[2:3], s2 label 19626 s_ashr_i64 ttmp[10:11], s[2:3], s2 label 19629 s_ashr_i64 exec, s[2:3], s2 label 19632 s_ashr_i64 s[10:11], s[4:5], s2 label [all …]
|
D | gfx9_asm_all.s | 17605 s_ashr_i64 s[10:11], s[2:3], s2 label 17608 s_ashr_i64 s[12:13], s[2:3], s2 label 17611 s_ashr_i64 s[100:101], s[2:3], s2 label 17614 s_ashr_i64 flat_scratch, s[2:3], s2 label 17617 s_ashr_i64 vcc, s[2:3], s2 label 17620 s_ashr_i64 exec, s[2:3], s2 label 17623 s_ashr_i64 s[10:11], s[4:5], s2 label 17626 s_ashr_i64 s[10:11], s[100:101], s2 label 17629 s_ashr_i64 s[10:11], flat_scratch, s2 label 17632 s_ashr_i64 s[10:11], vcc, s2 label [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 66 # VI: s_ashr_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x90]
|
D | gfx8_dasm_all.txt | 16341 # CHECK: s_ashr_i64 s[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0x8a,0x90] 16344 # CHECK: s_ashr_i64 s[12:13], s[2:3], s2 ; encoding: [0x02,0x02,0x8c,0x90] 16347 # CHECK: s_ashr_i64 s[100:101], s[2:3], s2 ; encoding: [0x02,0x02,0xe4,0x90] 16350 # CHECK: s_ashr_i64 flat_scratch, s[2:3], s2 ; encoding: [0x02,0x02,0xe6,0x90] 16353 # CHECK: s_ashr_i64 vcc, s[2:3], s2 ; encoding: [0x02,0x02,0xea,0x90] 16356 # CHECK: s_ashr_i64 tba, s[2:3], s2 ; encoding: [0x02,0x02,0xec,0x90] 16359 # CHECK: s_ashr_i64 tma, s[2:3], s2 ; encoding: [0x02,0x02,0xee,0x90] 16362 # CHECK: s_ashr_i64 ttmp[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0xfa,0x90] 16365 # CHECK: s_ashr_i64 exec, s[2:3], s2 ; encoding: [0x02,0x02,0xfe,0x90] 16368 # CHECK: s_ashr_i64 s[10:11], s[4:5], s2 ; encoding: [0x04,0x02,0x8a,0x90] [all …]
|
D | gfx9_dasm_all.txt | 15234 # CHECK: s_ashr_i64 s[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0x8a,0x90] 15237 # CHECK: s_ashr_i64 s[12:13], s[2:3], s2 ; encoding: [0x02,0x02,0x8c,0x90] 15240 # CHECK: s_ashr_i64 s[100:101], s[2:3], s2 ; encoding: [0x02,0x02,0xe4,0x90] 15243 # CHECK: s_ashr_i64 flat_scratch, s[2:3], s2 ; encoding: [0x02,0x02,0xe6,0x90] 15246 # CHECK: s_ashr_i64 vcc, s[2:3], s2 ; encoding: [0x02,0x02,0xea,0x90] 15249 # CHECK: s_ashr_i64 exec, s[2:3], s2 ; encoding: [0x02,0x02,0xfe,0x90] 15252 # CHECK: s_ashr_i64 s[10:11], s[4:5], s2 ; encoding: [0x04,0x02,0x8a,0x90] 15255 # CHECK: s_ashr_i64 s[10:11], s[100:101], s2 ; encoding: [0x64,0x02,0x8a,0x90] 15258 # CHECK: s_ashr_i64 s[10:11], flat_scratch, s2 ; encoding: [0x66,0x02,0x8a,0x90] 15261 # CHECK: s_ashr_i64 s[10:11], vcc, s2 ; encoding: [0x6a,0x02,0x8a,0x90] [all …]
|
/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 66 # VI: s_ashr_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x90]
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 449 def S_ASHR_I64 : SOP2_64_32 <"s_ashr_i64",
|
/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 433 s_ashr_i64 dst, src0, src1
|
D | AMDGPUAsmGFX8.rst | 451 s_ashr_i64 dst, src0, src1
|
D | AMDGPUAsmGFX9.rst | 594 s_ashr_i64 dst, src0, src1
|
/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 293 defm S_ASHR_I64 : SOP2_64_32 <sop2<0x23, 0x21>, "s_ashr_i64",
|