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Searched refs:s_lshr_b32 (Results 1 – 25 of 52) sorted by relevance

123

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dextract_vector_elt-i8.ll17 ; SI: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 8
34 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
50 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
67 ; GCN: s_lshr_b32 s{{[0-9]+}}, [[VAL]], 16
82 ; GCN: s_lshr_b32 [[ELT2:s[0-9]+]], [[LOAD0]], 16
100 ; GCN: s_lshr_b32 [[ELT2:s[0-9]+]], [[VAL]], 16
116 ; GCN: s_lshr_b32 [[ELT2:s[0-9]+]], [[LOAD0]], 16
154 ; VI: s_lshr_b32 [[ELT:s[0-9]+]], [[LOAD]], [[SCALED_IDX]]
169 ; VI: s_lshr_b32 [[EXTRACT:s[0-9]+]], [[VEC4]], [[SCALED_IDX]]
201 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 8
[all …]
Dimmv216.ll126 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
147 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
168 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
189 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
211 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
232 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
253 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
274 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
295 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
355 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VAL]], 16
[all …]
Dllvm.amdgcn.buffer.store.format.d16.ll18 ; UNPACKED-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[S_DATA]], 16
35 ; UNPACKED-DAG: s_lshr_b32 [[SHR0:s[0-9]+]], s[[S_DATA_0]], 16
37 ; UNPACKED-DAG: s_lshr_b32 [[SHR1:s[0-9]+]], s[[S_DATA_1]], 16
Dllvm.amdgcn.tbuffer.store.d16.ll18 ; UNPACKED-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[S_DATA]], 16
35 ; UNPACKED-DAG: s_lshr_b32 [[SHR0:s[0-9]+]], s[[S_DATA_0]], 16
37 ; UNPACKED-DAG: s_lshr_b32 [[SHR1:s[0-9]+]], s[[S_DATA_1]], 16
Dselect-i1.ll18 ; GCN-DAG: s_lshr_b32 [[A:s[0-9]+]], [[LOAD]], 8
19 ; GCN-DAG: s_lshr_b32 [[B:s[0-9]+]], [[LOAD]], 16
Dextract_vector_elt-i16.ll7 ; GCN: s_lshr_b32 [[ELT1:s[0-9]+]], [[VEC]], 16
26 ; GCN: s_lshr_b32 [[ELT1:s[0-9]+]], [[VEC]], [[IDX_SCALED]]
141 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
156 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
Dextract_vector_elt-f16.ll6 ; GCN: s_lshr_b32 [[ELT1:s[0-9]+]], [[VEC]], 16
25 ; GCN: s_lshr_b32 [[ELT1:s[0-9]+]], [[VEC]], [[IDX_SCALED]]
144 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
159 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
Dinsert_vector_elt.v2i16.ll43 ; CI: s_lshr_b32 [[SHR:s[0-9]+]], [[VEC]], 16
53 ; VI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VEC]], 16
58 ; GFX9: s_lshr_b32 [[ELT1:s[0-9]+]], [[VEC]], 16
75 ; CIVI: s_lshr_b32 [[ELT_HI:s[0-9]+]], [[ELT_ARG]], 16
95 ; CIVI-DAG: s_lshr_b32 [[ELT1:s[0-9]+]], [[ELT_ARG]], 16
99 ; GFX9: s_lshr_b32 [[ELT1:s[0-9]+]], [[ELT_ARG]], 16
117 ; CI-DAG: s_lshr_b32 [[ELT_HI:s[0-9]+]], [[ELT_ARG]], 16
118 ; CI-DAG: s_lshr_b32 [[SHR:s[0-9]+]], [[VEC]], 16
123 ; VI-DAG: s_lshr_b32 [[ELT_HI:s[0-9]+]], [[ELT_ARG]], 16
124 ; VI-DAG: s_lshr_b32 [[VEC_HI:s[0-9]+]], [[VEC]], 16
[all …]
Dshl.v2i16.ll13 ; VI: s_lshr_b32
14 ; VI: s_lshr_b32
25 ; CI: s_lshr_b32
27 ; CI: s_lshr_b32
Dlshr.v2i16.ll13 ; CIVI: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
14 ; CIVI: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
15 ; CIVI: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
Dload-constant-i16.ll148 ; GCN-DAG: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
230 ; GCN-DAG: s_lshr_b32
279 ; GCN-DAG: s_lshr_b32
347 ; GCN-DAG: s_lshr_b32
377 ; GCN-DAG: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
Dfabs.f16.ll57 ; GCN-DAG: s_lshr_b32 [[IN1:s[0-9]+]], [[IN0]], 16
132 ; CI: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
Dsext-in-reg.ll530 ; GFX89: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 15
549 ; GFX89: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 14
610 ; GFX89: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 14{{$}}
627 ; GFX89: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 8{{$}}
644 ; GFX89: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 1{{$}}
Dpartial-shift-shrink.ll92 ; GCN: s_lshr_b32 [[VAL_SHIFT:s[0-9]+]], [[VAL]], 16
/external/llvm/test/CodeGen/AMDGPU/
Dlshr.ll4 ;CHECK: s_lshr_b32 s{{[0-9]}}, s{{[0-9]}}, 1
Dload-constant-i16.ll130 ; GCN-DAG: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
179 ; GCN-DAG: s_lshr_b32
219 ; GCN-DAG: s_lshr_b32
241 ; GCN-DAG: s_lshr_b32
264 ; GCN: s_lshr_b32 s{{[0-9]+}}, s{{[0-9]+}}, 16
/external/llvm/test/MC/AMDGPU/
Dtrap.s61 s_lshr_b32 ttmp8, ttmp8, 12 label
Dsop2.s115 s_lshr_b32 s2, s4, s6 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dtrap.s80 s_lshr_b32 ttmp8, ttmp8, 12 label
Dsop2.s121 s_lshr_b32 s2, s4, s6 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dsop2_vi.txt57 # VI: s_lshr_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8f]
Dtrap_vi.txt46 # VI: s_lshr_b32 ttmp8, ttmp8, 12 ; encoding: [0x78,0x8c,0x78,0x8f]
Dtrap_gfx9.txt40 # GFX9: s_lshr_b32 ttmp8, ttmp8, 12 ; encoding: [0x74,0x8c,0x74,0x8f]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dsop2_vi.txt57 # VI: s_lshr_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8f]
Dtrap_vi.txt46 # VI: s_lshr_b32 ttmp8, ttmp8, 12 ; encoding: [0x78,0x8c,0x78,0x8f]

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