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Searched refs:shuffle3 (Results 1 – 7 of 7) sorted by relevance

/external/libhevc/common/x86/
Dihevc_tables_x86_intr.c116 const WORD32 shuffle3[4] = { 0x80808080, 0x0b0a0908, 0x0f0e0d0c, 0x80808080 }; variable
Dihevc_deblk_ssse3_intr.c509 tmp1_const_8x16b = _mm_load_si128((__m128i *)shuffle3); in ihevc_deblk_luma_vert_ssse3()
/external/libhevc/common/
Dihevc_tables_x86_intr.h64 extern MEM_ALIGN16 const WORD32 shuffle3[4];
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Davx512-load-store.ll191 %shuffle3.i = shufflevector <8 x double> %3, <8 x double> undef, <2 x i32> <i32 0, i32 1>
192 ret <2 x double> %shuffle3.i
352 %shuffle3.i = insertelement <2 x double> %__A, double 0.000000e+00, i32 1
357 …m.masked.load.v2f64.p0v2f64(<2 x double>* %0, i32 1, <2 x i1> %extract.i, <2 x double> %shuffle3.i)
Davx512-intrinsics-fast-isel.ll6464 %shuffle3.i = shufflevector <4 x i64> %add.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
6465 %add4.i = add <2 x i64> %shuffle2.i, %shuffle3.i
6544 %shuffle3.i = shufflevector <4 x i64> %mul.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
6545 %mul4.i = mul <2 x i64> %shuffle2.i, %shuffle3.i
6582 %shuffle3.i = shufflevector <4 x i64> %or.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
6583 %or4.i = or <2 x i64> %shuffle2.i, %shuffle3.i
6620 %shuffle3.i = shufflevector <4 x i64> %and.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
6621 %and4.i = and <2 x i64> %shuffle2.i, %shuffle3.i
6665 %shuffle3.i = shufflevector <4 x i64> %add.i, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
6666 %add4.i = add <2 x i64> %shuffle2.i, %shuffle3.i
[all …]
DMergeConsecutiveStores.ll740 …%shuffle3 = shufflevector <8 x float> %v2, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 …
744 store <4 x float> %shuffle3, <4 x float>* %idx3, align 16
/external/llvm/test/CodeGen/X86/
DMergeConsecutiveStores.ll483 …%shuffle3 = shufflevector <8 x float> %v2, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 …
487 store <4 x float> %shuffle3, <4 x float>* %idx3, align 16