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/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td92 defm S_MOV_B32 : SOP1_32 <sop1<0x03, 0x00>, "s_mov_b32", []>;
93 defm S_MOV_B64 : SOP1_64 <sop1<0x04, 0x01>, "s_mov_b64", []>;
97 defm S_CMOV_B32 : SOP1_32 <sop1<0x05, 0x02>, "s_cmov_b32", []>;
98 defm S_CMOV_B64 : SOP1_64 <sop1<0x06, 0x03>, "s_cmov_b64", []>;
103 defm S_NOT_B32 : SOP1_32 <sop1<0x07, 0x04>, "s_not_b32",
107 defm S_NOT_B64 : SOP1_64 <sop1<0x08, 0x05>, "s_not_b64",
110 defm S_WQM_B32 : SOP1_32 <sop1<0x09, 0x06>, "s_wqm_b32", []>;
111 defm S_WQM_B64 : SOP1_64 <sop1<0x0a, 0x07>, "s_wqm_b64", []>;
115 defm S_BREV_B32 : SOP1_32 <sop1<0x0b, 0x08>, "s_brev_b32",
118 defm S_BREV_B64 : SOP1_64 <sop1<0x0c, 0x09>, "s_brev_b64", []>;
[all …]
DSIInstrInfo.td57 class sop1 <bits<8> si, bits<8> vi = si> {
724 class SOP1_Real_si <sop1 op, string opName, dag outs, dag ins, string asm> :
734 class SOP1_Real_vi <sop1 op, string opName, dag outs, dag ins, string asm> :
744 multiclass SOP1_m <sop1 op, string opName, dag outs, dag ins, string asm,
755 multiclass SOP1_32 <sop1 op, string opName, list<dag> pattern> : SOP1_m <
760 multiclass SOP1_64 <sop1 op, string opName, list<dag> pattern> : SOP1_m <
766 multiclass SOP1_64_0 <sop1 op, string opName, list<dag> pattern> {
781 multiclass SOP1_1 <sop1 op, string opName, list<dag> pattern> {
796 multiclass SOP1_32_64 <sop1 op, string opName, list<dag> pattern> : SOP1_m <
802 multiclass SOP1_64_32 <sop1 op, string opName, list<dag> pattern> : SOP1_m <
/external/elfutils/src/
Dreadelf.c6162 int64_t sop1; in print_cfa_program() local
6320 get_sleb128 (sop1, readp, endp); in print_cfa_program()
6321 printf (" def_cfa_offset_sf %" PRId64 "\n", sop1 * data_align); in print_cfa_program()