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Searched refs:stx (Results 1 – 25 of 34) sorted by relevance

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/external/strace/
Dstatx.c62 stx.field.sec, stx.field.nsec); \ in SYS_FUNC()
63 tprints_comment(sprinttime_nsec(stx.field.sec, \ in SYS_FUNC()
64 zero_extend_signed_to_ull(stx.field.nsec))); \ in SYS_FUNC()
67 struct_statx stx; in SYS_FUNC() local
68 if (umove_or_printaddr(tcp, tcp->u_arg[4], &stx)) in SYS_FUNC()
72 printflags(statx_masks, stx.stx_mask, "STATX_???"); in SYS_FUNC()
75 PRINT_FIELD_U(", ", stx, stx_blksize); in SYS_FUNC()
78 printflags(statx_attrs, stx.stx_attributes, "STATX_ATTR_???"); in SYS_FUNC()
81 PRINT_FIELD_U(", ", stx, stx_nlink); in SYS_FUNC()
82 printuid(", stx_uid=", stx.stx_uid); in SYS_FUNC()
[all …]
/external/elfutils/tests/
Dtestfile-bpf-dis1.expect.bz2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
Dvarargs.ll10 ; CHECK: stx %i5, [%fp+2215]
11 ; CHECK: stx %i4, [%fp+2207]
12 ; CHECK: stx %i3, [%fp+2199]
13 ; CHECK: stx %i2, [%fp+2191]
16 ; stx [[R]], [%fp+2039]
38 ; stx %[[AP2]], [%fp+2039]
48 ; stx %[[AP2]], [%fp+2039]
D64spill.ll8 ; CHECK: stx [[R]], [%fp+{{.+}}]
19 ; CHECK: stx [[R]], [%fp+{{.+}}]
30 ; CHECK: stx [[R]], [%fp+{{.+}}]
42 ; CHECK: stx [[R]], [%fp+{{.+}}]
53 ; CHECK: stx [[R]], [%fp+{{.+}}]
64 ; CHECK: stx [[R]], [%fp+{{.+}}]
75 ; CHECK: stx [[R]], [%fp+{{.+}}]
86 ; CHECK: stx [[R]], [%fp+{{.+}}]
97 ; CHECK: stx [[R]], [%fp+{{.+}}]
108 ; CHECK: stx [[R]], [%fp+{{.+}}]
D64abi.ll14 ; CHECK: stx %i4, [%i4]
17 ; CHECK: stx [[R2]], [%i4]
48 ; CHECK: stx [[R]], [%sp+2223]
109 ; SOFT: stx %i1, [%sp+2311]
110 ; SOFT: stx %i0, [%sp+2303]
111 ; SOFT: stx %i2, [%sp+2295]
112 ; SOFT: stx %i2, [%sp+2287]
113 ; SOFT: stx %i2, [%sp+2279]
114 ; SOFT: stx %i2, [%sp+2271]
115 ; SOFT: stx %i2, [%sp+2263]
[all …]
D64bit.ll135 ; CHECK: stx %
139 ; CHECK: stx %
174 ; CHECK: stx [[R]], [%i0+16]
251 ; CHECK: stx
267 ; CHECK: stx
275 ; CHECK: stx %g0, [%i0]
276 ; CHECK: stx %g0, [%i1+8]
279 ; OPT: stx %g0, [%o0]
280 ; OPT: stx %g0, [%o1+8]
Dspillsize.ll8 ; CHECK: stx %{{..}}, [%fp+
9 ; CHECK: stx %{{..}}, [%fp+
/external/llvm/test/CodeGen/SPARC/
Dvarargs.ll10 ; CHECK: stx %i5, [%fp+2215]
11 ; CHECK: stx %i4, [%fp+2207]
12 ; CHECK: stx %i3, [%fp+2199]
13 ; CHECK: stx %i2, [%fp+2191]
16 ; stx [[R]], [%fp+2039]
38 ; stx %[[AP2]], [%fp+2039]
48 ; stx %[[AP2]], [%fp+2039]
D64spill.ll8 ; CHECK: stx [[R]], [%fp+{{.+}}]
19 ; CHECK: stx [[R]], [%fp+{{.+}}]
30 ; CHECK: stx [[R]], [%fp+{{.+}}]
42 ; CHECK: stx [[R]], [%fp+{{.+}}]
53 ; CHECK: stx [[R]], [%fp+{{.+}}]
64 ; CHECK: stx [[R]], [%fp+{{.+}}]
75 ; CHECK: stx [[R]], [%fp+{{.+}}]
86 ; CHECK: stx [[R]], [%fp+{{.+}}]
97 ; CHECK: stx [[R]], [%fp+{{.+}}]
108 ; CHECK: stx [[R]], [%fp+{{.+}}]
D64abi.ll14 ; CHECK: stx %i4, [%i4]
17 ; CHECK: stx [[R2]], [%i4]
48 ; CHECK: stx [[R]], [%sp+2223]
109 ; SOFT: stx %i1, [%sp+2311]
110 ; SOFT: stx %i0, [%sp+2303]
111 ; SOFT: stx %i2, [%sp+2295]
112 ; SOFT: stx %i2, [%sp+2287]
113 ; SOFT: stx %i2, [%sp+2279]
114 ; SOFT: stx %i2, [%sp+2271]
115 ; SOFT: stx %i2, [%sp+2263]
[all …]
D64bit.ll135 ; CHECK: stx %
139 ; CHECK: stx %
174 ; CHECK: stx [[R]], [%i0+16]
251 ; CHECK: stx
267 ; CHECK: stx
275 ; CHECK: stx %g0, [%i0]
276 ; CHECK: stx %g0, [%i1+8]
279 ; OPT: stx %g0, [%o0]
280 ; OPT: stx %g0, [%o1+8]
Dspillsize.ll8 ; CHECK: stx %{{..}}, [%fp+
9 ; CHECK: stx %{{..}}, [%fp+
/external/python/cpython2/Modules/_ctypes/libffi/src/sparc/
Dv9.S91 stx %o0, [%i4+0] ! (delay)
115 stx %o0, [%i4+0]
116 stx %o1, [%i4+8]
117 stx %o2, [%i4+16]
118 stx %o3, [%i4+24]
151 stx %i0, [FP+128+0]
152 stx %i1, [FP+128+8]
153 stx %i2, [FP+128+16]
154 stx %i3, [FP+128+24]
155 stx %i4, [FP+128+32]
[all …]
/external/libffi/src/sparc/
Dv9.S91 stx %o0, [%i4+0] ! (delay)
115 stx %o0, [%i4+0]
116 stx %o1, [%i4+8]
117 stx %o2, [%i4+16]
118 stx %o3, [%i4+24]
151 stx %i0, [FP+128+0]
152 stx %i1, [FP+128+8]
153 stx %i2, [FP+128+16]
154 stx %i3, [FP+128+24]
155 stx %i4, [FP+128+32]
[all …]
/external/cblas/src/
Dcblas_chpr2.c33 *yy=(float *)Y, *tx, *ty, *stx, *sty; in cblas_chpr2() local
82 stx= x+n; in cblas_chpr2()
86 stx = x-2; in cblas_chpr2()
108 while (x != stx); in cblas_chpr2()
Dcblas_cher2.c33 *yy=(float *)Y, *tx, *ty, *stx, *sty; in cblas_cher2() local
83 stx= x+n; in cblas_cher2()
87 stx = x-2; in cblas_cher2()
109 while (x != stx); in cblas_cher2()
Dcblas_zher2.c33 *yy=(double *)Y, *tx, *ty, *stx, *sty; in cblas_zher2() local
83 stx= x+n; in cblas_zher2()
87 stx = x-2; in cblas_zher2()
109 while (x != stx); in cblas_zher2()
Dcblas_cgemv.c39 const float *stx = x; in cblas_cgemv() local
123 stx = x; in cblas_cgemv()
125 else stx = (const float *)X; in cblas_cgemv()
138 F77_cgemv(F77_TA, &F77_N, &F77_M, ALPHA, A, &F77_lda, stx, in cblas_cgemv()
Dcblas_zhpr2.c33 *yy=(double *)Y, *stx, *sty; in cblas_zhpr2() local
77 stx = x + n; in cblas_zhpr2()
94 } while (x != stx); in cblas_zhpr2()
/external/linux-kselftest/tools/testing/selftests/proc/
Dfd-003-kthread.c117 unsigned int mask, void *stx) in sys_statx() argument
119 return syscall(SYS_statx, dirfd, pathname, flags, mask, stx); in sys_statx()
124 char stx[256] __attribute__((aligned(8))); in test_lookup_fail() local
127 rv = sys_statx(fd, pathname, AT_SYMLINK_NOFOLLOW, 0, (void *)stx); in test_lookup_fail()
/external/llvm/test/MC/Disassembler/Sparc/
Dsparc-mem.txt195 # CHECK: stx %o2, [%i0+%l6]
198 # CHECK: stx %o2, [%i0+32]
201 # CHECK: stx %o2, [%g1]
204 # CHECK: stx %o2, [%g1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Sparc/
Dsparc-mem.txt195 # CHECK: stx %o2, [%i0+%l6]
198 # CHECK: stx %o2, [%i0+32]
201 # CHECK: stx %o2, [%g1]
204 # CHECK: stx %o2, [%g1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Sparc/
Dsparcv9-instructions.s105 ! V8-NEXT: stx %fsr,[%g2 + 20]
106 ! V9: stx %fsr, [%g2+20] ! encoding: [0xc3,0x28,0xa0,0x14]
107 stx %fsr,[%g2 + 20]
110 ! V8-NEXT: stx %fsr,[%g2 + %i5]
111 ! V9: stx %fsr, [%g2+%i5] ! encoding: [0xc3,0x28,0x80,0x1d]
112 stx %fsr,[%g2 + %i5]
/external/llvm/test/MC/Sparc/
Dsparcv9-instructions.s105 ! V8-NEXT: stx %fsr,[%g2 + 20]
106 ! V9: stx %fsr, [%g2+20] ! encoding: [0xc3,0x28,0xa0,0x14]
107 stx %fsr,[%g2 + 20]
110 ! V8-NEXT: stx %fsr,[%g2 + %i5]
111 ! V9: stx %fsr, [%g2+%i5] ! encoding: [0xc3,0x28,0x80,0x1d]
112 stx %fsr,[%g2 + %i5]
/external/u-boot/arch/arm/include/asm/arch-lpc32xx/
Di2c.h22 u32 stx; member

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