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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Ddetect-dead-lanes.mir12 # CHECK: S_NOP 0, implicit undef %3.sub2
34 S_NOP 0, implicit %3.sub2
45 # CHECK: %0:sreg_128 = REG_SEQUENCE $sgpr0, %subreg.sub0, $sgpr0, %subreg.sub2
50 # CHECK: S_NOP 0, implicit %1.sub2
59 # CHECK: S_NOP 0, implicit %4.sub2
90 %0 = REG_SEQUENCE $sgpr0, %subreg.sub0, $sgpr0, %subreg.sub2
95 S_NOP 0, implicit %1.sub2
104 S_NOP 0, implicit %4.sub2
140 # CHECK: S_NOP 0, implicit %9.sub2
189 S_NOP 0, implicit %9.sub2
[all …]
Dspill-empty-live-interval.mir47 # CHECK: undef %3.sub2:vreg_128 = V_MOV_B32_e32 1786773504, implicit $exec
50 # CHECK-NEXT: S_NOP 0, implicit %3.sub2
52 # CHECK-NEXT: undef %4.sub2:vreg_128 = V_MOV_B32_e32 0, implicit $exec
53 # CHECK-NEXT: S_NOP 0, implicit %4.sub2
65 undef %0.sub2 = V_MOV_B32_e32 0, implicit $exec
66 undef %3.sub2 = V_MOV_B32_e32 1786773504, implicit $exec
69 S_NOP 0, implicit %3.sub2
71 S_NOP 0, implicit %0.sub2
Dcoalescing-with-subregs-in-loop-bug.mir5 # Inside the loop, %29.sub2 is used in a V_LSHLREV whose result is then used
14 # %39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec
25 # in the loop, but the sub2 used in the V_LSHLREV is not modified in the loop.
27 # The bug is that the coalesced value has a L00000004 subrange (for sub2) that
29 # Rename Independent Subregs separates sub2 into its own register, and it is
34 # GCN: V_LSHLREV_B32_e32 2, [[val:%[0-9][0-9]*]].sub2
51 %28.sub2:vreg_128 = COPY killed %11
66 %39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec
94 %32.sub2:vreg_128 = COPY %33
Dcoalescer-identical-values-undef.mir13 undef %0.sub2:sreg_128 = COPY $sgpr4
19 %0.sub0:sreg_128 = COPY %0.sub2
20 %0.sub1:sreg_128 = COPY %0.sub2
28 $sgpr2 = COPY %0.sub2
Drename-independent-subregs-mac-operands.mir55 %13.sub2 = COPY killed %8
61 FLAT_STORE_DWORD undef %10, %1.sub2, 0, 0, 0, implicit $exec, implicit $flat_scr
78 # GCN: undef %9.sub2:vreg_128 = COPY %7.sub0
85 # GCN: BUFFER_STORE_DWORD_OFFEN %9.sub2, %0,
115 %6.sub2 = COPY %6.sub0
125 %6.sub2 = COPY %6.sub0
129 … BUFFER_STORE_DWORD_OFFEN %6.sub2, %0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 8, 0, 0, 0, implicit $exec
Dcoalescer-extend-pruned-subrange.mir17 %3.sub2:sreg_128 = COPY %0
29 %13:vgpr_32 = V_OR_B32_e32 %11, %12.sub2, implicit $exec
49 %22.sub2:sreg_128 = COPY %8
69 %25:vgpr_32 = V_AND_B32_e32 target-flags(amdgpu-gotprel32-hi) 1, %10.sub2, implicit $exec
100 %40.sub2:vreg_128 = COPY %38
Dcoalescer-subranges-another-copymi-not-live.mir47 %9.sub2:sreg_128 = COPY %8
58 %12.sub2:sreg_128 = COPY %11
118 undef %25.sub2:vreg_128 = COPY killed %17.sub2
122 %27.sub2:sreg_256 = COPY %26
Dcoalescer-subregjoin-fullcopy.mir70 undef %11.sub2:sreg_128 = COPY %4
74 %13.sub2:vreg_128 = COPY %9.sub2
163 …dead %59:vgpr_32 = V_FMA_F32 0, killed %9.sub2, 0, undef %60:vgpr_32, 0, undef %61:vgpr_32, 0, 0, …
166 %66.sub2:vreg_128 = COPY %13.sub2
Dsubreg-split-live-in-error.mir59 %3.sub2:vreg_128 = COPY %3.sub0
91 %11.sub2:sreg_256 = COPY %11.sub0
107 %15.sub2:vreg_128 = COPY %15.sub0
119 %15.sub2:vreg_128 = COPY %15.sub0
126 %15.sub2:vreg_128 = COPY %15.sub0
215 …%53:vgpr_32 = V_MAC_F32_e32 target-flags(amdgpu-gotprel32-hi) 1065353216, %3.sub2, %53, implicit $…
250 %61.sub2:sreg_256 = COPY %61.sub0
264 %63:vgpr_32 = V_MAC_F32_e32 %15.sub2, %62, %63, implicit $exec
/external/snakeyaml/src/test/java/org/yaml/snakeyaml/ruby/
DTestObject.java20 private Sub2 sub2; field in TestObject
31 return sub2; in getSub2()
34 public void setSub2(Sub2 sub2) { in setSub2() argument
35 this.sub2 = sub2; in setSub2()
/external/llvm/test/CodeGen/AMDGPU/
Ddetect-dead-lanes.mir22 # CHECK: S_NOP 0, implicit undef %3:sub2
45 S_NOP 0, implicit %3:sub2
61 # CHECK: S_NOP 0, implicit %1:sub2
70 # CHECK: S_NOP 0, implicit %4:sub2
102 %0 = REG_SEQUENCE %sgpr0, %subreg.sub0, %sgpr0, %subreg.sub2
107 S_NOP 0, implicit %1:sub2
116 S_NOP 0, implicit %4:sub2
152 # CHECK: S_NOP 0, implicit %9:sub2
202 S_NOP 0, implicit %9:sub2
308 %3 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2
[all …]
/external/icu/android_icu4j/src/main/java/android/icu/text/
DNFRule.java111 private NFSubstitution sub2 = null; field in NFRule
422 sub2 = null; in extractSubstitutions()
425 sub2 = extractSubstitution(owner, predecessor); in extractSubstitutions()
543 if (sub2 != null) { in setBaseValue()
544 sub2.setDivisor(radix, exponent); in setBaseValue()
624 && Objects.equals(sub2, that2.sub2); in equals()
691 if (sub2 != null) { in toString()
692 ruleTextCopy.insert(sub2.getPos(), sub2.toString()); in toString()
771 if (sub2 != null) { in doFormat()
772 …sub2.doSubstitution(number, toInsertInto, pos - (sub2.getPos() > pluralRuleStart ? lengthOffset : … in doFormat()
[all …]
/external/icu/icu4j/main/classes/core/src/com/ibm/icu/text/
DNFRule.java110 private NFSubstitution sub2 = null; field in NFRule
421 sub2 = null; in extractSubstitutions()
424 sub2 = extractSubstitution(owner, predecessor); in extractSubstitutions()
542 if (sub2 != null) { in setBaseValue()
543 sub2.setDivisor(radix, exponent); in setBaseValue()
623 && Objects.equals(sub2, that2.sub2); in equals()
690 if (sub2 != null) { in toString()
691 ruleTextCopy.insert(sub2.getPos(), sub2.toString()); in toString()
770 if (sub2 != null) { in doFormat()
771 …sub2.doSubstitution(number, toInsertInto, pos - (sub2.getPos() > pluralRuleStart ? lengthOffset : … in doFormat()
[all …]
/external/icu/icu4c/source/i18n/
Dnfrule.cpp44 , sub2(NULL) in NFRule()
55 if (sub1 != sub2) { in ~NFRule()
56 delete sub2; in ~NFRule()
57 sub2 = NULL; in ~NFRule()
425 sub2 = NULL; in extractSubstitutions()
428 sub2 = extractSubstitution(ruleSet, predecessor, status); in extractSubstitutions()
555 if (sub2 != NULL) { in setBaseValue()
556 sub2->setDivisor(radix, exponent, status); in setBaseValue()
617 util_equalSubstitutions(const NFSubstitution* sub1, const NFSubstitution* sub2) in util_equalSubstitutions() argument
620 if (sub2) { in util_equalSubstitutions()
[all …]
/external/smali/dexlib2/src/test/java/org/jf/dexlib2/analysis/
DCommonSuperclassTest.java207 String sub2 = "Liface/sub2;"; in testGetCommonSuperclass_interfaces() local
224 superclassTest(base1, base1, sub2); in testGetCommonSuperclass_interfaces()
234 superclassTest(unknown, sub2, iface1); in testGetCommonSuperclass_interfaces()
239 superclassTest(base2, base2, sub2); in testGetCommonSuperclass_interfaces()
247 superclassTest(sub2, sub2, classsub2); in testGetCommonSuperclass_interfaces()
254 superclassTest(object, sub2, classsub4); in testGetCommonSuperclass_interfaces()
257 superclassTest(sub1, sub2, sub1); in testGetCommonSuperclass_interfaces()
260 superclassTest(sub2, sub2, classsub1234); in testGetCommonSuperclass_interfaces()
/external/tensorflow/tensorflow/python/kernel_tests/distributions/
Dkullback_leibler_test.py132 sub2 = Sub2(loc=0.0, scale=1.0)
136 self.assertEqual("sub1-2", fn(sub1, sub2))
137 self.assertEqual("sub2-1", fn(sub2, sub1))
140 self.assertEqual("sub1-2", fn(sub11, sub2))
142 self.assertEqual("sub1-2", fn(sub11, sub2))
143 self.assertEqual("sub2-1", fn(sub2, sub11))
/external/tensorflow/tensorflow/go/op/
Dscope_test.go30 sub2 = root.SubScope("x")
32 sub2a = sub2.SubScope("y")
41 {sub2, "x_1/Const"},
134 sub2 = sub1.SubScope("y")
142 if err := sub2.Err(); err == nil {
/external/llvm/test/CodeGen/X86/
Dsse3-avx-addsub-2.ll23 %sub2 = fsub float %3, %4
33 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %sub2, i32 2
49 %sub2 = fsub float %1, %2
53 %vecinsert1 = insertelement <4 x float> undef, float %sub2, i32 2
112 %sub2 = fsub float %1, %2
116 %vecinsert1 = insertelement <4 x float> undef, float %sub2, i32 0
136 %sub2 = fsub float %3, %4
146 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %sub2, i32 2
166 %sub2 = fsub double %3, %4
176 %vecinsert4 = insertelement <4 x double> %vecinsert3, double %sub2, i32 2
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dcortex-a57-misched-vfma.ll117 %sub2 = fsub float %sub1, %mul3
118 ret float %sub2
156 %sub2 = fsub <2 x float> %sub1, %mul3
157 ret <2 x float> %sub2
194 %sub2 = fsub float %sub1, %f2
195 ret float %sub2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dsse3-avx-addsub-2.ll24 %sub2 = fsub float %3, %4
34 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %sub2, i32 2
50 %sub2 = fsub float %1, %2
54 %vecinsert1 = insertelement <4 x float> undef, float %sub2, i32 2
113 %sub2 = fsub float %1, %2
117 %vecinsert1 = insertelement <4 x float> undef, float %sub2, i32 0
137 %sub2 = fsub float %3, %4
147 %vecinsert4 = insertelement <4 x float> %vecinsert3, float %sub2, i32 2
167 %sub2 = fsub double %3, %4
177 %vecinsert4 = insertelement <4 x double> %vecinsert3, double %sub2, i32 2
[all …]
Dfmaddsub-combine.ll147 %sub2 = fsub float %A2, %B2
156 %vecinsert3 = insertelement <4 x float> %vecinsert2, float %sub2, i32 2
201 %sub2 = fsub float %A2, %B2
222 %vecinsert3 = insertelement <8 x float> %vecinsert2, float %sub2, i32 2
248 %sub2 = fsub double %A2, %B2
257 %vecinsert3 = insertelement <4 x double> %vecinsert2, double %sub2, i32 2
286 %sub2 = fsub float %A2, %B2
331 %vecinsert3 = insertelement <16 x float> %vecinsert2, float %sub2, i32 2
372 %sub2 = fsub double %A2, %B2
390 %vecinsert3 = insertelement <8 x double> %vecinsert2, double %sub2, i32 2
[all …]
/external/cldr/tools/java/org/unicode/cldr/draft/
DXLocaleDistance.java363 Map<String, DistanceNode> sub2 = subtables.get(desired); in getDistance() local
364 if (sub2 == null) { in getDistance()
365 sub2 = subtables.get(ANY); // <*, supported> in getDistance()
368 DistanceNode value = sub2.get(supported); // <*/desired, supported> in getDistance()
370 value = sub2.get(ANY); // <*/desired, *> in getDistance()
372 sub2 = subtables.get(ANY); // <*, supported> in getDistance()
373 value = sub2.get(supported); in getDistance()
375 value = sub2.get(ANY); // <*, *> in getDistance()
396 Map<String, DistanceNode> sub2 = subtables.get(desired); in addSubtable() local
397 if (sub2 == null) { in addSubtable()
[all …]
/external/llvm/test/Transforms/Reassociate/
D2012-06-08-InfiniteLoop.ll9 %b.0 = phi i32 [ undef, %entry ], [ %sub2, %while.body ]
15 %sub2 = sub nsw i32 %sub, %c.0
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/
D2012-06-08-InfiniteLoop.ll9 %b.0 = phi i32 [ undef, %entry ], [ %sub2, %while.body ]
15 %sub2 = sub nsw i32 %sub, %c.0
/external/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.td137 def SGPR_128Regs : RegisterTuples<[sub0, sub1, sub2, sub3],
144 def SGPR_256 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7],
155 def SGPR_512 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7,
186 def TTMP_128Regs : RegisterTuples<[sub0, sub1, sub2, sub3],
204 def VGPR_96 : RegisterTuples<[sub0, sub1, sub2],
210 def VGPR_128 : RegisterTuples<[sub0, sub1, sub2, sub3],
217 def VGPR_256 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7],
228 def VGPR_512 : RegisterTuples<[sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7,

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