Searched refs:tcs_out_offsets (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state_draw.c | 116 unsigned tcs_in_layout, tcs_out_layout, tcs_out_offsets; in si_emit_derived_tess_state() local
237 tcs_out_offsets = (output_patch0_offset / 16) | in si_emit_derived_tess_state()
270 radeon_emit(cs, tcs_out_offsets); in si_emit_derived_tess_state()
290 radeon_emit(cs, tcs_out_offsets); in si_emit_derived_tess_state()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_private.h | 1182 uint32_t tcs_out_offsets; member
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| D | radv_pipeline.c | 1455 tess->tcs_out_offsets = (output_patch0_offset / 16) | in calculate_tess_state()
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| D | radv_cmd_buffer.c | 880 radeon_emit(cmd_buffer->cs, pipeline->graphics.tess.tcs_out_offsets); in radv_emit_tess_shaders()
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| /external/mesa3d/src/amd/common/ |
| D | ac_nir_to_llvm.c | 108 LLVMValueRef tcs_out_offsets; member
459 unpack_param(&ctx->ac, ctx->tcs_out_offsets, 0, 16), in get_tcs_out_patch0_offset()
467 unpack_param(&ctx->ac, ctx->tcs_out_offsets, 16, 16), in get_tcs_out_patch0_patch_data_offset()
878 &ctx->tcs_out_offsets); in create_function()
903 &ctx->tcs_out_offsets); in create_function()
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