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Searched refs:test_v8i16 (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dvec_mul.ll26 define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) {
32 ; CHECK-LABEL: test_v8i16:
35 ; CHECK-LE-LABEL: test_v8i16:
38 ; CHECK-VSX-LABEL: test_v8i16:
41 ; CHECK-LE-VSX-LABEL: test_v8i16:
Dvec_clz.ll18 define <8 x i16> @test_v8i16(<8 x i16> %x) nounwind readnone {
21 ; CHECK: @test_v8i16
/external/llvm/test/CodeGen/PowerPC/
Dvec_mul.ll26 define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) {
32 ; CHECK-LABEL: test_v8i16:
35 ; CHECK-LE-LABEL: test_v8i16:
38 ; CHECK-VSX-LABEL: test_v8i16:
41 ; CHECK-LE-VSX-LABEL: test_v8i16:
Dvec_clz.ll18 define <8 x i16> @test_v8i16(<8 x i16> %x) nounwind readnone {
21 ; CHECK: @test_v8i16
/external/clang/test/CodeGen/
Dppc64-vector.c37 v8i16 test_v8i16(v8i16 x) in test_v8i16() function
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Dvec_mul.ll11 define <8 x i16> @test_v8i16(<8 x i16>* %X, <8 x i16>* %Y) {
/external/llvm/test/CodeGen/X86/
Dfast-isel-vecload.ll18 define <8 x i16> @test_v8i16(<8 x i16>* %V) {
19 ; ALL-LABEL: test_v8i16:
Dnontemporal-loads.ll116 define <8 x i16> @test_v8i16(<8 x i16>* %src) {
117 ; SSE2-LABEL: test_v8i16:
122 ; SSE41-LABEL: test_v8i16:
127 ; AVX-LABEL: test_v8i16:
132 ; AVX512-LABEL: test_v8i16:
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dvec_shuffle.ll23 define void @test_v8i16(<2 x i64>* %res, <2 x i64>* %A) nounwind {
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dfast-isel-vecload.ll35 define <8 x i16> @test_v8i16(<8 x i16>* %V) {
36 ; SSE-LABEL: test_v8i16:
41 ; AVXONLY-LABEL: test_v8i16:
46 ; KNL-LABEL: test_v8i16:
51 ; SKX-LABEL: test_v8i16:
Dvector-reduce-add.ll445 define i16 @test_v8i16(<8 x i16> %a0) {
446 ; SSE2-LABEL: test_v8i16:
459 ; SSE41-LABEL: test_v8i16:
470 ; AVX-LABEL: test_v8i16:
481 ; AVX512-LABEL: test_v8i16:
Dvector-reduce-and.ll395 define i16 @test_v8i16(<8 x i16> %a0) {
396 ; SSE-LABEL: test_v8i16:
409 ; AVX-LABEL: test_v8i16:
421 ; AVX512-LABEL: test_v8i16:
Dvector-reduce-or.ll395 define i16 @test_v8i16(<8 x i16> %a0) {
396 ; SSE-LABEL: test_v8i16:
409 ; AVX-LABEL: test_v8i16:
421 ; AVX512-LABEL: test_v8i16:
Dvector-reduce-xor.ll395 define i16 @test_v8i16(<8 x i16> %a0) {
396 ; SSE-LABEL: test_v8i16:
409 ; AVX-LABEL: test_v8i16:
421 ; AVX512-LABEL: test_v8i16:
Dnontemporal-loads.ll106 define <8 x i16> @test_v8i16(<8 x i16>* %src) {
107 ; SSE2-LABEL: test_v8i16:
112 ; SSE41-LABEL: test_v8i16:
117 ; AVX-LABEL: test_v8i16:
122 ; AVX512-LABEL: test_v8i16:
Dvector-reduce-umax.ll1148 define i16 @test_v8i16(<8 x i16> %a0) {
1149 ; SSE2-LABEL: test_v8i16:
1172 ; SSE41-LABEL: test_v8i16:
1182 ; AVX-LABEL: test_v8i16:
1192 ; AVX512BW-LABEL: test_v8i16:
1203 ; AVX512VL-LABEL: test_v8i16:
Dvector-reduce-smax.ll1031 define i16 @test_v8i16(<8 x i16> %a0) {
1032 ; SSE2-LABEL: test_v8i16:
1045 ; SSE41-LABEL: test_v8i16:
1055 ; AVX-LABEL: test_v8i16:
1065 ; AVX512-LABEL: test_v8i16:
Dvector-reduce-smin.ll1030 define i16 @test_v8i16(<8 x i16> %a0) {
1031 ; SSE2-LABEL: test_v8i16:
1044 ; SSE41-LABEL: test_v8i16:
1054 ; AVX-LABEL: test_v8i16:
1064 ; AVX512-LABEL: test_v8i16:
Dvector-reduce-umin.ll1147 define i16 @test_v8i16(<8 x i16> %a0) {
1148 ; SSE2-LABEL: test_v8i16:
1171 ; SSE41-LABEL: test_v8i16:
1178 ; AVX-LABEL: test_v8i16:
1185 ; AVX512-LABEL: test_v8i16:
/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/
Dvecinsert.ll31 define <8 x i16> @test_v8i16(<8 x i16> %P, i16 %x) {
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dcttz_vector.ll111 define void @test_v8i16(<8 x i16>* %p) {
112 ; CHECK-LABEL: test_v8i16:
/external/llvm/test/CodeGen/ARM/
Dcttz_vector.ll111 define void @test_v8i16(<8 x i16>* %p) {
112 ; CHECK-LABEL: test_v8i16:
/external/llvm/test/Analysis/CostModel/X86/
Dalternate-shuffle-cost.ll205 define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) {
209 ; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i16':
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/
Dalternate-shuffle-cost.ll406 define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) {
407 ; SSE2-LABEL: 'test_v8i16'
411 ; SSSE3-LABEL: 'test_v8i16'
415 ; SSE42-LABEL: 'test_v8i16'
419 ; AVX-LABEL: 'test_v8i16'
423 ; BTVER2-LABEL: 'test_v8i16'
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dhadd.ll147 define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) {
148 ; CHECK-LABEL: @test_v8i16(

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