| /external/webrtc/webrtc/modules/audio_processing/aecm/ |
| D | aecm_core_mips.c | 1257 int16_t tmp16, tmp161, tmp162, tmp163, nrsh1, nrsh2; in ComfortNoise() local
1460 : [tmp16] "=&r" (tmp16), [tmp161] "=&r" (tmp161), [tmp1] "+r" (tmp1), in ComfortNoise()
1482 : [tmp16] "r" (tmp16), [tmp161] "r" (tmp161), [tmp32] "r" (tmp32), in ComfortNoise()
1496 [tmp16] "=r" (tmp16), [tmp161] "=r" (tmp161), [tmp321] "=&r" (tmp321) in ComfortNoise()
1504 tmp322 = WebRtcAecm_kCosTable[tmp161]; in ComfortNoise()
1505 tmp323 = WebRtcAecm_kSinTable[tmp161]; in ComfortNoise()
1517 [tmp161] "r" (tmp161), [kSinTablep] "r" (kSinTablep) in ComfortNoise()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | 2009-09-18-carrybit.ll | 42 %tmp161 = shl i64 %tmp160, 32 ; <i64> [#uses=1]
46 %ins169 = or i64 %tmp161, %tmp167 ; <i64> [#uses=2]
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| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| D | 2009-09-18-carrybit.ll | 42 %tmp161 = shl i64 %tmp160, 32 ; <i64> [#uses=1]
46 %ins169 = or i64 %tmp161, %tmp167 ; <i64> [#uses=2]
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | 2009-09-18-carrybit.ll | 42 %tmp161 = shl i64 %tmp160, 32 ; <i64> [#uses=1]
46 %ins169 = or i64 %tmp161, %tmp167 ; <i64> [#uses=2]
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| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | call_nolink.ll | 46 %tmp161.i.i = add i32 %tmp160.i.i, 1 ; <i32> [#uses=1]
47 store i32 %tmp161.i.i, i32* %tmp159.i.i
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| D | 2008-04-10-ScavengerAssert.ll | 151 …%tmp161.i = getelementptr [4 x [21 x double]]* null, i32 0, i32 %tmp15747.i, i32 %sfb.3.reg2mem.0.…
152 %tmp162.i74 = load double* %tmp161.i, align 4 ; <double> [#uses=0]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | call_nolink.ll | 47 %tmp161.i.i = add i32 %tmp160.i.i, 1 ; <i32> [#uses=1]
48 store i32 %tmp161.i.i, i32* %tmp159.i.i
|
| D | 2008-04-10-ScavengerAssert.ll | 151 …%tmp161.i = getelementptr [4 x [21 x double]], [4 x [21 x double]]* null, i32 0, i32 %tmp15747.i, …
152 %tmp162.i74 = load double, double* %tmp161.i, align 4 ; <double> [#uses=0]
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| /external/llvm/test/CodeGen/ARM/ |
| D | call_nolink.ll | 47 %tmp161.i.i = add i32 %tmp160.i.i, 1 ; <i32> [#uses=1]
48 store i32 %tmp161.i.i, i32* %tmp159.i.i
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| D | 2008-04-10-ScavengerAssert.ll | 151 …%tmp161.i = getelementptr [4 x [21 x double]], [4 x [21 x double]]* null, i32 0, i32 %tmp15747.i, …
152 %tmp162.i74 = load double, double* %tmp161.i, align 4 ; <double> [#uses=0]
|
| /external/llvm/test/CodeGen/X86/ |
| D | 2009-03-23-MultiUseSched.ll | 174 %tmp161 = add i64 %tmp153, %tmp160 ; <i64> [#uses=1]
176 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
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| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | 2009-03-23-MultiUseSched.ll | 173 %tmp161 = add i64 %tmp153, %tmp160 ; <i64> [#uses=1]
175 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | 2009-03-23-MultiUseSched.ll | 174 %tmp161 = add i64 %tmp153, %tmp160 ; <i64> [#uses=1]
176 %tmp163 = add i64 %tmp161, %tmp162 ; <i64> [#uses=1]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | pv.ll | 164 %tmp161 = fmul float %tmp160, %tmp21
194 %tmp191 = fadd float %tmp161, %tmp121
|
| D | si-spill-cf.ll | 189 %tmp161 = call float @llvm.maxnum.f32(float %tmp158, float %tmp159)
190 %tmp162 = call float @llvm.maxnum.f32(float %tmp161, float %tmp160)
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| D | debug-value2.ll | 256 %tmp161 = insertelement <4 x float> %tmp157, float %tmp160, i64 3
263 …%vecinit5.i.i38 = shufflevector <4 x float> %vecinit4.i.i37, <4 x float> %tmp161, <4 x i32> <i32 0…
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| D | vgpr-spill-emergency-stack-slot.ll | 224 %tmp161 = bitcast i32 %tmp160 to float
353 %tmp290 = insertelement <128 x float> %tmp289, float %tmp161, i32 %tmp158
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| D | vgpr-spill-emergency-stack-slot-compute.ll | 360 %tmp161 = insertelement <128 x float> %tmp160, float %tmp77, i32 11
361 %tmp162 = insertelement <128 x float> %tmp161, float %tmp75, i32 12
|
| D | schedule-regpressure-limit.ll | 170 %tmp161 = tail call float @llvm.fmuladd.f32(float %tmp156, float %tmp158, float %tmp160)
502 store float %tmp161, float addrspace(1)* %tmp470, align 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/ |
| D | 2012-07-18-LimitReassociate.ll | 335 %tmp154 = phi i64 [ %tmp161, %bb160 ], [ 0, %bb150 ]
346 %tmp161 = add i64 %tmp154, 1
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| D | 2012-07-18-LimitReassociate.ll | 335 %tmp154 = phi i64 [ %tmp161, %bb160 ], [ 0, %bb150 ]
346 %tmp161 = add i64 %tmp154, 1
|
| /external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/ |
| D | 2006-10-29-InvokeCrash.ll | 267 %tmp161 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 0 ; <double*> [#uses=1]
270 store double %tmp163, double* %tmp161
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| D | 2009-06-15-InvokeCrash.ll | 269 %tmp161 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 0 ; <double*> [#uses=1]
272 store double %tmp163, double* %tmp161
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | vgpr-spill-emergency-stack-slot.ll | 222 %tmp161 = bitcast i32 %tmp160 to float
351 %tmp290 = insertelement <128 x float> %tmp289, float %tmp161, i32 %tmp158
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| D | vgpr-spill-emergency-stack-slot-compute.ll | 342 %tmp161 = insertelement <128 x float> %tmp160, float %tmp77, i32 11
343 %tmp162 = insertelement <128 x float> %tmp161, float %tmp75, i32 12
|