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Searched refs:ubfx (Results 1 – 25 of 112) sorted by relevance

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/external/llvm/test/CodeGen/ARM/
Dbfx.ll14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
35 ; CHECK: ubfx [[REG2:(lr|r[0-9]+)]], r1, #16, #8
37 ; CHECK: ubfx [[REG3:(lr|r[0-9]+)]], r1, #8, #8
57 ; CHECK: ubfx r0, r0, #11, #1
65 ; CHECK: ubfx r0, r0, #7, #3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dbfx.ll14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
35 ; CHECK: ubfx [[REG2:(lr|r[0-9]+)]], r1, #16, #8
37 ; CHECK: ubfx [[REG3:(lr|r[0-9]+)]], r1, #8, #8
57 ; CHECK: ubfx r0, r0, #11, #1
65 ; CHECK: ubfx r0, r0, #7, #3
Dshift-combine.ll27 ;CHECK-COMMON: ubfx r0, r0, #1, #15
223 ; CHECK-COMMON: ubfx r1, r1, #7, #8
250 ; CHECK-COMMON: ubfx r1, r1, #8, #7
264 ; CHECK-COMMON: ubfx r1, r1, #9, #8
277 ; CHECK-ALIGN: ubfx r1, r1, #8, #16
293 ; CHECK-COMMON: ubfx r1, r1, #15, #16
364 ; CHECK-COMMON: ubfx r0, r0, #8, #16
Duxt_rot.ll24 ; CHECK-V6-NOT: ubfx
25 ; CHECK-V7: ubfx r0, r0, #8, #16
36 ; CHECK-V6-NOT: ubfx
37 ; CHECK-V7: ubfx r0, r0, #8, #8
/external/llvm/test/CodeGen/AArch64/
Darm64-fold-lsl.ll11 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
23 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
35 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
47 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
59 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
71 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
Darm64-ld-from-st.ll52 ; CHECK: ubfx x0, x1, #16, #16
64 ; CHECK: ubfx x0, x1, #32, #16
100 ; CHECK: ubfx x0, x1, #8, #8
112 ; CHECK: ubfx x0, x1, #16, #8
124 ; CHECK: ubfx x0, x1, #24, #8
136 ; CHECK: ubfx x0, x1, #32, #8
148 ; CHECK: ubfx x0, x1, #40, #8
160 ; CHECK: ubfx x0, x1, #48, #8
232 ; CHECK: ubfx w0, w1, #8, #8
244 ; CHECK: ubfx w0, w1, #16, #8
[all …]
Dfast-isel-shift.ll62 ; CHECK-NEXT: ubfx [[REG2:w[0-9]+]], [[REG1]], #1, #15
310 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
317 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
326 ; CHECK-NEXT: ubfx {{w[0-9]*}}, [[REG]], #4, #12
334 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
361 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #8, #8
413 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
429 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
523 ; CHECK: ubfx x0, x0, #0, #32
531 ; CHECK: ubfx x0, x0, #0, #32
[all …]
Dandandshift.ll8 ; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
19 ; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
Dfast-isel-int-ext3.ll33 ; CHECK: ubfx x0, x[[REG]], #0, #8
44 ; CHECK: ubfx x0, x[[REG]], #0, #16
55 ; CHECK: ubfx x0, x[[REG]], #0, #32
Darm64-bitfield-extract.ll10 ; CHECK: ubfx
44 ; CHECK: ubfx x{{[0-9]+}}, x{{[0-9]+}}
233 ; CHECK: ubfx w0, w0, #11, #1
247 ; CHECK-NEXT: ubfx [[REG2:w[0-9]+]], [[REG1]], #2, #28
270 ; CHECK-NEXT: ubfx [[REG2:x[0-9]+]], [[REG1]], #2, #60
357 ; CHECK-NEXT: ubfx [[REG3:w[0-9]+]], [[REG2]], #2, #28
386 ; CHECK-NEXT: ubfx [[REG3:x[0-9]+]], [[REG2]], #2, #60
402 ; CHECK: ubfx x0, x0, #9, #8
432 ; CHECK: ubfx [[REG1:x[0-9]+]], [[REG2:x[0-9]+]], #32, #16
456 ; CHECK: ubfx [[REG3:x[0-9]+]], [[REG4:x[0-9]+]], #16, #16
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-ld-from-st.ll52 ; CHECK: ubfx x0, x1, #16, #16
64 ; CHECK: ubfx x0, x1, #32, #16
100 ; CHECK: ubfx x0, x1, #8, #8
112 ; CHECK: ubfx x0, x1, #16, #8
124 ; CHECK: ubfx x0, x1, #24, #8
136 ; CHECK: ubfx x0, x1, #32, #8
148 ; CHECK: ubfx x0, x1, #40, #8
160 ; CHECK: ubfx x0, x1, #48, #8
232 ; CHECK: ubfx w0, w1, #8, #8
244 ; CHECK: ubfx w0, w1, #16, #8
[all …]
Dfast-isel-shift.ll62 ; CHECK-NEXT: ubfx [[REG2:w[0-9]+]], [[REG1]], #1, #15
310 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
317 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
326 ; CHECK-NEXT: ubfx {{w[0-9]*}}, [[REG]], #4, #12
334 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
361 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #8, #8
413 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
429 ; CHECK: ubfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
523 ; CHECK: ubfx x0, x0, #0, #32
531 ; CHECK: ubfx x0, x0, #0, #32
[all …]
Dandandshift.ll8 ; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
19 ; CHECK: ubfx {{w[0-9]+}}, w0, #3, #5
Daarch64-fold-lslfast.ll10 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
26 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
42 ; CHECK: ubfx [[REG:x[0-9]+]], x1, #9, #8
Dfast-isel-int-ext3.ll33 ; CHECK: ubfx x0, x[[REG]], #0, #8
44 ; CHECK: ubfx x0, x[[REG]], #0, #16
55 ; CHECK: ubfx x0, x[[REG]], #0, #32
Darm64-bitfield-extract.ll10 ; CHECK: ubfx
44 ; CHECK: ubfx x{{[0-9]+}}, x{{[0-9]+}}
233 ; CHECK: ubfx w0, w0, #11, #1
247 ; CHECK-NEXT: ubfx [[REG2:w[0-9]+]], [[REG1]], #2, #28
270 ; CHECK-NEXT: ubfx [[REG2:x[0-9]+]], [[REG1]], #2, #60
357 ; CHECK-NEXT: ubfx [[REG3:w[0-9]+]], [[REG2]], #2, #28
386 ; CHECK-NEXT: ubfx [[REG3:x[0-9]+]], [[REG2]], #2, #60
402 ; CHECK: ubfx x0, x0, #9, #8
432 ; CHECK: ubfx [[REG1:x[0-9]+]], [[REG2:x[0-9]+]], #32, #16
456 ; CHECK: ubfx [[REG3:x[0-9]+]], [[REG4:x[0-9]+]], #16, #16
[all …]
/external/u-boot/arch/arm/cpu/armv8/
Dpsci.S136 ubfx x11, x10, #32, #32
137 ubfx x10, x10, #0, #32
168 ubfx x9, x0, #30, #1
193 ubfx x9, x9, #8, #8
200 ubfx x10, x10, #0, #8
231 ubfx x9, x9, #26, #6
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-bitfield.txt18 # CHECK: ubfx w1, w2, #1, #15
19 # CHECK: ubfx x1, x2, #1, #15
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Darm64-bitfield.txt18 # CHECK: ubfx w1, w2, #1, #15
19 # CHECK: ubfx x1, x2, #1, #15
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dbfx.ll14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dbfx.ll14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dbfx.ll14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
/external/llvm/test/CodeGen/Thumb2/
Dbfx.ll14 ; CHECK: ubfx r0, r0, #7, #11
23 ; CHECK: ubfx r0, r0, #7, #11
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-bitfield-encoding.s23 ; CHECK: ubfx w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x53]
24 ; CHECK: ubfx x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0xd3]
/external/llvm/test/MC/AArch64/
Darm64-bitfield-encoding.s23 ; CHECK: ubfx w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x53]
24 ; CHECK: ubfx x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0xd3]

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