| /external/capstone/suite/MC/AArch64/ |
| D | neon-simd-shift.s.cs | 137 0x20,0x9c,0x0d,0x6f = uqrshrn2 v0.16b, v1.8h, #3
138 0x20,0x9c,0x1d,0x6f = uqrshrn2 v0.8h, v1.4s, #3
139 0x20,0x9c,0x3d,0x6f = uqrshrn2 v0.4s, v1.2d, #3
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 388 uqrshrn2 v0.16b, v1.8h, #3
389 uqrshrn2 v0.8h, v1.4s, #3
390 uqrshrn2 v0.4s, v1.2d, #3
|
| D | arm64-advsimd.s | 1570 uqrshrn2.16b v0, v0, #2
1572 uqrshrn2.8h v0, v0, #4
1574 uqrshrn2.4s v0, v0, #6
1742 ; CHECK: uqrshrn2.16b v0, v0, #2 ; encoding: [0x00,0x9c,0x0e,0x6f]
1744 ; CHECK: uqrshrn2.8h v0, v0, #4 ; encoding: [0x00,0x9c,0x1c,0x6f]
1746 ; CHECK: uqrshrn2.4s v0, v0, #6 ; encoding: [0x00,0x9c,0x3a,0x6f]
1841 uqrshrn2 v8.16b, v9.8h, #2
1843 uqrshrn2 v6.8h, v7.4s, #4
1845 uqrshrn2 v4.4s, v5.2d, #6
1906 ; CHECK: uqrshrn2.16b v8, v9, #2 ; encoding: [0x28,0x9d,0x0e,0x6f]
[all …]
|
| D | neon-diagnostics.s | 2013 uqrshrn2 v0.16b, v1.8h, #17
2014 uqrshrn2 v0.8h, v1.4s, #33
2015 uqrshrn2 v0.4s, v1.2d, #65
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 388 uqrshrn2 v0.16b, v1.8h, #3
389 uqrshrn2 v0.8h, v1.4s, #3
390 uqrshrn2 v0.4s, v1.2d, #3
|
| D | arm64-advsimd.s | 1570 uqrshrn2.16b v0, v0, #2
1572 uqrshrn2.8h v0, v0, #4
1574 uqrshrn2.4s v0, v0, #6
1742 ; CHECK: uqrshrn2.16b v0, v0, #2 ; encoding: [0x00,0x9c,0x0e,0x6f]
1744 ; CHECK: uqrshrn2.8h v0, v0, #4 ; encoding: [0x00,0x9c,0x1c,0x6f]
1746 ; CHECK: uqrshrn2.4s v0, v0, #6 ; encoding: [0x00,0x9c,0x3a,0x6f]
1841 uqrshrn2 v8.16b, v9.8h, #2
1843 uqrshrn2 v6.8h, v7.4s, #4
1845 uqrshrn2 v4.4s, v5.2d, #6
1906 ; CHECK: uqrshrn2.16b v8, v9, #2 ; encoding: [0x28,0x9d,0x0e,0x6f]
[all …]
|
| D | neon-diagnostics.s | 2018 uqrshrn2 v0.16b, v1.8h, #17
2019 uqrshrn2 v0.8h, v1.4s, #33
2020 uqrshrn2 v0.4s, v1.2d, #65
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-simd-shift.ll | 533 ; CHECK: uqrshrn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, #3
544 ; CHECK: uqrshrn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, #9
555 ; CHECK: uqrshrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #19
|
| D | arm64-vshift.ll | 1039 ;CHECK: uqrshrn2.16b v0, {{v[0-9]+}}, #1
1049 ;CHECK: uqrshrn2.8h v0, {{v[0-9]+}}, #1
1059 ;CHECK: uqrshrn2.4s v0, {{v[0-9]+}}, #1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-simd-shift.ll | 533 ; CHECK: uqrshrn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, #3
544 ; CHECK: uqrshrn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, #9
555 ; CHECK: uqrshrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #19
|
| D | arm64-vshift.ll | 1039 ;CHECK: uqrshrn2.16b v0, {{v[0-9]+}}, #1
1049 ;CHECK: uqrshrn2.8h v0, {{v[0-9]+}}, #1
1059 ;CHECK: uqrshrn2.4s v0, {{v[0-9]+}}, #1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 2145 # CHECK: uqrshrn2.16b v0, v0, #0x6
2147 # CHECK: uqrshrn2.8h v0, v0, #0xc
2149 # CHECK: uqrshrn2.4s v0, v0, #0x1a
|
| D | neon-instructions.txt | 1069 # CHECK: uqrshrn2 v0.16b, v1.8h, #3
1070 # CHECK: uqrshrn2 v0.8h, v1.4s, #3
1071 # CHECK: uqrshrn2 v0.4s, v1.2d, #3
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 2145 # CHECK: uqrshrn2.16b v0, v0, #0x6
2147 # CHECK: uqrshrn2.8h v0, v0, #0xc
2149 # CHECK: uqrshrn2.4s v0, v0, #0x1a
|
| D | neon-instructions.txt | 1069 # CHECK: uqrshrn2 v0.16b, v1.8h, #3
1070 # CHECK: uqrshrn2 v0.8h, v1.4s, #3
1071 # CHECK: uqrshrn2 v0.4s, v1.2d, #3
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64.h | 1069 V(uqrshrn2, Uqrshrn2) \
|
| D | simulator-arm64.h | 1808 LogicVRegister uqrshrn2(VectorFormat vform, LogicVRegister dst,
|
| D | assembler-arm64.h | 2184 void uqrshrn2(const VRegister& vd, const VRegister& vn, int shift);
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 1986 0x~~~~~~~~~~~~~~~~ 6f0e9fd9 uqrshrn2 v25.16b, v30.8h, #2
1987 0x~~~~~~~~~~~~~~~~ 6f209dd5 uqrshrn2 v21.4s, v14.2d, #32
1988 0x~~~~~~~~~~~~~~~~ 6f1e9ced uqrshrn2 v13.8h, v7.4s, #2
|
| D | log-disasm | 1986 0x~~~~~~~~~~~~~~~~ 6f0e9fd9 uqrshrn2 v25.16b, v30.8h, #2
1987 0x~~~~~~~~~~~~~~~~ 6f209dd5 uqrshrn2 v21.4s, v14.2d, #32
1988 0x~~~~~~~~~~~~~~~~ 6f1e9ced uqrshrn2 v13.8h, v7.4s, #2
|
| D | log-cpufeatures-custom | 1985 0x~~~~~~~~~~~~~~~~ 6f0e9fd9 uqrshrn2 v25.16b, v30.8h, #2 ### {NEON} ###
1986 0x~~~~~~~~~~~~~~~~ 6f209dd5 uqrshrn2 v21.4s, v14.2d, #32 ### {NEON} ###
1987 0x~~~~~~~~~~~~~~~~ 6f1e9ced uqrshrn2 v13.8h, v7.4s, #2 ### {NEON} ###
|
| D | log-cpufeatures | 1985 0x~~~~~~~~~~~~~~~~ 6f0e9fd9 uqrshrn2 v25.16b, v30.8h, #2 // Needs: NEON
1986 0x~~~~~~~~~~~~~~~~ 6f209dd5 uqrshrn2 v21.4s, v14.2d, #32 // Needs: NEON
1987 0x~~~~~~~~~~~~~~~~ 6f1e9ced uqrshrn2 v13.8h, v7.4s, #2 // Needs: NEON
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2328 __ uqrshrn2(v25.V16B(), v30.V8H(), 2); in GenerateTestSequenceNEON() local
2329 __ uqrshrn2(v21.V4S(), v14.V2D(), 32); in GenerateTestSequenceNEON() local
2330 __ uqrshrn2(v13.V8H(), v7.V4S(), 2); in GenerateTestSequenceNEON() local
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.h | 2672 LogicVRegister uqrshrn2(VectorFormat vform,
|
| D | assembler-aarch64.h | 3177 void uqrshrn2(const VRegister& vd, const VRegister& vn, int shift);
|