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Searched refs:v16f32 (Results 1 – 25 of 108) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Davx512-round.ll6 %res = call <16 x float> @llvm.floor.v16f32(<16 x float> %a)
9 declare <16 x float> @llvm.floor.v16f32(<16 x float> %p)
22 %res = call <16 x float> @llvm.ceil.v16f32(<16 x float> %a)
25 declare <16 x float> @llvm.ceil.v16f32(<16 x float> %p)
38 %res = call <16 x float> @llvm.trunc.v16f32(<16 x float> %a)
41 declare <16 x float> @llvm.trunc.v16f32(<16 x float> %p)
54 %res = call <16 x float> @llvm.rint.v16f32(<16 x float> %a)
57 declare <16 x float> @llvm.rint.v16f32(<16 x float> %p)
70 %res = call <16 x float> @llvm.nearbyint.v16f32(<16 x float> %a)
73 declare <16 x float> @llvm.nearbyint.v16f32(<16 x float> %p)
Dwide-fma-contraction.ll25 …%ret = tail call <16 x float> @llvm.fmuladd.v16f32(<16 x float> %a, <16 x float> %b, <16 x float> …
29 declare <16 x float> @llvm.fmuladd.v16f32(<16 x float>, <16 x float>, <16 x float>) nounwind readno…
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/X86/
Dgather_scatter.ll34 ; AVX512-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <16 x float> @llvm.masked.gather.v16f32.v16p0f3…
38 ; AVX512-NEXT: call void @llvm.masked.store.v16f32.p0v16f32(<16 x float> [[TMP7]], <16 x float>*…
49 ; AVX512-NEXT: [[WIDE_MASKED_GATHER_1:%.*]] = call <16 x float> @llvm.masked.gather.v16f32.v16p0…
53 ; AVX512-NEXT: call void @llvm.masked.store.v16f32.p0v16f32(<16 x float> [[TMP17]], <16 x float>…
64 ; AVX512-NEXT: [[WIDE_MASKED_GATHER_2:%.*]] = call <16 x float> @llvm.masked.gather.v16f32.v16p0…
68 ; AVX512-NEXT: call void @llvm.masked.store.v16f32.p0v16f32(<16 x float> [[TMP27]], <16 x float>…
79 ; AVX512-NEXT: [[WIDE_MASKED_GATHER_3:%.*]] = call <16 x float> @llvm.masked.gather.v16f32.v16p0…
83 ; AVX512-NEXT: call void @llvm.masked.store.v16f32.p0v16f32(<16 x float> [[TMP37]], <16 x float>…
167 ; AVX512-NEXT: [[WIDE_MASKED_GATHER7:%.*]] = call <16 x float> @llvm.masked.gather.v16f32.v16p0f…
170 ; AVX512-NEXT: call void @llvm.masked.scatter.v16f32.v16p0f32(<16 x float> [[TMP3]], <16 x float…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrVecCompiler.td91 def : Pat<(v8f64 (bitconvert (v16f32 VR512:$src))), (v8f64 VR512:$src)>;
92 def : Pat<(v16f32 (bitconvert (v8i64 VR512:$src))), (v16f32 VR512:$src)>;
93 def : Pat<(v16f32 (bitconvert (v16i32 VR512:$src))), (v16f32 VR512:$src)>;
94 def : Pat<(v16f32 (bitconvert (v32i16 VR512:$src))), (v16f32 VR512:$src)>;
95 def : Pat<(v16f32 (bitconvert (v64i8 VR512:$src))), (v16f32 VR512:$src)>;
96 def : Pat<(v16f32 (bitconvert (v8f64 VR512:$src))), (v16f32 VR512:$src)>;
101 def : Pat<(v8i64 (bitconvert (v16f32 VR512:$src))), (v8i64 VR512:$src)>;
103 def : Pat<(v16i32 (bitconvert (v16f32 VR512:$src))), (v16i32 VR512:$src)>;
111 def : Pat<(v32i16 (bitconvert (v16f32 VR512:$src))), (v32i16 VR512:$src)>;
116 def : Pat<(v64i8 (bitconvert (v16f32 VR512:$src))), (v64i8 VR512:$src)>;
[all …]
DX86TargetTransformInfo.cpp494 { ISD::FADD, MVT::v16f32, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
495 { ISD::FSUB, MVT::v16f32, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
496 { ISD::FMUL, MVT::v16f32, 1 }, // Skylake from http://www.agner.org/ in getArithmeticInstrCost()
901 { TTI::SK_Broadcast, MVT::v16f32, 1 }, // vbroadcastps in getShuffleCost()
906 { TTI::SK_Reverse, MVT::v16f32, 1 }, // vpermps in getShuffleCost()
913 { TTI::SK_PermuteSingleSrc, MVT::v16f32, 1 }, // vpermps in getShuffleCost()
925 { TTI::SK_PermuteTwoSrc, MVT::v16f32, 1 }, // vpermt2ps in getShuffleCost()
1183 { ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, 3 }, in getCastInstrCost()
1204 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i1, 3 }, in getCastInstrCost()
1206 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i8, 2 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dvmaskmov-offset.ll4 declare void @llvm.masked.store.v16f32.p0v16f32(<16 x float>, <16 x float>*, i32, <16 x i1>)
5 declare <16 x float> @llvm.masked.load.v16f32.p0v16f32(<16 x float>*, i32, <16 x i1>, <16 x float>)
19 …%masked_loaded_vec = call <16 x float> @llvm.masked.load.v16f32.p0v16f32(<16 x float>* nonnull %st…
20 …call void @llvm.masked.store.v16f32.p0v16f32(<16 x float> %masked_loaded_vec, <16 x float>* nonnul…
Dvec-copysign-avx512.ll41 define <16 x float> @v16f32(<16 x float> %a, <16 x float> %b) nounwind {
42 ; AVX512VL-LABEL: v16f32:
49 ; AVX512VLDQ-LABEL: v16f32:
55 %tmp = tail call <16 x float> @llvm.copysign.v16f32( <16 x float> %a, <16 x float> %b )
108 declare <16 x float> @llvm.copysign.v16f32(<16 x float> %Mag, <16 x float> %Sgn)
Dwide-fma-contraction.ll41 …%ret = tail call <16 x float> @llvm.fmuladd.v16f32(<16 x float> %a, <16 x float> %b, <16 x float> …
45 declare <16 x float> @llvm.fmuladd.v16f32(<16 x float>, <16 x float>, <16 x float>) nounwind readno…
Davx512-rndscale.ll9 declare <16 x float> @llvm.floor.v16f32(<16 x float> %p)
15 declare <16 x float> @llvm.ceil.v16f32(<16 x float> %p)
21 declare <16 x float> @llvm.trunc.v16f32(<16 x float> %p)
27 declare <16 x float> @llvm.rint.v16f32(<16 x float> %p)
33 declare <16 x float> @llvm.nearbyint.v16f32(<16 x float> %p)
85 %t = call <16 x float> @llvm.floor.v16f32(<16 x float> %p)
145 %t = call <16 x float> @llvm.floor.v16f32(<16 x float> %p)
222 %t = call <16 x float> @llvm.floor.v16f32(<16 x float> %p)
294 %t = call <16 x float> @llvm.floor.v16f32(<16 x float> %p)
372 %t = call <16 x float> @llvm.floor.v16f32(<16 x float> %p)
[all …]
Dbitcast-setcc-512.ll143 define i16 @v16f32(<16 x float> %a, <16 x float> %b) {
144 ; SSE-LABEL: v16f32:
157 ; AVX1-LABEL: v16f32:
171 ; AVX2-LABEL: v16f32:
184 ; AVX512F-LABEL: v16f32:
192 ; AVX512BW-LABEL: v16f32:
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/
Dfround.ll21 …ated cost of 172 for instruction: %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
32 …imated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
43 …imated cost of 4 for instruction: %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
54 …imated cost of 1 for instruction: %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
65 …imated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
76 …imated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
87 …imated cost of 4 for instruction: %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
97 %V16F32 = call <16 x float> @llvm.ceil.v16f32(<16 x float> undef)
112 …ted cost of 172 for instruction: %V16F32 = call <16 x float> @llvm.floor.v16f32(<16 x float> undef)
123 …mated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.floor.v16f32(<16 x float> undef)
[all …]
Darith-fma.ll13 …timated cost of 4 for instruction: %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef…
24 …timated cost of 4 for instruction: %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef…
35 …timated cost of 1 for instruction: %V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef…
45 …%V16F32 = call <16 x float> @llvm.fma.v16f32(<16 x float> undef, <16 x float> undef, <16 x float> …
58 declare <16 x float> @llvm.fma.v16f32(<16 x float>, <16 x float>, <16 x float>)
Dmasked-intrinsic-cost.ll297 …cost of 30 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
303 …cost of 24 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
309 …cost of 18 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
315 …cost of 18 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
321 …%res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x float*> %gep.v, i32 4, <16 x i1…
329 …cost of 62 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
335 …cost of 24 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
341 …cost of 18 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
347 …cost of 18 for instruction: %res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x flo…
353 …%res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x float*> %gep.v, i32 4, <16 x i1…
[all …]
Darith-fp.ll509 …ated cost of 224 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
520 …mated cost of 72 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
531 …mated cost of 56 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
542 …mated cost of 28 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
553 …imated cost of 1 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
564 …ated cost of 160 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
575 …ated cost of 148 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
586 …mated cost of 56 for instruction: %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
596 %V16F32 = call <16 x float> @llvm.sqrt.v16f32(<16 x float> undef)
611 …imated cost of 8 for instruction: %V16F32 = call <16 x float> @llvm.fabs.v16f32(<16 x float> undef)
[all …]
/external/llvm/test/Transforms/LoopVectorize/X86/
Dgather_scatter.ll21 ;AVX512: llvm.masked.gather.v16f32
22 ;AVX512: llvm.masked.store.v16f32
99 ;AVX512: llvm.masked.gather.v16f32
100 ;AVX512: llvm.masked.store.v16f32
174 ;AVX512: llvm.masked.gather.v16f32
177 ;AVX512: llvm.masked.scatter.v16f32
236 declare void @llvm.masked.scatter.v16f32(<16 x float>, <16 x float*>, i32, <16 x i1>)
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h114 v16f32 = 59, // 16 x f32 enumerator
264 return (SimpleTy == MVT::v16f32 || SimpleTy == MVT::v8f64 || in is512BitVector()
363 case v16f32: return f32; in getVectorElementType()
394 case v16f32: return 16; in getVectorNumElements()
501 case v16f32: in getSizeInBits()
653 if (NumElements == 16) return MVT::v16f32; in getVectorVT()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DMachineValueType.h156 v16f32 = 92, // 16 x f32 enumerator
368 return (SimpleTy == MVT::v16f32 || SimpleTy == MVT::v8f64 || in is512BitVector()
501 case v16f32: in getVectorElementType()
547 case v16f32: in getVectorNumElements()
732 case v16f32: in getSizeInBits()
894 if (NumElements == 16) return MVT::v16f32; in getVectorVT()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Verifier/
Dscatter_gather.ll6 …%res = call <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x float*> %ptrs, i32 4, <16 x i1>…
9 declare <16 x float> @llvm.masked.gather.v16f32.v16p0f32(<16 x float*>, i32, <16 x i1>*, <16 x floa…
70 …call void @llvm.masked.scatter.v16f32.v16p0f32(<16 x float> %value, <16 x float*> %ptrs, i32 4, <1…
73 declare void @llvm.masked.scatter.v16f32.v16p0f32(<16 x float>, <16 x float*>, i32, <16 x i1>*)
/external/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp148 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
149 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
150 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i32, 4 }, in getCastInstrCost()
151 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i32, 4 }, in getCastInstrCost()
175 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 8 }, in getCastInstrCost()
176 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
/external/llvm/test/Analysis/CostModel/X86/
Dmasked-intrinsic-cost.ll131 …%res = call <16 x float> @llvm.masked.gather.v16f32(<16 x float*> %gep.v, i32 4, <16 x i1> <i1 tru…
149 …%res = call <16 x float> @llvm.masked.gather.v16f32(<16 x float*> %gep.v, i32 4, <16 x i1> %mask, …
167 …%res = call <16 x float> @llvm.masked.gather.v16f32(<16 x float*> %gep.v, i32 4, <16 x i1> %mask, …
188 …%res = call <16 x float> @llvm.masked.gather.v16f32(<16 x float*> %gep.random, i32 4, <16 x i1> <i…
280 declare <16 x float> @llvm.masked.gather.v16f32(<16 x float*> %gep.v, i32, <16 x i1> %mask, <16 x f…
290 declare void @llvm.masked.store.v16f32.p0v16f32(<16 x float>, <16 x float>*, i32, <16 x i1>)
291 declare <16 x float> @llvm.masked.load.v16f32.p0v16f32(<16 x float>*, i32, <16 x i1>, <16 x float>)
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp209 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
210 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
211 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i32, 4 }, in getCastInstrCost()
212 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i32, 4 }, in getCastInstrCost()
236 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 8 }, in getCastInstrCost()
237 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 } in getCastInstrCost()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUCallingConv.td114 …CCIfType<[i64, f64, v2i32, v2f32, v4i32, v4f32, v8i32, v8f32, v16i32, v16f32, v2i64, v2f64, v4i16,…
119 CCIfType<[v16i32, v16f32], CCAssignToStack<64, 4>>
131 …CCIfType<[i64, f64, v2i32, v2f32, v4i32, v4f32, v8i32, v8f32, v16i32, v16f32, v2i64, v2f64, v4i16,…
/external/llvm/lib/Target/X86/
DX86CallingConv.td68 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
122 CCIfType<[v16f32, v8f64, v16i32, v8i64],
149 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
346 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
366 CCIfType<[v16i32, v8i64, v16f32, v8f64],
406 CCIfType<[v16i32, v16f32, v8f64, v8i64], CCPassIndirect<i64>>,
449 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
524 CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
541 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
560 CCIfNotVarArg<CCIfType<[v64i8, v32i16, v16i32, v8i64, v16f32, v8f64],
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dftrunc.ll10 declare <16 x float> @llvm.trunc.v16f32(<16 x float>) nounwind readnone
117 %y = call <16 x float> @llvm.trunc.v16f32(<16 x float> %x) nounwind readnone
/external/llvm/test/CodeGen/AMDGPU/
Dftrunc.ll10 declare <16 x float> @llvm.trunc.v16f32(<16 x float>) nounwind readnone
117 %y = call <16 x float> @llvm.trunc.v16f32(<16 x float> %x) nounwind readnone

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