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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.exp.compr.ll5 declare void @llvm.amdgcn.exp.compr.v2f16(i32, i32, <2 x half>, <2 x half>, i1, i1) #0
12 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroin…
13 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroin…
22 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 3, <2 x half> <half 1.0, half 2.0>, <2 x half> <…
31 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 12, <2 x half> <half 1.0, half 2.0>, <2 x half> …
40 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> …
49 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 2, <2 x half> <half 1.0, half 2.0>, <2 x half> <…
58 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 10, <2 x half> <half 1.0, half 2.0>, <2 x half> …
67 …call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> …
68 …call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> …
[all …]
Dpk_max_f16_literal.ll11 …%tmp4 = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> %tmp3, <2 x half> <half 0xH0000, half 0…
24 …%tmp4 = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> %tmp3, <2 x half> <half 0xH3C00, half 0…
37 …%tmp4 = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> %tmp3, <2 x half> <half 0xH3C00, half 0…
50 …%tmp4 = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> %tmp3, <2 x half> <half 0xH0000, half 0…
63 …%tmp4 = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> %tmp3, <2 x half> <half 0xHBC00, half 0…
76 …%tmp4 = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> %tmp3, <2 x half> <half 0xHBC00, half 0…
89 …%tmp4 = tail call <2 x half> @llvm.maxnum.v2f16(<2 x half> %tmp3, <2 x half> <half 0xH0000, half 0…
94 declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>)
Dfcanonicalize.f16.ll7 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #0
8 declare <2 x half> @llvm.canonicalize.v2f16(<2 x half>) #0
256 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %val)
274 %val.fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %val)
275 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %val.fabs)
297 %val.fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %val)
299 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %val.fabs.fneg)
316 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %fneg.val)
330 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %val)
339 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> zeroinitializer)
[all …]
Dclamp-modifier.ll199 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %add, <2 x half> zeroinitializer)
200 %clamp = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
214 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %add, <2 x half> zeroinitializer)
215 %clamp = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
231 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %neg.add, <2 x half> zeroinitializer)
232 %clamp = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
250 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %neg.lo.add, <2 x half> zeroinitializer)
251 %clamp = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
269 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %neg.hi.add, <2 x half> zeroinitializer)
270 %clamp = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
[all …]
Dllvm.amdgcn.image.d16.dim.ll18 …%tex = call <2 x half> @llvm.amdgcn.image.load.2d.v2f16.i32(i32 3, i32 %s, i32 %t, <8 x i32> %rsrc…
48 …%tex = call <2 x half> @llvm.amdgcn.image.load.3d.v2f16.i32(i32 3, i32 %s, i32 %t, i32 %r, <8 x i3…
69 …call void @llvm.amdgcn.image.store.2d.v2f16.i32(<2 x half> %data, i32 3, i32 %s, i32 %t, <8 x i32>…
102 declare <2 x half> @llvm.amdgcn.image.load.2d.v2f16.i32(i32, i32, i32, <8 x i32>, i32, i32) #1
105 declare <2 x half> @llvm.amdgcn.image.load.3d.v2f16.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1
108 declare void @llvm.amdgcn.image.store.2d.v2f16.i32(<2 x half>, i32, i32, i32, <8 x i32>, i32, i32) …
111 declare void @llvm.amdgcn.image.store.3d.v2f16.i32(<2 x half>, i32, i32, i32, i32, <8 x i32>, i32, …
Dfabs.f16.ll36 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
84 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %val)
94 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %bc)
123 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %val)
150 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %val)
169 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %val)
193 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %val)
202 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1
Dfneg-fabs.f16.ll80 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %add)
93 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
126 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
141 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
152 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
161 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1
Dpacked-op-sel.ll25 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %sca…
54 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %neg…
83 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %neg…
113 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %neg…
141 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %neg…
169 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %sca…
226 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %vec…
255 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %neg…
283 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %vec…
312 …%result = tail call <2 x half> @llvm.fma.v2f16(<2 x half> %vec0, <2 x half> %vec1, <2 x half> %neg…
[all …]
Dclamp.ll523 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> zeroinitializer)
524 %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
539 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half undef, half 0.0>)
540 %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half undef>)
554 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half 2.0, half 0.0>)
555 %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
569 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> <half 0.0, half 0.0>)
570 %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 0.0, half 1.0>)
586 %max = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %fneg.a, <2 x half> zeroinitializer)
587 %med = call <2 x half> @llvm.minnum.v2f16(<2 x half> %max, <2 x half> <half 1.0, half 1.0>)
[all …]
Dfmuladd.v2f16.ll12 declare <2 x half> @llvm.fmuladd.v2f16(<2 x half>, <2 x half>, <2 x half>) #1
13 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1
25 %r3 = tail call <2 x half> @llvm.fmuladd.v2f16(<2 x half> %r0, <2 x half> %r1, <2 x half> %r2)
49 …%r3 = tail call <2 x half> @llvm.fmuladd.v2f16(<2 x half> <half 2.0, half 2.0>, <2 x half> %r1, <2…
73 …%r3 = tail call <2 x half> @llvm.fmuladd.v2f16(<2 x half> %r1, <2 x half> <half 2.0, half 2.0>, <2…
Dfmin3.ll111 %min = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
112 %min1 = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %c, <2 x half> %min)
113 %res = tail call fast <2 x half> @llvm.minnum.v2f16(<2 x half> %min1, <2 x half> %d)
120 declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>)
Ddiverge-interp-mov-lower.ll24 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> undef, <2 x half> %tmp8, i1 true,…
30 declare void @llvm.amdgcn.exp.compr.v2f16(i32, i32, <2 x half>, <2 x half>, i1, i1) #2
Dfmax3.ll116 %max = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> %b)
117 %max1 = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %c, <2 x half> %max)
118 %res = tail call fast <2 x half> @llvm.maxnum.v2f16(<2 x half> %max1, <2 x half> %d)
125 declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>)
Dllvm.amdgcn.buffer.load.format.d16.ll21 …%data = call <2 x half> @llvm.amdgcn.buffer.load.format.v2f16(<4 x i32> %rsrc, i32 0, i32 0, i1 0,…
40 declare <2 x half> @llvm.amdgcn.buffer.load.format.v2f16(<4 x i32>, i32, i32, i1, i1)
Dsplit-smrd.ll27 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> %tmp12, <2 x half> undef, i1 true…
32 declare void @llvm.amdgcn.exp.compr.v2f16(i32, i32, <2 x half>, <2 x half>, i1, i1) #0
Dllvm.trunc.f16.ll5 declare <2 x half> @llvm.trunc.v2f16(<2 x half> %a)
50 %r.val = call <2 x half> @llvm.trunc.v2f16(<2 x half> %a.val)
Dllvm.exp2.f16.ll5 declare <2 x half> @llvm.exp2.v2f16(<2 x half> %a)
50 %r.val = call <2 x half> @llvm.exp2.v2f16(<2 x half> %a.val)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dregbankselect-amdgcn-exp-compr.mir7 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> <half 1.0,half 1.0>, <2 x half> <h…
11 …call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> <half 1.0,half 1.0>, <2 x half> <h…
15 declare void @llvm.amdgcn.exp.compr.v2f16(i32, i32, <2 x half>, <2 x half>, i1, i1)
43 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.compr.v2f16), %0, %1, %2, %3, %6, %7
66 G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp.compr.v2f16), %0, %1, %2, %3, %6, %7
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h107 v2f16 = 52, // 2 x f16 enumerator
120 FIRST_FP_VECTOR_VALUETYPE = v2f16,
235 SimpleTy == MVT::v1i32 || SimpleTy == MVT::v2f16 || in is32BitVector()
356 case v2f16: in getVectorElementType()
416 case v2f16: in getVectorNumElements()
464 case v2f16: in getSizeInBits()
644 if (NumElements == 2) return MVT::v2f16; in getVectorVT()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstructions.td823 (v2f16 (EXTRACT_SUBREG v4f16:$vec, sub0))
828 (v2f16 (EXTRACT_SUBREG v4f16:$vec, sub1))
848 def : BitConvert <v2f16, i32, SReg_32>;
849 def : BitConvert <i32, v2f16, SReg_32>;
850 def : BitConvert <v2i16, v2f16, SReg_32>;
851 def : BitConvert <v2f16, v2i16, SReg_32>;
852 def : BitConvert <v2f16, f32, SReg_32>;
853 def : BitConvert <f32, v2f16, SReg_32>;
934 (v2f16 (AMDGPUclamp (VOP3PMods v2f16:$src0, i32:$src0_modifiers))),
1039 (fneg v2f16:$src),
[all …]
DSIRegisterInfo.td166 def SGPR_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
216 def TTMP_32 : RegisterClass<"AMDGPU", [i32, f32, v2i16, v2f16], 32,
343 def VGPR_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
401 def Pseudo_SReg_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
415 def SReg_32_XM0_XEXEC : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
422 def SReg_32_XEXEC_HI : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
427 def SReg_32_XM0 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
433 def SReg_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
548 def VS_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32,
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DMachineValueType.h149 v2f16 = 85, // 2 x f16 enumerator
175 FIRST_FP_VECTOR_VALUETYPE = v2f16,
339 SimpleTy == MVT::v2f16 || SimpleTy == MVT::v1f32); in is32BitVector()
491 case v2f16: in getVectorElementType()
591 case v2f16: in getVectorNumElements()
668 case v2f16: in getSizeInBits()
885 if (NumElements == 2) return MVT::v2f16; in getVectorVT()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/AMDGPU/
Dfabs.ll67 ; CHECK: estimated cost of 0 for {{.*}} call <2 x half> @llvm.fabs.v2f16
70 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %vec) #1
93 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1
/external/llvm/test/Analysis/CostModel/AMDGPU/
Dfabs.ll67 ; CHECK: estimated cost of 0 for {{.*}} call <2 x half> @llvm.fabs.v2f16
70 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %vec) #1
93 declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AMDGPU/
Dpacked-math.ll74 ; GFX9: call <2 x half> @llvm.fma.v2f16(
112 ; GFX9: call <2 x half> @llvm.fabs.v2f16(
128 ; GFX9: call <2 x half> @llvm.fabs.v2f16(
129 ; GFX9: call <2 x half> @llvm.fma.v2f16(
160 ; GFX9: call <2 x half> @llvm.fma.v2f16(

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