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Searched refs:vqshrn (Results 1 – 25 of 34) sorted by relevance

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/external/llvm/test/MC/ARM/
Dneon-satshift-encoding.s115 @ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf2]
116 vqshrn.s16 d16, q8, #8
117 @ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf2]
118 vqshrn.s32 d16, q8, #16
119 @ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xf2]
120 vqshrn.s64 d16, q8, #32
121 @ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf3]
122 vqshrn.u16 d16, q8, #8
123 @ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf3]
124 vqshrn.u32 d16, q8, #16
[all …]
Dneont2-satshift-encoding.s117 @ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0xc8,0xef,0x30,0x09]
118 vqshrn.s16 d16, q8, #8
119 @ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0xd0,0xef,0x30,0x09]
120 vqshrn.s32 d16, q8, #16
121 @ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x09]
122 vqshrn.s64 d16, q8, #32
123 @ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x09]
124 vqshrn.u16 d16, q8, #8
125 @ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x09]
126 vqshrn.u32 d16, q8, #16
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneon-satshift-encoding.s115 @ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf2]
116 vqshrn.s16 d16, q8, #8
117 @ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf2]
118 vqshrn.s32 d16, q8, #16
119 @ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xf2]
120 vqshrn.s64 d16, q8, #32
121 @ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf3]
122 vqshrn.u16 d16, q8, #8
123 @ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf3]
124 vqshrn.u32 d16, q8, #16
[all …]
Dneont2-satshift-encoding.s117 @ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0xc8,0xef,0x30,0x09]
118 vqshrn.s16 d16, q8, #8
119 @ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0xd0,0xef,0x30,0x09]
120 vqshrn.s32 d16, q8, #16
121 @ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x09]
122 vqshrn.s64 d16, q8, #32
123 @ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x09]
124 vqshrn.u16 d16, q8, #8
125 @ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x09]
126 vqshrn.u32 d16, q8, #16
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dneon-satshift-encoding.s115 @ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf2]
116 vqshrn.s16 d16, q8, #8
117 @ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf2]
118 vqshrn.s32 d16, q8, #16
119 @ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0x30,0x09,0xe0,0xf2]
120 vqshrn.s64 d16, q8, #32
121 @ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0x30,0x09,0xc8,0xf3]
122 vqshrn.u16 d16, q8, #8
123 @ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0x30,0x09,0xd0,0xf3]
124 vqshrn.u32 d16, q8, #16
[all …]
Dneont2-satshift-encoding.s117 @ CHECK: vqshrn.s16 d16, q8, #8 @ encoding: [0xc8,0xef,0x30,0x09]
118 vqshrn.s16 d16, q8, #8
119 @ CHECK: vqshrn.s32 d16, q8, #16 @ encoding: [0xd0,0xef,0x30,0x09]
120 vqshrn.s32 d16, q8, #16
121 @ CHECK: vqshrn.s64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x09]
122 vqshrn.s64 d16, q8, #32
123 @ CHECK: vqshrn.u16 d16, q8, #8 @ encoding: [0xc8,0xff,0x30,0x09]
124 vqshrn.u16 d16, q8, #8
125 @ CHECK: vqshrn.u32 d16, q8, #16 @ encoding: [0xd0,0xff,0x30,0x09]
126 vqshrn.u32 d16, q8, #16
[all …]
/external/libhevc/common/arm/
Dihevc_inter_pred_chroma_vert_w16inp_w16out.s159 vqshrn.s32 d0,q0,#6 @right shift
160 vqshrn.s32 d30,q4,#6 @right shift
208 vqshrn.s32 d30,q15,#6 @right shift
218 vqshrn.s32 d28,q14,#6 @right shift
230 vqshrn.s32 d26,q13,#6 @right shift
243 vqshrn.s32 d24,q12,#6 @right shift
254 vqshrn.s32 d30,q15,#6 @right shift
266 vqshrn.s32 d28,q14,#6 @right shift
279 vqshrn.s32 d26,q13,#6 @right shift
293 vqshrn.s32 d24,q12,#6 @right shift
[all …]
Dihevc_inter_pred_chroma_vert_w16inp.s159 vqshrn.s32 d0,q0,#6 @right shift
160 vqshrn.s32 d30,q4,#6 @right shift
210 vqshrn.s32 d30,q15,#6 @right shift
220 vqshrn.s32 d28,q14,#6 @right shift
232 vqshrn.s32 d26,q13,#6 @right shift
246 vqshrn.s32 d24,q12,#6 @right shift
258 vqshrn.s32 d30,q15,#6 @right shift
271 vqshrn.s32 d28,q14,#6 @right shift
285 vqshrn.s32 d26,q13,#6 @right shift
300 vqshrn.s32 d24,q12,#6 @right shift
[all …]
Dihevc_inter_pred_filters_luma_vert_w16inp.s182 vqshrn.s32 d8, q4, #6
196 vqshrn.s32 d10, q5, #6
214 vqshrn.s32 d12, q6, #6
237 vqshrn.s32 d14, q7, #6
254 vqshrn.s32 d8, q4, #6
280 vqshrn.s32 d10, q5, #6
300 vqshrn.s32 d12, q6, #6
320 vqshrn.s32 d14, q7, #6
334 vqshrn.s32 d8, q4, #6
347 vqshrn.s32 d10, q5, #6
[all …]
Dihevc_deblk_luma_horz.s502 vqshrn.s16 d14,q7,#1
534 vqshrn.s16 d14,q7,#1
/external/capstone/suite/MC/ARM/
Dneon-satshift-encoding.s.cs58 0x30,0x09,0xc8,0xf2 = vqshrn.s16 d16, q8, #8
59 0x30,0x09,0xd0,0xf2 = vqshrn.s32 d16, q8, #16
60 0x30,0x09,0xe0,0xf2 = vqshrn.s64 d16, q8, #32
61 0x30,0x09,0xc8,0xf3 = vqshrn.u16 d16, q8, #8
62 0x30,0x09,0xd0,0xf3 = vqshrn.u32 d16, q8, #16
63 0x30,0x09,0xe0,0xf3 = vqshrn.u64 d16, q8, #32
Dneont2-satshift-encoding.s.cs58 0xc8,0xef,0x30,0x09 = vqshrn.s16 d16, q8, #8
59 0xd0,0xef,0x30,0x09 = vqshrn.s32 d16, q8, #16
60 0xe0,0xef,0x30,0x09 = vqshrn.s64 d16, q8, #32
61 0xc8,0xff,0x30,0x09 = vqshrn.u16 d16, q8, #8
62 0xd0,0xff,0x30,0x09 = vqshrn.u32 d16, q8, #16
63 0xe0,0xff,0x30,0x09 = vqshrn.u64 d16, q8, #32
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvqshrn.ll5 ;CHECK: vqshrn.s16
13 ;CHECK: vqshrn.s32
21 ;CHECK: vqshrn.s64
29 ;CHECK: vqshrn.u16
37 ;CHECK: vqshrn.u32
45 ;CHECK: vqshrn.u64
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvqshrn.ll5 ;CHECK: vqshrn.s16
13 ;CHECK: vqshrn.s32
21 ;CHECK: vqshrn.s64
29 ;CHECK: vqshrn.u16
37 ;CHECK: vqshrn.u32
45 ;CHECK: vqshrn.u64
/external/llvm/test/CodeGen/ARM/
Dvqshrn.ll5 ;CHECK: vqshrn.s16
13 ;CHECK: vqshrn.s32
21 ;CHECK: vqshrn.s64
29 ;CHECK: vqshrn.u16
37 ;CHECK: vqshrn.u32
45 ;CHECK: vqshrn.u64
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-simd-shift.ll435 %vqshrn = tail call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %b, i32 3)
437 %2 = bitcast <8 x i8> %vqshrn to <1 x i64>
446 %vqshrn = tail call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %b, i32 9)
448 %2 = bitcast <4 x i16> %vqshrn to <1 x i64>
458 %vqshrn = tail call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> %b, i32 19)
459 %2 = bitcast <2 x i32> %vqshrn to <1 x i64>
468 %vqshrn = tail call <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16> %b, i32 3)
470 %2 = bitcast <8 x i8> %vqshrn to <1 x i64>
479 %vqshrn = tail call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> %b, i32 9)
481 %2 = bitcast <4 x i16> %vqshrn to <1 x i64>
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-neon-simd-shift.ll435 %vqshrn = tail call <8 x i8> @llvm.aarch64.neon.sqshrn.v8i8(<8 x i16> %b, i32 3)
437 %2 = bitcast <8 x i8> %vqshrn to <1 x i64>
446 %vqshrn = tail call <4 x i16> @llvm.aarch64.neon.sqshrn.v4i16(<4 x i32> %b, i32 9)
448 %2 = bitcast <4 x i16> %vqshrn to <1 x i64>
458 %vqshrn = tail call <2 x i32> @llvm.aarch64.neon.sqshrn.v2i32(<2 x i64> %b, i32 19)
459 %2 = bitcast <2 x i32> %vqshrn to <1 x i64>
468 %vqshrn = tail call <8 x i8> @llvm.aarch64.neon.uqshrn.v8i8(<8 x i16> %b, i32 3)
470 %2 = bitcast <8 x i8> %vqshrn to <1 x i64>
479 %vqshrn = tail call <4 x i16> @llvm.aarch64.neon.uqshrn.v4i16(<4 x i32> %b, i32 9)
481 %2 = bitcast <4 x i16> %vqshrn to <1 x i64>
[all …]
/external/libavc/common/arm/
Dih264_deblk_luma_a9.s159 vqshrn.s16 d29, q14, #1 @
160 vqshrn.s16 d28, q5, #1 @Q14 = i_macro_p1
166 vqshrn.s16 d31, q15, #1 @
167 vqshrn.s16 d30, q2, #1 @Q15 = i_macro_q1
/external/libjpeg-turbo/simd/arm/
Djsimd_neon.S851 vqshrn.s16 d16, q8, #5
852 vqshrn.s16 d17, q9, #5
853 vqshrn.s16 d18, q10, #5
854 vqshrn.s16 d19, q11, #5
855 vqshrn.s16 d20, q12, #5
856 vqshrn.s16 d21, q13, #5
857 vqshrn.s16 d22, q14, #5
858 vqshrn.s16 d23, q15, #5
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneont2.txt984 # CHECK: vqshrn.s16 d16, q8, #8
986 # CHECK: vqshrn.s32 d16, q8, #16
988 # CHECK: vqshrn.s64 d16, q8, #32
990 # CHECK: vqshrn.u16 d16, q8, #8
992 # CHECK: vqshrn.u32 d16, q8, #16
994 # CHECK: vqshrn.u64 d16, q8, #32
Dneon.txt1095 # CHECK: vqshrn.s16 d16, q8, #8
1097 # CHECK: vqshrn.s32 d16, q8, #16
1099 # CHECK: vqshrn.s64 d16, q8, #32
1101 # CHECK: vqshrn.u16 d16, q8, #8
1103 # CHECK: vqshrn.u32 d16, q8, #16
1105 # CHECK: vqshrn.u64 d16, q8, #32
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dneont2.txt984 # CHECK: vqshrn.s16 d16, q8, #8
986 # CHECK: vqshrn.s32 d16, q8, #16
988 # CHECK: vqshrn.s64 d16, q8, #32
990 # CHECK: vqshrn.u16 d16, q8, #8
992 # CHECK: vqshrn.u32 d16, q8, #16
994 # CHECK: vqshrn.u64 d16, q8, #32
Dneon.txt1095 # CHECK: vqshrn.s16 d16, q8, #8
1097 # CHECK: vqshrn.s32 d16, q8, #16
1099 # CHECK: vqshrn.s64 d16, q8, #32
1101 # CHECK: vqshrn.u16 d16, q8, #8
1103 # CHECK: vqshrn.u32 d16, q8, #16
1105 # CHECK: vqshrn.u64 d16, q8, #32
/external/llvm/test/MC/Disassembler/ARM/
Dneont2.txt984 # CHECK: vqshrn.s16 d16, q8, #8
986 # CHECK: vqshrn.s32 d16, q8, #16
988 # CHECK: vqshrn.s64 d16, q8, #32
990 # CHECK: vqshrn.u16 d16, q8, #8
992 # CHECK: vqshrn.u32 d16, q8, #16
994 # CHECK: vqshrn.u64 d16, q8, #32
Dneon.txt1095 # CHECK: vqshrn.s16 d16, q8, #8
1097 # CHECK: vqshrn.s32 d16, q8, #16
1099 # CHECK: vqshrn.s64 d16, q8, #32
1101 # CHECK: vqshrn.u16 d16, q8, #8
1103 # CHECK: vqshrn.u32 d16, q8, #16
1105 # CHECK: vqshrn.u64 d16, q8, #32

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