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1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef _UAPI__SOUND_ASOUND_H
20 #define _UAPI__SOUND_ASOUND_H
21 #ifdef __linux__
22 #include <linux/types.h>
23 #else
24 #include <sys/ioctl.h>
25 #endif
26 #include <stdlib.h>
27 #define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor))
28 #define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff)
29 #define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff)
30 #define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff)
31 #define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
32 struct snd_aes_iec958 {
33   unsigned char status[24];
34   unsigned char subcode[147];
35   unsigned char pad;
36   unsigned char dig_subframe[4];
37 };
38 struct snd_cea_861_aud_if {
39   unsigned char db1_ct_cc;
40   unsigned char db2_sf_ss;
41   unsigned char db3;
42   unsigned char db4_ca;
43   unsigned char db5_dminh_lsv;
44 };
45 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
46 enum {
47   SNDRV_HWDEP_IFACE_OPL2 = 0,
48   SNDRV_HWDEP_IFACE_OPL3,
49   SNDRV_HWDEP_IFACE_OPL4,
50   SNDRV_HWDEP_IFACE_SB16CSP,
51   SNDRV_HWDEP_IFACE_EMU10K1,
52   SNDRV_HWDEP_IFACE_YSS225,
53   SNDRV_HWDEP_IFACE_ICS2115,
54   SNDRV_HWDEP_IFACE_SSCAPE,
55   SNDRV_HWDEP_IFACE_VX,
56   SNDRV_HWDEP_IFACE_MIXART,
57   SNDRV_HWDEP_IFACE_USX2Y,
58   SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
59   SNDRV_HWDEP_IFACE_BLUETOOTH,
60   SNDRV_HWDEP_IFACE_USX2Y_PCM,
61   SNDRV_HWDEP_IFACE_PCXHR,
62   SNDRV_HWDEP_IFACE_SB_RC,
63   SNDRV_HWDEP_IFACE_HDA,
64   SNDRV_HWDEP_IFACE_USB_STREAM,
65   SNDRV_HWDEP_IFACE_FW_DICE,
66   SNDRV_HWDEP_IFACE_FW_FIREWORKS,
67   SNDRV_HWDEP_IFACE_FW_BEBOB,
68   SNDRV_HWDEP_IFACE_FW_OXFW,
69   SNDRV_HWDEP_IFACE_FW_DIGI00X,
70   SNDRV_HWDEP_IFACE_FW_TASCAM,
71   SNDRV_HWDEP_IFACE_LINE6,
72   SNDRV_HWDEP_IFACE_FW_MOTU,
73   SNDRV_HWDEP_IFACE_FW_FIREFACE,
74   SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
75 };
76 struct snd_hwdep_info {
77   unsigned int device;
78   int card;
79   unsigned char id[64];
80   unsigned char name[80];
81   int iface;
82   unsigned char reserved[64];
83 };
84 struct snd_hwdep_dsp_status {
85   unsigned int version;
86   unsigned char id[32];
87   unsigned int num_dsps;
88   unsigned int dsp_loaded;
89   unsigned int chip_ready;
90   unsigned char reserved[16];
91 };
92 struct snd_hwdep_dsp_image {
93   unsigned int index;
94   unsigned char name[64];
95   unsigned char __user * image;
96   size_t length;
97   unsigned long driver_data;
98 };
99 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int)
100 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info)
101 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
102 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
103 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 14)
104 typedef unsigned long snd_pcm_uframes_t;
105 typedef signed long snd_pcm_sframes_t;
106 enum {
107   SNDRV_PCM_CLASS_GENERIC = 0,
108   SNDRV_PCM_CLASS_MULTI,
109   SNDRV_PCM_CLASS_MODEM,
110   SNDRV_PCM_CLASS_DIGITIZER,
111   SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
112 };
113 enum {
114   SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
115   SNDRV_PCM_SUBCLASS_MULTI_MIX,
116   SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
117 };
118 enum {
119   SNDRV_PCM_STREAM_PLAYBACK = 0,
120   SNDRV_PCM_STREAM_CAPTURE,
121   SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
122 };
123 typedef int __bitwise snd_pcm_access_t;
124 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
125 #define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
126 #define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
127 #define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
128 #define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
129 #define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
130 typedef int __bitwise snd_pcm_format_t;
131 #define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
132 #define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
133 #define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
134 #define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
135 #define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
136 #define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
137 #define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
138 #define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
139 #define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
140 #define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
141 #define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
142 #define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
143 #define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
144 #define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
145 #define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
146 #define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
147 #define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
148 #define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
149 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
150 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
151 #define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
152 #define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
153 #define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
154 #define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
155 #define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
156 #define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25)
157 #define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26)
158 #define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27)
159 #define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28)
160 #define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
161 #define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
162 #define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
163 #define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
164 #define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
165 #define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
166 #define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
167 #define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
168 #define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
169 #define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
170 #define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
171 #define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
172 #define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
173 #define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
174 #define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
175 #define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
176 #define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
177 #define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
178 #define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
179 #define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
180 #define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
181 #define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
182 #define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
183 #define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8
184 #ifdef SNDRV_LITTLE_ENDIAN
185 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
186 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
187 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
188 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
189 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
190 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
191 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
192 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
193 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
194 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE
195 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE
196 #endif
197 #ifdef SNDRV_BIG_ENDIAN
198 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
199 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
200 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
201 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
202 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
203 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
204 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
205 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
206 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
207 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE
208 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE
209 #endif
210 typedef int __bitwise snd_pcm_subformat_t;
211 #define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
212 #define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
213 #define SNDRV_PCM_INFO_MMAP 0x00000001
214 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
215 #define SNDRV_PCM_INFO_DOUBLE 0x00000004
216 #define SNDRV_PCM_INFO_BATCH 0x00000010
217 #define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
218 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
219 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
220 #define SNDRV_PCM_INFO_COMPLEX 0x00000400
221 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
222 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000
223 #define SNDRV_PCM_INFO_RESUME 0x00040000
224 #define SNDRV_PCM_INFO_PAUSE 0x00080000
225 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
226 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
227 #define SNDRV_PCM_INFO_SYNC_START 0x00400000
228 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
229 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
230 #define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000
231 #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000
232 #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
233 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
234 #define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
235 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
236 typedef int __bitwise snd_pcm_state_t;
237 #define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
238 #define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
239 #define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
240 #define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
241 #define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
242 #define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
243 #define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
244 #define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
245 #define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
246 #define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
247 enum {
248   SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
249   SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
250   SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
251 };
252 union snd_pcm_sync_id {
253   unsigned char id[16];
254   unsigned short id16[8];
255   unsigned int id32[4];
256 };
257 struct snd_pcm_info {
258   unsigned int device;
259   unsigned int subdevice;
260   int stream;
261   int card;
262   unsigned char id[64];
263   unsigned char name[80];
264   unsigned char subname[32];
265   int dev_class;
266   int dev_subclass;
267   unsigned int subdevices_count;
268   unsigned int subdevices_avail;
269   union snd_pcm_sync_id sync;
270   unsigned char reserved[64];
271 };
272 typedef int snd_pcm_hw_param_t;
273 #define SNDRV_PCM_HW_PARAM_ACCESS 0
274 #define SNDRV_PCM_HW_PARAM_FORMAT 1
275 #define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
276 #define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
277 #define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
278 #define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
279 #define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
280 #define SNDRV_PCM_HW_PARAM_CHANNELS 10
281 #define SNDRV_PCM_HW_PARAM_RATE 11
282 #define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
283 #define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
284 #define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
285 #define SNDRV_PCM_HW_PARAM_PERIODS 15
286 #define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
287 #define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
288 #define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
289 #define SNDRV_PCM_HW_PARAM_TICK_TIME 19
290 #define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
291 #define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
292 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0)
293 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1)
294 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2)
295 struct snd_interval {
296   unsigned int min, max;
297   unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1;
298 };
299 #define SNDRV_MASK_MAX 256
300 struct snd_mask {
301   __u32 bits[(SNDRV_MASK_MAX + 31) / 32];
302 };
303 struct snd_pcm_hw_params {
304   unsigned int flags;
305   struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
306   struct snd_mask mres[5];
307   struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
308   struct snd_interval ires[9];
309   unsigned int rmask;
310   unsigned int cmask;
311   unsigned int info;
312   unsigned int msbits;
313   unsigned int rate_num;
314   unsigned int rate_den;
315   snd_pcm_uframes_t fifo_size;
316   unsigned char reserved[64];
317 };
318 enum {
319   SNDRV_PCM_TSTAMP_NONE = 0,
320   SNDRV_PCM_TSTAMP_ENABLE,
321   SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
322 };
323 struct snd_pcm_sw_params {
324   int tstamp_mode;
325   unsigned int period_step;
326   unsigned int sleep_min;
327   snd_pcm_uframes_t avail_min;
328   snd_pcm_uframes_t xfer_align;
329   snd_pcm_uframes_t start_threshold;
330   snd_pcm_uframes_t stop_threshold;
331   snd_pcm_uframes_t silence_threshold;
332   snd_pcm_uframes_t silence_size;
333   snd_pcm_uframes_t boundary;
334   unsigned int proto;
335   unsigned int tstamp_type;
336   unsigned char reserved[56];
337 };
338 struct snd_pcm_channel_info {
339   unsigned int channel;
340   __kernel_off_t offset;
341   unsigned int first;
342   unsigned int step;
343 };
344 enum {
345   SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
346   SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,
347   SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,
348   SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,
349   SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,
350   SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5,
351   SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
352 };
353 struct snd_pcm_status {
354   snd_pcm_state_t state;
355   struct timespec trigger_tstamp;
356   struct timespec tstamp;
357   snd_pcm_uframes_t appl_ptr;
358   snd_pcm_uframes_t hw_ptr;
359   snd_pcm_sframes_t delay;
360   snd_pcm_uframes_t avail;
361   snd_pcm_uframes_t avail_max;
362   snd_pcm_uframes_t overrange;
363   snd_pcm_state_t suspended_state;
364   __u32 audio_tstamp_data;
365   struct timespec audio_tstamp;
366   struct timespec driver_tstamp;
367   __u32 audio_tstamp_accuracy;
368   unsigned char reserved[52 - 2 * sizeof(struct timespec)];
369 };
370 struct snd_pcm_mmap_status {
371   snd_pcm_state_t state;
372   int pad1;
373   snd_pcm_uframes_t hw_ptr;
374   struct timespec tstamp;
375   snd_pcm_state_t suspended_state;
376   struct timespec audio_tstamp;
377 };
378 struct snd_pcm_mmap_control {
379   snd_pcm_uframes_t appl_ptr;
380   snd_pcm_uframes_t avail_min;
381 };
382 #define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0)
383 #define SNDRV_PCM_SYNC_PTR_APPL (1 << 1)
384 #define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2)
385 struct snd_pcm_sync_ptr {
386   unsigned int flags;
387   union {
388     struct snd_pcm_mmap_status status;
389     unsigned char reserved[64];
390   } s;
391   union {
392     struct snd_pcm_mmap_control control;
393     unsigned char reserved[64];
394   } c;
395 };
396 struct snd_xferi {
397   snd_pcm_sframes_t result;
398   void __user * buf;
399   snd_pcm_uframes_t frames;
400 };
401 struct snd_xfern {
402   snd_pcm_sframes_t result;
403   void __user * __user * bufs;
404   snd_pcm_uframes_t frames;
405 };
406 enum {
407   SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
408   SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
409   SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
410   SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
411 };
412 enum {
413   SNDRV_CHMAP_UNKNOWN = 0,
414   SNDRV_CHMAP_NA,
415   SNDRV_CHMAP_MONO,
416   SNDRV_CHMAP_FL,
417   SNDRV_CHMAP_FR,
418   SNDRV_CHMAP_RL,
419   SNDRV_CHMAP_RR,
420   SNDRV_CHMAP_FC,
421   SNDRV_CHMAP_LFE,
422   SNDRV_CHMAP_SL,
423   SNDRV_CHMAP_SR,
424   SNDRV_CHMAP_RC,
425   SNDRV_CHMAP_FLC,
426   SNDRV_CHMAP_FRC,
427   SNDRV_CHMAP_RLC,
428   SNDRV_CHMAP_RRC,
429   SNDRV_CHMAP_FLW,
430   SNDRV_CHMAP_FRW,
431   SNDRV_CHMAP_FLH,
432   SNDRV_CHMAP_FCH,
433   SNDRV_CHMAP_FRH,
434   SNDRV_CHMAP_TC,
435   SNDRV_CHMAP_TFL,
436   SNDRV_CHMAP_TFR,
437   SNDRV_CHMAP_TFC,
438   SNDRV_CHMAP_TRL,
439   SNDRV_CHMAP_TRR,
440   SNDRV_CHMAP_TRC,
441   SNDRV_CHMAP_TFLC,
442   SNDRV_CHMAP_TFRC,
443   SNDRV_CHMAP_TSL,
444   SNDRV_CHMAP_TSR,
445   SNDRV_CHMAP_LLFE,
446   SNDRV_CHMAP_RLFE,
447   SNDRV_CHMAP_BC,
448   SNDRV_CHMAP_BLC,
449   SNDRV_CHMAP_BRC,
450   SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
451 };
452 #define SNDRV_CHMAP_POSITION_MASK 0xffff
453 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
454 #define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
455 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
456 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
457 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
458 #define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
459 #define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
460 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
461 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
462 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
463 #define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
464 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
465 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
466 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
467 #define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
468 #define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
469 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
470 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
471 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
472 #define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
473 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
474 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
475 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
476 #define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
477 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
478 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
479 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
480 #define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
481 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
482 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
483 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
484 #define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
485 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
486 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
487 enum {
488   SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
489   SNDRV_RAWMIDI_STREAM_INPUT,
490   SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
491 };
492 #define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
493 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
494 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
495 struct snd_rawmidi_info {
496   unsigned int device;
497   unsigned int subdevice;
498   int stream;
499   int card;
500   unsigned int flags;
501   unsigned char id[64];
502   unsigned char name[80];
503   unsigned char subname[32];
504   unsigned int subdevices_count;
505   unsigned int subdevices_avail;
506   unsigned char reserved[64];
507 };
508 struct snd_rawmidi_params {
509   int stream;
510   size_t buffer_size;
511   size_t avail_min;
512   unsigned int no_active_sensing : 1;
513   unsigned char reserved[16];
514 };
515 struct snd_rawmidi_status {
516   int stream;
517   struct timespec tstamp;
518   size_t avail;
519   size_t xruns;
520   unsigned char reserved[16];
521 };
522 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
523 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
524 #define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
525 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
526 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
527 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
528 #define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
529 enum {
530   SNDRV_TIMER_CLASS_NONE = - 1,
531   SNDRV_TIMER_CLASS_SLAVE = 0,
532   SNDRV_TIMER_CLASS_GLOBAL,
533   SNDRV_TIMER_CLASS_CARD,
534   SNDRV_TIMER_CLASS_PCM,
535   SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
536 };
537 enum {
538   SNDRV_TIMER_SCLASS_NONE = 0,
539   SNDRV_TIMER_SCLASS_APPLICATION,
540   SNDRV_TIMER_SCLASS_SEQUENCER,
541   SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
542   SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
543 };
544 #define SNDRV_TIMER_GLOBAL_SYSTEM 0
545 #define SNDRV_TIMER_GLOBAL_RTC 1
546 #define SNDRV_TIMER_GLOBAL_HPET 2
547 #define SNDRV_TIMER_GLOBAL_HRTIMER 3
548 #define SNDRV_TIMER_FLG_SLAVE (1 << 0)
549 struct snd_timer_id {
550   int dev_class;
551   int dev_sclass;
552   int card;
553   int device;
554   int subdevice;
555 };
556 struct snd_timer_ginfo {
557   struct snd_timer_id tid;
558   unsigned int flags;
559   int card;
560   unsigned char id[64];
561   unsigned char name[80];
562   unsigned long reserved0;
563   unsigned long resolution;
564   unsigned long resolution_min;
565   unsigned long resolution_max;
566   unsigned int clients;
567   unsigned char reserved[32];
568 };
569 struct snd_timer_gparams {
570   struct snd_timer_id tid;
571   unsigned long period_num;
572   unsigned long period_den;
573   unsigned char reserved[32];
574 };
575 struct snd_timer_gstatus {
576   struct snd_timer_id tid;
577   unsigned long resolution;
578   unsigned long resolution_num;
579   unsigned long resolution_den;
580   unsigned char reserved[32];
581 };
582 struct snd_timer_select {
583   struct snd_timer_id id;
584   unsigned char reserved[32];
585 };
586 struct snd_timer_info {
587   unsigned int flags;
588   int card;
589   unsigned char id[64];
590   unsigned char name[80];
591   unsigned long reserved0;
592   unsigned long resolution;
593   unsigned char reserved[64];
594 };
595 #define SNDRV_TIMER_PSFLG_AUTO (1 << 0)
596 #define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1)
597 #define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2)
598 struct snd_timer_params {
599   unsigned int flags;
600   unsigned int ticks;
601   unsigned int queue_size;
602   unsigned int reserved0;
603   unsigned int filter;
604   unsigned char reserved[60];
605 };
606 struct snd_timer_status {
607   struct timespec tstamp;
608   unsigned int resolution;
609   unsigned int lost;
610   unsigned int overrun;
611   unsigned int queue;
612   unsigned char reserved[64];
613 };
614 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
615 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
616 #define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
617 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
618 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
619 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
620 #define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
621 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
622 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
623 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
624 #define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
625 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
626 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
627 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
628 struct snd_timer_read {
629   unsigned int resolution;
630   unsigned int ticks;
631 };
632 enum {
633   SNDRV_TIMER_EVENT_RESOLUTION = 0,
634   SNDRV_TIMER_EVENT_TICK,
635   SNDRV_TIMER_EVENT_START,
636   SNDRV_TIMER_EVENT_STOP,
637   SNDRV_TIMER_EVENT_CONTINUE,
638   SNDRV_TIMER_EVENT_PAUSE,
639   SNDRV_TIMER_EVENT_EARLY,
640   SNDRV_TIMER_EVENT_SUSPEND,
641   SNDRV_TIMER_EVENT_RESUME,
642   SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
643   SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
644   SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
645   SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
646   SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
647   SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
648 };
649 struct snd_timer_tread {
650   int event;
651   struct timespec tstamp;
652   unsigned int val;
653 };
654 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
655 struct snd_ctl_card_info {
656   int card;
657   int pad;
658   unsigned char id[16];
659   unsigned char driver[16];
660   unsigned char name[32];
661   unsigned char longname[80];
662   unsigned char reserved_[16];
663   unsigned char mixername[80];
664   unsigned char components[128];
665 };
666 typedef int __bitwise snd_ctl_elem_type_t;
667 #define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
668 #define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
669 #define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
670 #define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
671 #define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
672 #define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
673 #define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
674 #define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
675 typedef int __bitwise snd_ctl_elem_iface_t;
676 #define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
677 #define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
678 #define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
679 #define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
680 #define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
681 #define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
682 #define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
683 #define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
684 #define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0)
685 #define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1)
686 #define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE)
687 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2)
688 #define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1 << 3)
689 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4)
690 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5)
691 #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
692 #define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6)
693 #define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8)
694 #define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9)
695 #define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10)
696 #define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28)
697 #define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29)
698 #define SNDRV_CTL_POWER_D0 0x0000
699 #define SNDRV_CTL_POWER_D1 0x0100
700 #define SNDRV_CTL_POWER_D2 0x0200
701 #define SNDRV_CTL_POWER_D3 0x0300
702 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000)
703 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001)
704 #define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
705 struct snd_ctl_elem_id {
706   unsigned int numid;
707   snd_ctl_elem_iface_t iface;
708   unsigned int device;
709   unsigned int subdevice;
710   unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
711   unsigned int index;
712 };
713 struct snd_ctl_elem_list {
714   unsigned int offset;
715   unsigned int space;
716   unsigned int used;
717   unsigned int count;
718   struct snd_ctl_elem_id __user * pids;
719   unsigned char reserved[50];
720 };
721 struct snd_ctl_elem_info {
722   struct snd_ctl_elem_id id;
723   snd_ctl_elem_type_t type;
724   unsigned int access;
725   unsigned int count;
726   __kernel_pid_t owner;
727   union {
728     struct {
729       long min;
730       long max;
731       long step;
732     } integer;
733     struct {
734       long long min;
735       long long max;
736       long long step;
737     } integer64;
738     struct {
739       unsigned int items;
740       unsigned int item;
741       char name[64];
742       __u64 names_ptr;
743       unsigned int names_length;
744     } enumerated;
745     unsigned char reserved[128];
746   } value;
747   union {
748     unsigned short d[4];
749     unsigned short * d_ptr;
750   } dimen;
751   unsigned char reserved[64 - 4 * sizeof(unsigned short)];
752 };
753 struct snd_ctl_elem_value {
754   struct snd_ctl_elem_id id;
755   unsigned int indirect : 1;
756   union {
757     union {
758       long value[128];
759       long * value_ptr;
760     } integer;
761     union {
762       long long value[64];
763       long long * value_ptr;
764     } integer64;
765     union {
766       unsigned int item[128];
767       unsigned int * item_ptr;
768     } enumerated;
769     union {
770       unsigned char data[512];
771       unsigned char * data_ptr;
772     } bytes;
773     struct snd_aes_iec958 iec958;
774   } value;
775   struct timespec tstamp;
776   unsigned char reserved[128 - sizeof(struct timespec)];
777 };
778 struct snd_ctl_tlv {
779   unsigned int numid;
780   unsigned int length;
781   unsigned int tlv[0];
782 };
783 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
784 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
785 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
786 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
787 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
788 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
789 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
790 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
791 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
792 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
793 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
794 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
795 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
796 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
797 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
798 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
799 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
800 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
801 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
802 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
803 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
804 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
805 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
806 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
807 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
808 enum sndrv_ctl_event_type {
809   SNDRV_CTL_EVENT_ELEM = 0,
810   SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
811 };
812 #define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0)
813 #define SNDRV_CTL_EVENT_MASK_INFO (1 << 1)
814 #define SNDRV_CTL_EVENT_MASK_ADD (1 << 2)
815 #define SNDRV_CTL_EVENT_MASK_TLV (1 << 3)
816 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
817 struct snd_ctl_event {
818   int type;
819   union {
820     struct {
821       unsigned int mask;
822       struct snd_ctl_elem_id id;
823     } elem;
824     unsigned char data8[60];
825   } data;
826 };
827 #define SNDRV_CTL_NAME_NONE ""
828 #define SNDRV_CTL_NAME_PLAYBACK "Playback "
829 #define SNDRV_CTL_NAME_CAPTURE "Capture "
830 #define SNDRV_CTL_NAME_IEC958_NONE ""
831 #define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
832 #define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
833 #define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
834 #define SNDRV_CTL_NAME_IEC958_MASK "Mask"
835 #define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
836 #define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
837 #define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
838 #define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what
839 #endif
840