1# 2# Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Cortex A57 specific optimisation to skip L1 cache flush when 8# cluster is powered down. 9SKIP_A57_L1_FLUSH_PWR_DWN ?=0 10 11# Flag to disable the cache non-temporal hint. 12# It is enabled by default. 13A53_DISABLE_NON_TEMPORAL_HINT ?=1 14 15# Flag to disable the cache non-temporal hint. 16# It is enabled by default. 17A57_DISABLE_NON_TEMPORAL_HINT ?=1 18 19# Process SKIP_A57_L1_FLUSH_PWR_DWN flag 20$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN)) 21$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN)) 22 23# Process A53_DISABLE_NON_TEMPORAL_HINT flag 24$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT)) 25$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT)) 26 27# Process A57_DISABLE_NON_TEMPORAL_HINT flag 28$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT)) 29$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT)) 30 31 32# CPU Errata Build flags. 33# These should be enabled by the platform if the erratum workaround needs to be 34# applied. 35 36# Flag to apply erratum 826319 workaround during reset. This erratum applies 37# only to revision <= r0p2 of the Cortex A53 cpu. 38ERRATA_A53_826319 ?=0 39 40# Flag to apply erratum 835769 workaround at compile and link time. This 41# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this 42# workaround can lead the linker to create "*.stub" sections. 43ERRATA_A53_835769 ?=0 44 45# Flag to apply erratum 836870 workaround during reset. This erratum applies 46# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this 47# erratum workaround is enabled by default in hardware. 48ERRATA_A53_836870 ?=0 49 50# Flag to apply erratum 843419 workaround at link time. 51# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this 52# workaround could lead the linker to emit "*.stub" sections which are 4kB 53# aligned. 54ERRATA_A53_843419 ?=0 55 56# Flag to apply errata 855873 during reset. This errata applies to all 57# revisions of the Cortex A53 CPU, but this firmware workaround only works 58# for revisions r0p3 and higher. Earlier revisions are taken care 59# of by the rich OS. 60ERRATA_A53_855873 ?=0 61 62# Flag to apply erratum 806969 workaround during reset. This erratum applies 63# only to revision r0p0 of the Cortex A57 cpu. 64ERRATA_A57_806969 ?=0 65 66# Flag to apply erratum 813419 workaround during reset. This erratum applies 67# only to revision r0p0 of the Cortex A57 cpu. 68ERRATA_A57_813419 ?=0 69 70# Flag to apply erratum 813420 workaround during reset. This erratum applies 71# only to revision r0p0 of the Cortex A57 cpu. 72ERRATA_A57_813420 ?=0 73 74# Flag to apply erratum 826974 workaround during reset. This erratum applies 75# only to revision <= r1p1 of the Cortex A57 cpu. 76ERRATA_A57_826974 ?=0 77 78# Flag to apply erratum 826977 workaround during reset. This erratum applies 79# only to revision <= r1p1 of the Cortex A57 cpu. 80ERRATA_A57_826977 ?=0 81 82# Flag to apply erratum 828024 workaround during reset. This erratum applies 83# only to revision <= r1p1 of the Cortex A57 cpu. 84ERRATA_A57_828024 ?=0 85 86# Flag to apply erratum 829520 workaround during reset. This erratum applies 87# only to revision <= r1p2 of the Cortex A57 cpu. 88ERRATA_A57_829520 ?=0 89 90# Flag to apply erratum 833471 workaround during reset. This erratum applies 91# only to revision <= r1p2 of the Cortex A57 cpu. 92ERRATA_A57_833471 ?=0 93 94# Flag to apply erratum 855972 workaround during reset. This erratum applies 95# only to revision <= r1p3 of the Cortex A57 cpu. 96ERRATA_A57_859972 ?=0 97 98# Flag to apply erratum 855971 workaround during reset. This erratum applies 99# only to revision <= r0p3 of the Cortex A72 cpu. 100ERRATA_A72_859971 ?=0 101 102# Process ERRATA_A53_826319 flag 103$(eval $(call assert_boolean,ERRATA_A53_826319)) 104$(eval $(call add_define,ERRATA_A53_826319)) 105 106# Process ERRATA_A53_835769 flag 107$(eval $(call assert_boolean,ERRATA_A53_835769)) 108$(eval $(call add_define,ERRATA_A53_835769)) 109 110# Process ERRATA_A53_836870 flag 111$(eval $(call assert_boolean,ERRATA_A53_836870)) 112$(eval $(call add_define,ERRATA_A53_836870)) 113 114# Process ERRATA_A53_843419 flag 115$(eval $(call assert_boolean,ERRATA_A53_843419)) 116$(eval $(call add_define,ERRATA_A53_843419)) 117 118# Process ERRATA_A53_855873 flag 119$(eval $(call assert_boolean,ERRATA_A53_855873)) 120$(eval $(call add_define,ERRATA_A53_855873)) 121 122# Process ERRATA_A57_806969 flag 123$(eval $(call assert_boolean,ERRATA_A57_806969)) 124$(eval $(call add_define,ERRATA_A57_806969)) 125 126# Process ERRATA_A57_813419 flag 127$(eval $(call assert_boolean,ERRATA_A57_813419)) 128$(eval $(call add_define,ERRATA_A57_813419)) 129 130# Process ERRATA_A57_813420 flag 131$(eval $(call assert_boolean,ERRATA_A57_813420)) 132$(eval $(call add_define,ERRATA_A57_813420)) 133 134# Process ERRATA_A57_826974 flag 135$(eval $(call assert_boolean,ERRATA_A57_826974)) 136$(eval $(call add_define,ERRATA_A57_826974)) 137 138# Process ERRATA_A57_826977 flag 139$(eval $(call assert_boolean,ERRATA_A57_826977)) 140$(eval $(call add_define,ERRATA_A57_826977)) 141 142# Process ERRATA_A57_828024 flag 143$(eval $(call assert_boolean,ERRATA_A57_828024)) 144$(eval $(call add_define,ERRATA_A57_828024)) 145 146# Process ERRATA_A57_829520 flag 147$(eval $(call assert_boolean,ERRATA_A57_829520)) 148$(eval $(call add_define,ERRATA_A57_829520)) 149 150# Process ERRATA_A57_833471 flag 151$(eval $(call assert_boolean,ERRATA_A57_833471)) 152$(eval $(call add_define,ERRATA_A57_833471)) 153 154# Process ERRATA_A57_859972 flag 155$(eval $(call assert_boolean,ERRATA_A57_859972)) 156$(eval $(call add_define,ERRATA_A57_859972)) 157 158# Process ERRATA_A72_859971 flag 159$(eval $(call assert_boolean,ERRATA_A72_859971)) 160$(eval $(call add_define,ERRATA_A72_859971)) 161 162# Errata build flags 163ifneq (${ERRATA_A53_843419},0) 164TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419 165endif 166 167ifneq (${ERRATA_A53_835769},0) 168TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769 169TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769 170endif 171