1 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -emit-llvm %s -o - | opt -S -mem2reg | FileCheck %s
2
3 #include <arm_neon.h>
4
5 // CHECK-LABEL: define <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
6 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
7 // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
8 // CHECK: [[VMAXNM_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
9 // CHECK: [[VMAXNM_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>
10 // CHECK: [[VMAXNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> [[VMAXNM_V_I]], <2 x float> [[VMAXNM_V1_I]]) #2
11 // CHECK: [[VMAXNM_V3_I:%.*]] = bitcast <2 x float> [[VMAXNM_V2_I]] to <8 x i8>
12 // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[VMAXNM_V3_I]] to <2 x float>
13 // CHECK: ret <2 x float> [[TMP2]]
test_vmaxnm_f32(float32x2_t a,float32x2_t b)14 float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) {
15 return vmaxnm_f32(a, b);
16 }
17
18 // CHECK-LABEL: define <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #0 {
19 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
20 // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
21 // CHECK: [[VMAXNMQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
22 // CHECK: [[VMAXNMQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>
23 // CHECK: [[VMAXNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> [[VMAXNMQ_V_I]], <4 x float> [[VMAXNMQ_V1_I]]) #2
24 // CHECK: [[VMAXNMQ_V3_I:%.*]] = bitcast <4 x float> [[VMAXNMQ_V2_I]] to <16 x i8>
25 // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[VMAXNMQ_V3_I]] to <4 x float>
26 // CHECK: ret <4 x float> [[TMP2]]
test_vmaxnmq_f32(float32x4_t a,float32x4_t b)27 float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) {
28 return vmaxnmq_f32(a, b);
29 }
30
31 // CHECK-LABEL: define <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
32 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
33 // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
34 // CHECK: [[VMINNM_V_I:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
35 // CHECK: [[VMINNM_V1_I:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float>
36 // CHECK: [[VMINNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> [[VMINNM_V_I]], <2 x float> [[VMINNM_V1_I]]) #2
37 // CHECK: [[VMINNM_V3_I:%.*]] = bitcast <2 x float> [[VMINNM_V2_I]] to <8 x i8>
38 // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[VMINNM_V3_I]] to <2 x float>
39 // CHECK: ret <2 x float> [[TMP2]]
test_vminnm_f32(float32x2_t a,float32x2_t b)40 float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) {
41 return vminnm_f32(a, b);
42 }
43
44 // CHECK-LABEL: define <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #0 {
45 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
46 // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
47 // CHECK: [[VMINNMQ_V_I:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
48 // CHECK: [[VMINNMQ_V1_I:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float>
49 // CHECK: [[VMINNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> [[VMINNMQ_V_I]], <4 x float> [[VMINNMQ_V1_I]]) #2
50 // CHECK: [[VMINNMQ_V3_I:%.*]] = bitcast <4 x float> [[VMINNMQ_V2_I]] to <16 x i8>
51 // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[VMINNMQ_V3_I]] to <4 x float>
52 // CHECK: ret <4 x float> [[TMP2]]
test_vminnmq_f32(float32x4_t a,float32x4_t b)53 float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) {
54 return vminnmq_f32(a, b);
55 }
56