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1; RUN: llc < %s -mcpu=pwr7 -mattr=-vsx| FileCheck %s
2; RUN: llc < %s -mcpu=pwr7 -mattr=+vsx | FileCheck -check-prefix=CHECK-VSX %s
3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
4target triple = "powerpc64-unknown-linux-gnu"
5
6define void @copy_to_conceal(<8 x i16>* %inp) #0 {
7entry:
8  store <8 x i16> zeroinitializer, <8 x i16>* %inp, align 2
9  br label %if.end210
10
11if.end210:                                        ; preds = %entry
12  ret void
13
14; This will generate two align-1 i64 stores. Make sure that they are
15; indexed stores and not in r+i form (which require the offset to be
16; a multiple of 4).
17; CHECK: @copy_to_conceal
18; CHECK: stdx {{[0-9]+}}, 0,
19
20; CHECK-VSX: @copy_to_conceal
21; CHECK-VSX: stxvw4x {{[0-9]+}}, 0,
22}
23
24attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
25