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1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements the SelectionDAG class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetSelectionDAGInfo.h"
36 #include "llvm/Target/TargetOptions.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetIntrinsicInfo.h"
39 #include "llvm/Target/TargetMachine.h"
40 #include "llvm/Support/CommandLine.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/ManagedStatic.h"
44 #include "llvm/Support/MathExtras.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Support/Mutex.h"
47 #include "llvm/ADT/SetVector.h"
48 #include "llvm/ADT/SmallPtrSet.h"
49 #include "llvm/ADT/SmallSet.h"
50 #include "llvm/ADT/SmallVector.h"
51 #include "llvm/ADT/StringExtras.h"
52 #include <algorithm>
53 #include <cmath>
54 using namespace llvm;
55 
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
makeVTList(const EVT * VTs,unsigned NumVTs)58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59   SDVTList Res = {VTs, NumVTs};
60   return Res;
61 }
62 
EVTToAPFloatSemantics(EVT VT)63 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
64   switch (VT.getSimpleVT().SimpleTy) {
65   default: llvm_unreachable("Unknown FP format");
66   case MVT::f32:     return &APFloat::IEEEsingle;
67   case MVT::f64:     return &APFloat::IEEEdouble;
68   case MVT::f80:     return &APFloat::x87DoubleExtended;
69   case MVT::f128:    return &APFloat::IEEEquad;
70   case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
71   }
72 }
73 
~DAGUpdateListener()74 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 
76 //===----------------------------------------------------------------------===//
77 //                              ConstantFPSDNode Class
78 //===----------------------------------------------------------------------===//
79 
80 /// isExactlyValue - We don't rely on operator== working on double values, as
81 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
82 /// As such, this method can be used to do an exact bit-for-bit comparison of
83 /// two floating point values.
isExactlyValue(const APFloat & V) const84 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
85   return getValueAPF().bitwiseIsEqual(V);
86 }
87 
isValueValidForType(EVT VT,const APFloat & Val)88 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89                                            const APFloat& Val) {
90   assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 
92   // PPC long double cannot be converted to any other type.
93   if (VT == MVT::ppcf128 ||
94       &Val.getSemantics() == &APFloat::PPCDoubleDouble)
95     return false;
96 
97   // convert modifies in place, so make a copy.
98   APFloat Val2 = APFloat(Val);
99   bool losesInfo;
100   (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
101                       &losesInfo);
102   return !losesInfo;
103 }
104 
105 //===----------------------------------------------------------------------===//
106 //                              ISD Namespace
107 //===----------------------------------------------------------------------===//
108 
109 /// isBuildVectorAllOnes - Return true if the specified node is a
110 /// BUILD_VECTOR where all of the elements are ~0 or undef.
isBuildVectorAllOnes(const SDNode * N)111 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
112   // Look through a bit convert.
113   if (N->getOpcode() == ISD::BITCAST)
114     N = N->getOperand(0).getNode();
115 
116   if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 
118   unsigned i = 0, e = N->getNumOperands();
119 
120   // Skip over all of the undef values.
121   while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122     ++i;
123 
124   // Do not accept an all-undef vector.
125   if (i == e) return false;
126 
127   // Do not accept build_vectors that aren't all constants or which have non-~0
128   // elements.
129   SDValue NotZero = N->getOperand(i);
130   if (isa<ConstantSDNode>(NotZero)) {
131     if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
132       return false;
133   } else if (isa<ConstantFPSDNode>(NotZero)) {
134     if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
135                 bitcastToAPInt().isAllOnesValue())
136       return false;
137   } else
138     return false;
139 
140   // Okay, we have at least one ~0 value, check to see if the rest match or are
141   // undefs.
142   for (++i; i != e; ++i)
143     if (N->getOperand(i) != NotZero &&
144         N->getOperand(i).getOpcode() != ISD::UNDEF)
145       return false;
146   return true;
147 }
148 
149 
150 /// isBuildVectorAllZeros - Return true if the specified node is a
151 /// BUILD_VECTOR where all of the elements are 0 or undef.
isBuildVectorAllZeros(const SDNode * N)152 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
153   // Look through a bit convert.
154   if (N->getOpcode() == ISD::BITCAST)
155     N = N->getOperand(0).getNode();
156 
157   if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
158 
159   unsigned i = 0, e = N->getNumOperands();
160 
161   // Skip over all of the undef values.
162   while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
163     ++i;
164 
165   // Do not accept an all-undef vector.
166   if (i == e) return false;
167 
168   // Do not accept build_vectors that aren't all constants or which have non-0
169   // elements.
170   SDValue Zero = N->getOperand(i);
171   if (isa<ConstantSDNode>(Zero)) {
172     if (!cast<ConstantSDNode>(Zero)->isNullValue())
173       return false;
174   } else if (isa<ConstantFPSDNode>(Zero)) {
175     if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
176       return false;
177   } else
178     return false;
179 
180   // Okay, we have at least one 0 value, check to see if the rest match or are
181   // undefs.
182   for (++i; i != e; ++i)
183     if (N->getOperand(i) != Zero &&
184         N->getOperand(i).getOpcode() != ISD::UNDEF)
185       return false;
186   return true;
187 }
188 
189 /// isScalarToVector - Return true if the specified node is a
190 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
191 /// element is not an undef.
isScalarToVector(const SDNode * N)192 bool ISD::isScalarToVector(const SDNode *N) {
193   if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
194     return true;
195 
196   if (N->getOpcode() != ISD::BUILD_VECTOR)
197     return false;
198   if (N->getOperand(0).getOpcode() == ISD::UNDEF)
199     return false;
200   unsigned NumElems = N->getNumOperands();
201   if (NumElems == 1)
202     return false;
203   for (unsigned i = 1; i < NumElems; ++i) {
204     SDValue V = N->getOperand(i);
205     if (V.getOpcode() != ISD::UNDEF)
206       return false;
207   }
208   return true;
209 }
210 
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
getSetCCSwappedOperands(ISD::CondCode Operation)213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214   // To perform this operation, we just need to swap the L and G bits of the
215   // operation.
216   unsigned OldL = (Operation >> 2) & 1;
217   unsigned OldG = (Operation >> 1) & 1;
218   return ISD::CondCode((Operation & ~6) |  // Keep the N, U, E bits
219                        (OldL << 1) |       // New G bit
220                        (OldG << 2));       // New L bit.
221 }
222 
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
getSetCCInverse(ISD::CondCode Op,bool isInteger)225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226   unsigned Operation = Op;
227   if (isInteger)
228     Operation ^= 7;   // Flip L, G, E bits, but not U.
229   else
230     Operation ^= 15;  // Flip all of the condition bits.
231 
232   if (Operation > ISD::SETTRUE2)
233     Operation &= ~8;  // Don't let N and U bits get set.
234 
235   return ISD::CondCode(Operation);
236 }
237 
238 
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison.  Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
isSignedOp(ISD::CondCode Opcode)242 static int isSignedOp(ISD::CondCode Opcode) {
243   switch (Opcode) {
244   default: llvm_unreachable("Illegal integer setcc operation!");
245   case ISD::SETEQ:
246   case ISD::SETNE: return 0;
247   case ISD::SETLT:
248   case ISD::SETLE:
249   case ISD::SETGT:
250   case ISD::SETGE: return 1;
251   case ISD::SETULT:
252   case ISD::SETULE:
253   case ISD::SETUGT:
254   case ISD::SETUGE: return 2;
255   }
256 }
257 
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)).  This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 /// comparison.
getSetCCOrOperation(ISD::CondCode Op1,ISD::CondCode Op2,bool isInteger)262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263                                        bool isInteger) {
264   if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265     // Cannot fold a signed integer setcc with an unsigned integer setcc.
266     return ISD::SETCC_INVALID;
267 
268   unsigned Op = Op1 | Op2;  // Combine all of the condition bits.
269 
270   // If the N and U bits get set then the resultant comparison DOES suddenly
271   // care about orderedness, and is true when ordered.
272   if (Op > ISD::SETTRUE2)
273     Op &= ~16;     // Clear the U bit if the N bit is set.
274 
275   // Canonicalize illegal integer setcc's.
276   if (isInteger && Op == ISD::SETUNE)  // e.g. SETUGT | SETULT
277     Op = ISD::SETNE;
278 
279   return ISD::CondCode(Op);
280 }
281 
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)).  This
284 /// function returns zero if it is not possible to represent the resultant
285 /// comparison.
getSetCCAndOperation(ISD::CondCode Op1,ISD::CondCode Op2,bool isInteger)286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287                                         bool isInteger) {
288   if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289     // Cannot fold a signed setcc with an unsigned setcc.
290     return ISD::SETCC_INVALID;
291 
292   // Combine all of the condition bits.
293   ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 
295   // Canonicalize illegal integer setcc's.
296   if (isInteger) {
297     switch (Result) {
298     default: break;
299     case ISD::SETUO : Result = ISD::SETFALSE; break;  // SETUGT & SETULT
300     case ISD::SETOEQ:                                 // SETEQ  & SETU[LG]E
301     case ISD::SETUEQ: Result = ISD::SETEQ   ; break;  // SETUGE & SETULE
302     case ISD::SETOLT: Result = ISD::SETULT  ; break;  // SETULT & SETNE
303     case ISD::SETOGT: Result = ISD::SETUGT  ; break;  // SETUGT & SETNE
304     }
305   }
306 
307   return Result;
308 }
309 
310 //===----------------------------------------------------------------------===//
311 //                           SDNode Profile Support
312 //===----------------------------------------------------------------------===//
313 
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
315 ///
AddNodeIDOpcode(FoldingSetNodeID & ID,unsigned OpC)316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC)  {
317   ID.AddInteger(OpC);
318 }
319 
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
AddNodeIDValueTypes(FoldingSetNodeID & ID,SDVTList VTList)322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323   ID.AddPointer(VTList.VTs);
324 }
325 
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
327 ///
AddNodeIDOperands(FoldingSetNodeID & ID,const SDValue * Ops,unsigned NumOps)328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329                               const SDValue *Ops, unsigned NumOps) {
330   for (; NumOps; --NumOps, ++Ops) {
331     ID.AddPointer(Ops->getNode());
332     ID.AddInteger(Ops->getResNo());
333   }
334 }
335 
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 ///
AddNodeIDOperands(FoldingSetNodeID & ID,const SDUse * Ops,unsigned NumOps)338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339                               const SDUse *Ops, unsigned NumOps) {
340   for (; NumOps; --NumOps, ++Ops) {
341     ID.AddPointer(Ops->getNode());
342     ID.AddInteger(Ops->getResNo());
343   }
344 }
345 
AddNodeIDNode(FoldingSetNodeID & ID,unsigned short OpC,SDVTList VTList,const SDValue * OpList,unsigned N)346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347                           unsigned short OpC, SDVTList VTList,
348                           const SDValue *OpList, unsigned N) {
349   AddNodeIDOpcode(ID, OpC);
350   AddNodeIDValueTypes(ID, VTList);
351   AddNodeIDOperands(ID, OpList, N);
352 }
353 
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
355 /// the NodeID data.
AddNodeIDCustom(FoldingSetNodeID & ID,const SDNode * N)356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357   switch (N->getOpcode()) {
358   case ISD::TargetExternalSymbol:
359   case ISD::ExternalSymbol:
360     llvm_unreachable("Should only be used on nodes with operands");
361   default: break;  // Normal nodes don't need extra info.
362   case ISD::TargetConstant:
363   case ISD::Constant:
364     ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
365     break;
366   case ISD::TargetConstantFP:
367   case ISD::ConstantFP: {
368     ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
369     break;
370   }
371   case ISD::TargetGlobalAddress:
372   case ISD::GlobalAddress:
373   case ISD::TargetGlobalTLSAddress:
374   case ISD::GlobalTLSAddress: {
375     const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376     ID.AddPointer(GA->getGlobal());
377     ID.AddInteger(GA->getOffset());
378     ID.AddInteger(GA->getTargetFlags());
379     break;
380   }
381   case ISD::BasicBlock:
382     ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
383     break;
384   case ISD::Register:
385     ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
386     break;
387 
388   case ISD::SRCVALUE:
389     ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
390     break;
391   case ISD::FrameIndex:
392   case ISD::TargetFrameIndex:
393     ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
394     break;
395   case ISD::JumpTable:
396   case ISD::TargetJumpTable:
397     ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398     ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
399     break;
400   case ISD::ConstantPool:
401   case ISD::TargetConstantPool: {
402     const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403     ID.AddInteger(CP->getAlignment());
404     ID.AddInteger(CP->getOffset());
405     if (CP->isMachineConstantPoolEntry())
406       CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
407     else
408       ID.AddPointer(CP->getConstVal());
409     ID.AddInteger(CP->getTargetFlags());
410     break;
411   }
412   case ISD::LOAD: {
413     const LoadSDNode *LD = cast<LoadSDNode>(N);
414     ID.AddInteger(LD->getMemoryVT().getRawBits());
415     ID.AddInteger(LD->getRawSubclassData());
416     break;
417   }
418   case ISD::STORE: {
419     const StoreSDNode *ST = cast<StoreSDNode>(N);
420     ID.AddInteger(ST->getMemoryVT().getRawBits());
421     ID.AddInteger(ST->getRawSubclassData());
422     break;
423   }
424   case ISD::ATOMIC_CMP_SWAP:
425   case ISD::ATOMIC_SWAP:
426   case ISD::ATOMIC_LOAD_ADD:
427   case ISD::ATOMIC_LOAD_SUB:
428   case ISD::ATOMIC_LOAD_AND:
429   case ISD::ATOMIC_LOAD_OR:
430   case ISD::ATOMIC_LOAD_XOR:
431   case ISD::ATOMIC_LOAD_NAND:
432   case ISD::ATOMIC_LOAD_MIN:
433   case ISD::ATOMIC_LOAD_MAX:
434   case ISD::ATOMIC_LOAD_UMIN:
435   case ISD::ATOMIC_LOAD_UMAX:
436   case ISD::ATOMIC_LOAD:
437   case ISD::ATOMIC_STORE: {
438     const AtomicSDNode *AT = cast<AtomicSDNode>(N);
439     ID.AddInteger(AT->getMemoryVT().getRawBits());
440     ID.AddInteger(AT->getRawSubclassData());
441     break;
442   }
443   case ISD::VECTOR_SHUFFLE: {
444     const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
445     for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446          i != e; ++i)
447       ID.AddInteger(SVN->getMaskElt(i));
448     break;
449   }
450   case ISD::TargetBlockAddress:
451   case ISD::BlockAddress: {
452     ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
453     ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
454     break;
455   }
456   } // end switch (N->getOpcode())
457 }
458 
459 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 /// data.
AddNodeIDNode(FoldingSetNodeID & ID,const SDNode * N)461 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
462   AddNodeIDOpcode(ID, N->getOpcode());
463   // Add the return value info.
464   AddNodeIDValueTypes(ID, N->getVTList());
465   // Add the operand info.
466   AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 
468   // Handle SDNode leafs with special info.
469   AddNodeIDCustom(ID, N);
470 }
471 
472 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
473 /// the CSE map that carries volatility, temporalness, indexing mode, and
474 /// extension/truncation information.
475 ///
476 static inline unsigned
encodeMemSDNodeFlags(int ConvType,ISD::MemIndexedMode AM,bool isVolatile,bool isNonTemporal)477 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
478                      bool isNonTemporal) {
479   assert((ConvType & 3) == ConvType &&
480          "ConvType may not require more than 2 bits!");
481   assert((AM & 7) == AM &&
482          "AM may not require more than 3 bits!");
483   return ConvType |
484          (AM << 2) |
485          (isVolatile << 5) |
486          (isNonTemporal << 6);
487 }
488 
489 //===----------------------------------------------------------------------===//
490 //                              SelectionDAG Class
491 //===----------------------------------------------------------------------===//
492 
493 /// doNotCSE - Return true if CSE should not be performed for this node.
doNotCSE(SDNode * N)494 static bool doNotCSE(SDNode *N) {
495   if (N->getValueType(0) == MVT::Glue)
496     return true; // Never CSE anything that produces a flag.
497 
498   switch (N->getOpcode()) {
499   default: break;
500   case ISD::HANDLENODE:
501   case ISD::EH_LABEL:
502     return true;   // Never CSE these nodes.
503   }
504 
505   // Check that remaining values produced are not flags.
506   for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507     if (N->getValueType(i) == MVT::Glue)
508       return true; // Never CSE anything that produces a flag.
509 
510   return false;
511 }
512 
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 /// SelectionDAG.
RemoveDeadNodes()515 void SelectionDAG::RemoveDeadNodes() {
516   // Create a dummy node (which is not added to allnodes), that adds a reference
517   // to the root node, preventing it from being deleted.
518   HandleSDNode Dummy(getRoot());
519 
520   SmallVector<SDNode*, 128> DeadNodes;
521 
522   // Add all obviously-dead nodes to the DeadNodes worklist.
523   for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524     if (I->use_empty())
525       DeadNodes.push_back(I);
526 
527   RemoveDeadNodes(DeadNodes);
528 
529   // If the root changed (e.g. it was a dead load, update the root).
530   setRoot(Dummy.getValue());
531 }
532 
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
RemoveDeadNodes(SmallVectorImpl<SDNode * > & DeadNodes,DAGUpdateListener * UpdateListener)535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536                                    DAGUpdateListener *UpdateListener) {
537 
538   // Process the worklist, deleting the nodes and adding their uses to the
539   // worklist.
540   while (!DeadNodes.empty()) {
541     SDNode *N = DeadNodes.pop_back_val();
542 
543     if (UpdateListener)
544       UpdateListener->NodeDeleted(N, 0);
545 
546     // Take the node out of the appropriate CSE map.
547     RemoveNodeFromCSEMaps(N);
548 
549     // Next, brutally remove the operand list.  This is safe to do, as there are
550     // no cycles in the graph.
551     for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552       SDUse &Use = *I++;
553       SDNode *Operand = Use.getNode();
554       Use.set(SDValue());
555 
556       // Now that we removed this operand, see if there are no uses of it left.
557       if (Operand->use_empty())
558         DeadNodes.push_back(Operand);
559     }
560 
561     DeallocateNode(N);
562   }
563 }
564 
RemoveDeadNode(SDNode * N,DAGUpdateListener * UpdateListener)565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566   SmallVector<SDNode*, 16> DeadNodes(1, N);
567   RemoveDeadNodes(DeadNodes, UpdateListener);
568 }
569 
DeleteNode(SDNode * N)570 void SelectionDAG::DeleteNode(SDNode *N) {
571   // First take this out of the appropriate CSE map.
572   RemoveNodeFromCSEMaps(N);
573 
574   // Finally, remove uses due to operands of this node, remove from the
575   // AllNodes list, and delete the node.
576   DeleteNodeNotInCSEMaps(N);
577 }
578 
DeleteNodeNotInCSEMaps(SDNode * N)579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580   assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581   assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 
583   // Drop all of the operands and decrement used node's use counts.
584   N->DropOperands();
585 
586   DeallocateNode(N);
587 }
588 
DeallocateNode(SDNode * N)589 void SelectionDAG::DeallocateNode(SDNode *N) {
590   if (N->OperandsNeedDelete)
591     delete[] N->OperandList;
592 
593   // Set the opcode to DELETED_NODE to help catch bugs when node
594   // memory is reallocated.
595   N->NodeType = ISD::DELETED_NODE;
596 
597   NodeAllocator.Deallocate(AllNodes.remove(N));
598 
599   // Remove the ordering of this node.
600   Ordering->remove(N);
601 
602   // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
603   ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
604   for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
605     DbgVals[i]->setIsInvalidated();
606 }
607 
608 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
609 /// correspond to it.  This is useful when we're about to delete or repurpose
610 /// the node.  We don't want future request for structurally identical nodes
611 /// to return N anymore.
RemoveNodeFromCSEMaps(SDNode * N)612 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613   bool Erased = false;
614   switch (N->getOpcode()) {
615   case ISD::HANDLENODE: return false;  // noop.
616   case ISD::CONDCODE:
617     assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
618            "Cond code doesn't exist!");
619     Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
620     CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
621     break;
622   case ISD::ExternalSymbol:
623     Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
624     break;
625   case ISD::TargetExternalSymbol: {
626     ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
627     Erased = TargetExternalSymbols.erase(
628                std::pair<std::string,unsigned char>(ESN->getSymbol(),
629                                                     ESN->getTargetFlags()));
630     break;
631   }
632   case ISD::VALUETYPE: {
633     EVT VT = cast<VTSDNode>(N)->getVT();
634     if (VT.isExtended()) {
635       Erased = ExtendedValueTypeNodes.erase(VT);
636     } else {
637       Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
638       ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
639     }
640     break;
641   }
642   default:
643     // Remove it from the CSE Map.
644     assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
645     assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
646     Erased = CSEMap.RemoveNode(N);
647     break;
648   }
649 #ifndef NDEBUG
650   // Verify that the node was actually in one of the CSE maps, unless it has a
651   // flag result (which cannot be CSE'd) or is one of the special cases that are
652   // not subject to CSE.
653   if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
654       !N->isMachineOpcode() && !doNotCSE(N)) {
655     N->dump(this);
656     dbgs() << "\n";
657     llvm_unreachable("Node is not in map!");
658   }
659 #endif
660   return Erased;
661 }
662 
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
667 ///
668 void
AddModifiedNodeToCSEMaps(SDNode * N,DAGUpdateListener * UpdateListener)669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670                                        DAGUpdateListener *UpdateListener) {
671   // For node types that aren't CSE'd, just act as if no identical node
672   // already exists.
673   if (!doNotCSE(N)) {
674     SDNode *Existing = CSEMap.GetOrInsertNode(N);
675     if (Existing != N) {
676       // If there was already an existing matching node, use ReplaceAllUsesWith
677       // to replace the dead one with the existing one.  This can cause
678       // recursive merging of other unrelated nodes down the line.
679       ReplaceAllUsesWith(N, Existing, UpdateListener);
680 
681       // N is now dead.  Inform the listener if it exists and delete it.
682       if (UpdateListener)
683         UpdateListener->NodeDeleted(N, Existing);
684       DeleteNodeNotInCSEMaps(N);
685       return;
686     }
687   }
688 
689   // If the node doesn't already exist, we updated it.  Inform a listener if
690   // it exists.
691   if (UpdateListener)
692     UpdateListener->NodeUpdated(N);
693 }
694 
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified.  If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take.  If a
698 /// node already exists with these operands, the slot will be non-null.
FindModifiedNodeSlot(SDNode * N,SDValue Op,void * & InsertPos)699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
700                                            void *&InsertPos) {
701   if (doNotCSE(N))
702     return 0;
703 
704   SDValue Ops[] = { Op };
705   FoldingSetNodeID ID;
706   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707   AddNodeIDCustom(ID, N);
708   SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
709   return Node;
710 }
711 
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified.  If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take.  If a
715 /// node already exists with these operands, the slot will be non-null.
FindModifiedNodeSlot(SDNode * N,SDValue Op1,SDValue Op2,void * & InsertPos)716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717                                            SDValue Op1, SDValue Op2,
718                                            void *&InsertPos) {
719   if (doNotCSE(N))
720     return 0;
721 
722   SDValue Ops[] = { Op1, Op2 };
723   FoldingSetNodeID ID;
724   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725   AddNodeIDCustom(ID, N);
726   SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
727   return Node;
728 }
729 
730 
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified.  If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take.  If a
734 /// node already exists with these operands, the slot will be non-null.
FindModifiedNodeSlot(SDNode * N,const SDValue * Ops,unsigned NumOps,void * & InsertPos)735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736                                            const SDValue *Ops,unsigned NumOps,
737                                            void *&InsertPos) {
738   if (doNotCSE(N))
739     return 0;
740 
741   FoldingSetNodeID ID;
742   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743   AddNodeIDCustom(ID, N);
744   SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
745   return Node;
746 }
747 
748 #ifndef NDEBUG
749 /// VerifyNodeCommon - Sanity check the given node.  Aborts if it is invalid.
VerifyNodeCommon(SDNode * N)750 static void VerifyNodeCommon(SDNode *N) {
751   switch (N->getOpcode()) {
752   default:
753     break;
754   case ISD::BUILD_PAIR: {
755     EVT VT = N->getValueType(0);
756     assert(N->getNumValues() == 1 && "Too many results!");
757     assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
758            "Wrong return type!");
759     assert(N->getNumOperands() == 2 && "Wrong number of operands!");
760     assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
761            "Mismatched operand types!");
762     assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
763            "Wrong operand type!");
764     assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
765            "Wrong return type size");
766     break;
767   }
768   case ISD::BUILD_VECTOR: {
769     assert(N->getNumValues() == 1 && "Too many results!");
770     assert(N->getValueType(0).isVector() && "Wrong return type!");
771     assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
772            "Wrong number of operands!");
773     EVT EltVT = N->getValueType(0).getVectorElementType();
774     for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
775       assert((I->getValueType() == EltVT ||
776              (EltVT.isInteger() && I->getValueType().isInteger() &&
777               EltVT.bitsLE(I->getValueType()))) &&
778             "Wrong operand type!");
779       assert(I->getValueType() == N->getOperand(0).getValueType() &&
780              "Operands must all have the same type");
781     }
782     break;
783   }
784   }
785 }
786 
787 /// VerifySDNode - Sanity check the given SDNode.  Aborts if it is invalid.
VerifySDNode(SDNode * N)788 static void VerifySDNode(SDNode *N) {
789   // The SDNode allocators cannot be used to allocate nodes with fields that are
790   // not present in an SDNode!
791   assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
792   assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
793   assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
794   assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
795   assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
796   assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
797   assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
798   assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
799   assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
800   assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
801   assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
802   assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
803   assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
804   assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
805   assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
806   assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
807   assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
808   assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
809   assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
810 
811   VerifyNodeCommon(N);
812 }
813 
814 /// VerifyMachineNode - Sanity check the given MachineNode.  Aborts if it is
815 /// invalid.
VerifyMachineNode(SDNode * N)816 static void VerifyMachineNode(SDNode *N) {
817   // The MachineNode allocators cannot be used to allocate nodes with fields
818   // that are not present in a MachineNode!
819   // Currently there are no such nodes.
820 
821   VerifyNodeCommon(N);
822 }
823 #endif // NDEBUG
824 
825 /// getEVTAlignment - Compute the default alignment value for the
826 /// given type.
827 ///
getEVTAlignment(EVT VT) const828 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
829   Type *Ty = VT == MVT::iPTR ?
830                    PointerType::get(Type::getInt8Ty(*getContext()), 0) :
831                    VT.getTypeForEVT(*getContext());
832 
833   return TLI.getTargetData()->getABITypeAlignment(Ty);
834 }
835 
836 // EntryNode could meaningfully have debug info if we can find it...
SelectionDAG(const TargetMachine & tm)837 SelectionDAG::SelectionDAG(const TargetMachine &tm)
838   : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
839     EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
840     Root(getEntryNode()), Ordering(0) {
841   AllNodes.push_back(&EntryNode);
842   Ordering = new SDNodeOrdering();
843   DbgInfo = new SDDbgInfo();
844 }
845 
init(MachineFunction & mf)846 void SelectionDAG::init(MachineFunction &mf) {
847   MF = &mf;
848   Context = &mf.getFunction()->getContext();
849 }
850 
~SelectionDAG()851 SelectionDAG::~SelectionDAG() {
852   allnodes_clear();
853   delete Ordering;
854   delete DbgInfo;
855 }
856 
allnodes_clear()857 void SelectionDAG::allnodes_clear() {
858   assert(&*AllNodes.begin() == &EntryNode);
859   AllNodes.remove(AllNodes.begin());
860   while (!AllNodes.empty())
861     DeallocateNode(AllNodes.begin());
862 }
863 
clear()864 void SelectionDAG::clear() {
865   allnodes_clear();
866   OperandAllocator.Reset();
867   CSEMap.clear();
868 
869   ExtendedValueTypeNodes.clear();
870   ExternalSymbols.clear();
871   TargetExternalSymbols.clear();
872   std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
873             static_cast<CondCodeSDNode*>(0));
874   std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
875             static_cast<SDNode*>(0));
876 
877   EntryNode.UseList = 0;
878   AllNodes.push_back(&EntryNode);
879   Root = getEntryNode();
880   Ordering->clear();
881   DbgInfo->clear();
882 }
883 
getAnyExtOrTrunc(SDValue Op,DebugLoc DL,EVT VT)884 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
885   return VT.bitsGT(Op.getValueType()) ?
886     getNode(ISD::ANY_EXTEND, DL, VT, Op) :
887     getNode(ISD::TRUNCATE, DL, VT, Op);
888 }
889 
getSExtOrTrunc(SDValue Op,DebugLoc DL,EVT VT)890 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
891   return VT.bitsGT(Op.getValueType()) ?
892     getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
893     getNode(ISD::TRUNCATE, DL, VT, Op);
894 }
895 
getZExtOrTrunc(SDValue Op,DebugLoc DL,EVT VT)896 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
897   return VT.bitsGT(Op.getValueType()) ?
898     getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
899     getNode(ISD::TRUNCATE, DL, VT, Op);
900 }
901 
getZeroExtendInReg(SDValue Op,DebugLoc DL,EVT VT)902 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
903   assert(!VT.isVector() &&
904          "getZeroExtendInReg should use the vector element type instead of "
905          "the vector type!");
906   if (Op.getValueType() == VT) return Op;
907   unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
908   APInt Imm = APInt::getLowBitsSet(BitWidth,
909                                    VT.getSizeInBits());
910   return getNode(ISD::AND, DL, Op.getValueType(), Op,
911                  getConstant(Imm, Op.getValueType()));
912 }
913 
914 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
915 ///
getNOT(DebugLoc DL,SDValue Val,EVT VT)916 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
917   EVT EltVT = VT.getScalarType();
918   SDValue NegOne =
919     getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
920   return getNode(ISD::XOR, DL, VT, Val, NegOne);
921 }
922 
getConstant(uint64_t Val,EVT VT,bool isT)923 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
924   EVT EltVT = VT.getScalarType();
925   assert((EltVT.getSizeInBits() >= 64 ||
926          (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
927          "getConstant with a uint64_t value that doesn't fit in the type!");
928   return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
929 }
930 
getConstant(const APInt & Val,EVT VT,bool isT)931 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
932   return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
933 }
934 
getConstant(const ConstantInt & Val,EVT VT,bool isT)935 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
936   assert(VT.isInteger() && "Cannot create FP integer constant!");
937 
938   EVT EltVT = VT.getScalarType();
939   const ConstantInt *Elt = &Val;
940 
941   // In some cases the vector type is legal but the element type is illegal and
942   // needs to be promoted, for example v8i8 on ARM.  In this case, promote the
943   // inserted value (the type does not need to match the vector element type).
944   // Any extra bits introduced will be truncated away.
945   if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
946       TargetLowering::TypePromoteInteger) {
947    EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
948    APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
949    Elt = ConstantInt::get(*getContext(), NewVal);
950   }
951 
952   assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
953          "APInt size does not match type size!");
954   unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
955   FoldingSetNodeID ID;
956   AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
957   ID.AddPointer(Elt);
958   void *IP = 0;
959   SDNode *N = NULL;
960   if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
961     if (!VT.isVector())
962       return SDValue(N, 0);
963 
964   if (!N) {
965     N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
966     CSEMap.InsertNode(N, IP);
967     AllNodes.push_back(N);
968   }
969 
970   SDValue Result(N, 0);
971   if (VT.isVector()) {
972     SmallVector<SDValue, 8> Ops;
973     Ops.assign(VT.getVectorNumElements(), Result);
974     Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
975   }
976   return Result;
977 }
978 
getIntPtrConstant(uint64_t Val,bool isTarget)979 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
980   return getConstant(Val, TLI.getPointerTy(), isTarget);
981 }
982 
983 
getConstantFP(const APFloat & V,EVT VT,bool isTarget)984 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
985   return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
986 }
987 
getConstantFP(const ConstantFP & V,EVT VT,bool isTarget)988 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
989   assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
990 
991   EVT EltVT = VT.getScalarType();
992 
993   // Do the map lookup using the actual bit pattern for the floating point
994   // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
995   // we don't have issues with SNANs.
996   unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
997   FoldingSetNodeID ID;
998   AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
999   ID.AddPointer(&V);
1000   void *IP = 0;
1001   SDNode *N = NULL;
1002   if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1003     if (!VT.isVector())
1004       return SDValue(N, 0);
1005 
1006   if (!N) {
1007     N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1008     CSEMap.InsertNode(N, IP);
1009     AllNodes.push_back(N);
1010   }
1011 
1012   SDValue Result(N, 0);
1013   if (VT.isVector()) {
1014     SmallVector<SDValue, 8> Ops;
1015     Ops.assign(VT.getVectorNumElements(), Result);
1016     // FIXME DebugLoc info might be appropriate here
1017     Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1018   }
1019   return Result;
1020 }
1021 
getConstantFP(double Val,EVT VT,bool isTarget)1022 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1023   EVT EltVT = VT.getScalarType();
1024   if (EltVT==MVT::f32)
1025     return getConstantFP(APFloat((float)Val), VT, isTarget);
1026   else if (EltVT==MVT::f64)
1027     return getConstantFP(APFloat(Val), VT, isTarget);
1028   else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1029     bool ignored;
1030     APFloat apf = APFloat(Val);
1031     apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1032                 &ignored);
1033     return getConstantFP(apf, VT, isTarget);
1034   } else {
1035     assert(0 && "Unsupported type in getConstantFP");
1036     return SDValue();
1037   }
1038 }
1039 
getGlobalAddress(const GlobalValue * GV,DebugLoc DL,EVT VT,int64_t Offset,bool isTargetGA,unsigned char TargetFlags)1040 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1041                                        EVT VT, int64_t Offset,
1042                                        bool isTargetGA,
1043                                        unsigned char TargetFlags) {
1044   assert((TargetFlags == 0 || isTargetGA) &&
1045          "Cannot set target flags on target-independent globals");
1046 
1047   // Truncate (with sign-extension) the offset value to the pointer size.
1048   EVT PTy = TLI.getPointerTy();
1049   unsigned BitWidth = PTy.getSizeInBits();
1050   if (BitWidth < 64)
1051     Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1052 
1053   const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1054   if (!GVar) {
1055     // If GV is an alias then use the aliasee for determining thread-localness.
1056     if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1057       GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1058   }
1059 
1060   unsigned Opc;
1061   if (GVar && GVar->isThreadLocal())
1062     Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1063   else
1064     Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1065 
1066   FoldingSetNodeID ID;
1067   AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1068   ID.AddPointer(GV);
1069   ID.AddInteger(Offset);
1070   ID.AddInteger(TargetFlags);
1071   void *IP = 0;
1072   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1073     return SDValue(E, 0);
1074 
1075   SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1076                                                       Offset, TargetFlags);
1077   CSEMap.InsertNode(N, IP);
1078   AllNodes.push_back(N);
1079   return SDValue(N, 0);
1080 }
1081 
getFrameIndex(int FI,EVT VT,bool isTarget)1082 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1083   unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1084   FoldingSetNodeID ID;
1085   AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1086   ID.AddInteger(FI);
1087   void *IP = 0;
1088   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1089     return SDValue(E, 0);
1090 
1091   SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1092   CSEMap.InsertNode(N, IP);
1093   AllNodes.push_back(N);
1094   return SDValue(N, 0);
1095 }
1096 
getJumpTable(int JTI,EVT VT,bool isTarget,unsigned char TargetFlags)1097 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1098                                    unsigned char TargetFlags) {
1099   assert((TargetFlags == 0 || isTarget) &&
1100          "Cannot set target flags on target-independent jump tables");
1101   unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1102   FoldingSetNodeID ID;
1103   AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1104   ID.AddInteger(JTI);
1105   ID.AddInteger(TargetFlags);
1106   void *IP = 0;
1107   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1108     return SDValue(E, 0);
1109 
1110   SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1111                                                   TargetFlags);
1112   CSEMap.InsertNode(N, IP);
1113   AllNodes.push_back(N);
1114   return SDValue(N, 0);
1115 }
1116 
getConstantPool(const Constant * C,EVT VT,unsigned Alignment,int Offset,bool isTarget,unsigned char TargetFlags)1117 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1118                                       unsigned Alignment, int Offset,
1119                                       bool isTarget,
1120                                       unsigned char TargetFlags) {
1121   assert((TargetFlags == 0 || isTarget) &&
1122          "Cannot set target flags on target-independent globals");
1123   if (Alignment == 0)
1124     Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1125   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1126   FoldingSetNodeID ID;
1127   AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1128   ID.AddInteger(Alignment);
1129   ID.AddInteger(Offset);
1130   ID.AddPointer(C);
1131   ID.AddInteger(TargetFlags);
1132   void *IP = 0;
1133   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1134     return SDValue(E, 0);
1135 
1136   SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1137                                                      Alignment, TargetFlags);
1138   CSEMap.InsertNode(N, IP);
1139   AllNodes.push_back(N);
1140   return SDValue(N, 0);
1141 }
1142 
1143 
getConstantPool(MachineConstantPoolValue * C,EVT VT,unsigned Alignment,int Offset,bool isTarget,unsigned char TargetFlags)1144 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1145                                       unsigned Alignment, int Offset,
1146                                       bool isTarget,
1147                                       unsigned char TargetFlags) {
1148   assert((TargetFlags == 0 || isTarget) &&
1149          "Cannot set target flags on target-independent globals");
1150   if (Alignment == 0)
1151     Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1152   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1153   FoldingSetNodeID ID;
1154   AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1155   ID.AddInteger(Alignment);
1156   ID.AddInteger(Offset);
1157   C->addSelectionDAGCSEId(ID);
1158   ID.AddInteger(TargetFlags);
1159   void *IP = 0;
1160   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1161     return SDValue(E, 0);
1162 
1163   SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1164                                                      Alignment, TargetFlags);
1165   CSEMap.InsertNode(N, IP);
1166   AllNodes.push_back(N);
1167   return SDValue(N, 0);
1168 }
1169 
getBasicBlock(MachineBasicBlock * MBB)1170 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1171   FoldingSetNodeID ID;
1172   AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1173   ID.AddPointer(MBB);
1174   void *IP = 0;
1175   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1176     return SDValue(E, 0);
1177 
1178   SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1179   CSEMap.InsertNode(N, IP);
1180   AllNodes.push_back(N);
1181   return SDValue(N, 0);
1182 }
1183 
getValueType(EVT VT)1184 SDValue SelectionDAG::getValueType(EVT VT) {
1185   if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1186       ValueTypeNodes.size())
1187     ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1188 
1189   SDNode *&N = VT.isExtended() ?
1190     ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1191 
1192   if (N) return SDValue(N, 0);
1193   N = new (NodeAllocator) VTSDNode(VT);
1194   AllNodes.push_back(N);
1195   return SDValue(N, 0);
1196 }
1197 
getExternalSymbol(const char * Sym,EVT VT)1198 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1199   SDNode *&N = ExternalSymbols[Sym];
1200   if (N) return SDValue(N, 0);
1201   N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1202   AllNodes.push_back(N);
1203   return SDValue(N, 0);
1204 }
1205 
getTargetExternalSymbol(const char * Sym,EVT VT,unsigned char TargetFlags)1206 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1207                                               unsigned char TargetFlags) {
1208   SDNode *&N =
1209     TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1210                                                                TargetFlags)];
1211   if (N) return SDValue(N, 0);
1212   N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1213   AllNodes.push_back(N);
1214   return SDValue(N, 0);
1215 }
1216 
getCondCode(ISD::CondCode Cond)1217 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1218   if ((unsigned)Cond >= CondCodeNodes.size())
1219     CondCodeNodes.resize(Cond+1);
1220 
1221   if (CondCodeNodes[Cond] == 0) {
1222     CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1223     CondCodeNodes[Cond] = N;
1224     AllNodes.push_back(N);
1225   }
1226 
1227   return SDValue(CondCodeNodes[Cond], 0);
1228 }
1229 
1230 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1231 // the shuffle mask M that point at N1 to point at N2, and indices that point
1232 // N2 to point at N1.
commuteShuffle(SDValue & N1,SDValue & N2,SmallVectorImpl<int> & M)1233 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1234   std::swap(N1, N2);
1235   int NElts = M.size();
1236   for (int i = 0; i != NElts; ++i) {
1237     if (M[i] >= NElts)
1238       M[i] -= NElts;
1239     else if (M[i] >= 0)
1240       M[i] += NElts;
1241   }
1242 }
1243 
getVectorShuffle(EVT VT,DebugLoc dl,SDValue N1,SDValue N2,const int * Mask)1244 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1245                                        SDValue N2, const int *Mask) {
1246   assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1247   assert(VT.isVector() && N1.getValueType().isVector() &&
1248          "Vector Shuffle VTs must be a vectors");
1249   assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1250          && "Vector Shuffle VTs must have same element type");
1251 
1252   // Canonicalize shuffle undef, undef -> undef
1253   if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1254     return getUNDEF(VT);
1255 
1256   // Validate that all indices in Mask are within the range of the elements
1257   // input to the shuffle.
1258   unsigned NElts = VT.getVectorNumElements();
1259   SmallVector<int, 8> MaskVec;
1260   for (unsigned i = 0; i != NElts; ++i) {
1261     assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1262     MaskVec.push_back(Mask[i]);
1263   }
1264 
1265   // Canonicalize shuffle v, v -> v, undef
1266   if (N1 == N2) {
1267     N2 = getUNDEF(VT);
1268     for (unsigned i = 0; i != NElts; ++i)
1269       if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1270   }
1271 
1272   // Canonicalize shuffle undef, v -> v, undef.  Commute the shuffle mask.
1273   if (N1.getOpcode() == ISD::UNDEF)
1274     commuteShuffle(N1, N2, MaskVec);
1275 
1276   // Canonicalize all index into lhs, -> shuffle lhs, undef
1277   // Canonicalize all index into rhs, -> shuffle rhs, undef
1278   bool AllLHS = true, AllRHS = true;
1279   bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1280   for (unsigned i = 0; i != NElts; ++i) {
1281     if (MaskVec[i] >= (int)NElts) {
1282       if (N2Undef)
1283         MaskVec[i] = -1;
1284       else
1285         AllLHS = false;
1286     } else if (MaskVec[i] >= 0) {
1287       AllRHS = false;
1288     }
1289   }
1290   if (AllLHS && AllRHS)
1291     return getUNDEF(VT);
1292   if (AllLHS && !N2Undef)
1293     N2 = getUNDEF(VT);
1294   if (AllRHS) {
1295     N1 = getUNDEF(VT);
1296     commuteShuffle(N1, N2, MaskVec);
1297   }
1298 
1299   // If Identity shuffle, or all shuffle in to undef, return that node.
1300   bool AllUndef = true;
1301   bool Identity = true;
1302   for (unsigned i = 0; i != NElts; ++i) {
1303     if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1304     if (MaskVec[i] >= 0) AllUndef = false;
1305   }
1306   if (Identity && NElts == N1.getValueType().getVectorNumElements())
1307     return N1;
1308   if (AllUndef)
1309     return getUNDEF(VT);
1310 
1311   FoldingSetNodeID ID;
1312   SDValue Ops[2] = { N1, N2 };
1313   AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1314   for (unsigned i = 0; i != NElts; ++i)
1315     ID.AddInteger(MaskVec[i]);
1316 
1317   void* IP = 0;
1318   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1319     return SDValue(E, 0);
1320 
1321   // Allocate the mask array for the node out of the BumpPtrAllocator, since
1322   // SDNode doesn't have access to it.  This memory will be "leaked" when
1323   // the node is deallocated, but recovered when the NodeAllocator is released.
1324   int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1325   memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1326 
1327   ShuffleVectorSDNode *N =
1328     new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1329   CSEMap.InsertNode(N, IP);
1330   AllNodes.push_back(N);
1331   return SDValue(N, 0);
1332 }
1333 
getConvertRndSat(EVT VT,DebugLoc dl,SDValue Val,SDValue DTy,SDValue STy,SDValue Rnd,SDValue Sat,ISD::CvtCode Code)1334 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1335                                        SDValue Val, SDValue DTy,
1336                                        SDValue STy, SDValue Rnd, SDValue Sat,
1337                                        ISD::CvtCode Code) {
1338   // If the src and dest types are the same and the conversion is between
1339   // integer types of the same sign or two floats, no conversion is necessary.
1340   if (DTy == STy &&
1341       (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1342     return Val;
1343 
1344   FoldingSetNodeID ID;
1345   SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1346   AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1347   void* IP = 0;
1348   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1349     return SDValue(E, 0);
1350 
1351   CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1352                                                            Code);
1353   CSEMap.InsertNode(N, IP);
1354   AllNodes.push_back(N);
1355   return SDValue(N, 0);
1356 }
1357 
getRegister(unsigned RegNo,EVT VT)1358 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1359   FoldingSetNodeID ID;
1360   AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1361   ID.AddInteger(RegNo);
1362   void *IP = 0;
1363   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1364     return SDValue(E, 0);
1365 
1366   SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1367   CSEMap.InsertNode(N, IP);
1368   AllNodes.push_back(N);
1369   return SDValue(N, 0);
1370 }
1371 
getEHLabel(DebugLoc dl,SDValue Root,MCSymbol * Label)1372 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1373   FoldingSetNodeID ID;
1374   SDValue Ops[] = { Root };
1375   AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1376   ID.AddPointer(Label);
1377   void *IP = 0;
1378   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1379     return SDValue(E, 0);
1380 
1381   SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1382   CSEMap.InsertNode(N, IP);
1383   AllNodes.push_back(N);
1384   return SDValue(N, 0);
1385 }
1386 
1387 
getBlockAddress(const BlockAddress * BA,EVT VT,bool isTarget,unsigned char TargetFlags)1388 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1389                                       bool isTarget,
1390                                       unsigned char TargetFlags) {
1391   unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1392 
1393   FoldingSetNodeID ID;
1394   AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1395   ID.AddPointer(BA);
1396   ID.AddInteger(TargetFlags);
1397   void *IP = 0;
1398   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1399     return SDValue(E, 0);
1400 
1401   SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1402   CSEMap.InsertNode(N, IP);
1403   AllNodes.push_back(N);
1404   return SDValue(N, 0);
1405 }
1406 
getSrcValue(const Value * V)1407 SDValue SelectionDAG::getSrcValue(const Value *V) {
1408   assert((!V || V->getType()->isPointerTy()) &&
1409          "SrcValue is not a pointer?");
1410 
1411   FoldingSetNodeID ID;
1412   AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1413   ID.AddPointer(V);
1414 
1415   void *IP = 0;
1416   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1417     return SDValue(E, 0);
1418 
1419   SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1420   CSEMap.InsertNode(N, IP);
1421   AllNodes.push_back(N);
1422   return SDValue(N, 0);
1423 }
1424 
1425 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
getMDNode(const MDNode * MD)1426 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1427   FoldingSetNodeID ID;
1428   AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1429   ID.AddPointer(MD);
1430 
1431   void *IP = 0;
1432   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1433     return SDValue(E, 0);
1434 
1435   SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1436   CSEMap.InsertNode(N, IP);
1437   AllNodes.push_back(N);
1438   return SDValue(N, 0);
1439 }
1440 
1441 
1442 /// getShiftAmountOperand - Return the specified value casted to
1443 /// the target's desired shift amount type.
getShiftAmountOperand(EVT LHSTy,SDValue Op)1444 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1445   EVT OpTy = Op.getValueType();
1446   MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1447   if (OpTy == ShTy || OpTy.isVector()) return Op;
1448 
1449   ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ?  ISD::TRUNCATE : ISD::ZERO_EXTEND;
1450   return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1451 }
1452 
1453 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1454 /// specified value type.
CreateStackTemporary(EVT VT,unsigned minAlign)1455 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1456   MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1457   unsigned ByteSize = VT.getStoreSize();
1458   Type *Ty = VT.getTypeForEVT(*getContext());
1459   unsigned StackAlign =
1460   std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1461 
1462   int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1463   return getFrameIndex(FrameIdx, TLI.getPointerTy());
1464 }
1465 
1466 /// CreateStackTemporary - Create a stack temporary suitable for holding
1467 /// either of the specified value types.
CreateStackTemporary(EVT VT1,EVT VT2)1468 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1469   unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1470                             VT2.getStoreSizeInBits())/8;
1471   Type *Ty1 = VT1.getTypeForEVT(*getContext());
1472   Type *Ty2 = VT2.getTypeForEVT(*getContext());
1473   const TargetData *TD = TLI.getTargetData();
1474   unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1475                             TD->getPrefTypeAlignment(Ty2));
1476 
1477   MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1478   int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1479   return getFrameIndex(FrameIdx, TLI.getPointerTy());
1480 }
1481 
FoldSetCC(EVT VT,SDValue N1,SDValue N2,ISD::CondCode Cond,DebugLoc dl)1482 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1483                                 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1484   // These setcc operations always fold.
1485   switch (Cond) {
1486   default: break;
1487   case ISD::SETFALSE:
1488   case ISD::SETFALSE2: return getConstant(0, VT);
1489   case ISD::SETTRUE:
1490   case ISD::SETTRUE2:  return getConstant(1, VT);
1491 
1492   case ISD::SETOEQ:
1493   case ISD::SETOGT:
1494   case ISD::SETOGE:
1495   case ISD::SETOLT:
1496   case ISD::SETOLE:
1497   case ISD::SETONE:
1498   case ISD::SETO:
1499   case ISD::SETUO:
1500   case ISD::SETUEQ:
1501   case ISD::SETUNE:
1502     assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1503     break;
1504   }
1505 
1506   if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1507     const APInt &C2 = N2C->getAPIntValue();
1508     if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1509       const APInt &C1 = N1C->getAPIntValue();
1510 
1511       switch (Cond) {
1512       default: llvm_unreachable("Unknown integer setcc!");
1513       case ISD::SETEQ:  return getConstant(C1 == C2, VT);
1514       case ISD::SETNE:  return getConstant(C1 != C2, VT);
1515       case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1516       case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1517       case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1518       case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1519       case ISD::SETLT:  return getConstant(C1.slt(C2), VT);
1520       case ISD::SETGT:  return getConstant(C1.sgt(C2), VT);
1521       case ISD::SETLE:  return getConstant(C1.sle(C2), VT);
1522       case ISD::SETGE:  return getConstant(C1.sge(C2), VT);
1523       }
1524     }
1525   }
1526   if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1527     if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1528       // No compile time operations on this type yet.
1529       if (N1C->getValueType(0) == MVT::ppcf128)
1530         return SDValue();
1531 
1532       APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1533       switch (Cond) {
1534       default: break;
1535       case ISD::SETEQ:  if (R==APFloat::cmpUnordered)
1536                           return getUNDEF(VT);
1537                         // fall through
1538       case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1539       case ISD::SETNE:  if (R==APFloat::cmpUnordered)
1540                           return getUNDEF(VT);
1541                         // fall through
1542       case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1543                                            R==APFloat::cmpLessThan, VT);
1544       case ISD::SETLT:  if (R==APFloat::cmpUnordered)
1545                           return getUNDEF(VT);
1546                         // fall through
1547       case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1548       case ISD::SETGT:  if (R==APFloat::cmpUnordered)
1549                           return getUNDEF(VT);
1550                         // fall through
1551       case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1552       case ISD::SETLE:  if (R==APFloat::cmpUnordered)
1553                           return getUNDEF(VT);
1554                         // fall through
1555       case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1556                                            R==APFloat::cmpEqual, VT);
1557       case ISD::SETGE:  if (R==APFloat::cmpUnordered)
1558                           return getUNDEF(VT);
1559                         // fall through
1560       case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1561                                            R==APFloat::cmpEqual, VT);
1562       case ISD::SETO:   return getConstant(R!=APFloat::cmpUnordered, VT);
1563       case ISD::SETUO:  return getConstant(R==APFloat::cmpUnordered, VT);
1564       case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1565                                            R==APFloat::cmpEqual, VT);
1566       case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1567       case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1568                                            R==APFloat::cmpLessThan, VT);
1569       case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1570                                            R==APFloat::cmpUnordered, VT);
1571       case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1572       case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1573       }
1574     } else {
1575       // Ensure that the constant occurs on the RHS.
1576       return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1577     }
1578   }
1579 
1580   // Could not fold it.
1581   return SDValue();
1582 }
1583 
1584 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero.  We
1585 /// use this predicate to simplify operations downstream.
SignBitIsZero(SDValue Op,unsigned Depth) const1586 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1587   // This predicate is not safe for vector operations.
1588   if (Op.getValueType().isVector())
1589     return false;
1590 
1591   unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1592   return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1593 }
1594 
1595 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.  We use
1596 /// this predicate to simplify operations downstream.  Mask is known to be zero
1597 /// for bits that V cannot have.
MaskedValueIsZero(SDValue Op,const APInt & Mask,unsigned Depth) const1598 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1599                                      unsigned Depth) const {
1600   APInt KnownZero, KnownOne;
1601   ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1602   assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1603   return (KnownZero & Mask) == Mask;
1604 }
1605 
1606 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1607 /// known to be either zero or one and return them in the KnownZero/KnownOne
1608 /// bitsets.  This code only analyzes bits in Mask, in order to short-circuit
1609 /// processing.
ComputeMaskedBits(SDValue Op,const APInt & Mask,APInt & KnownZero,APInt & KnownOne,unsigned Depth) const1610 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1611                                      APInt &KnownZero, APInt &KnownOne,
1612                                      unsigned Depth) const {
1613   unsigned BitWidth = Mask.getBitWidth();
1614   assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1615          "Mask size mismatches value type size!");
1616 
1617   KnownZero = KnownOne = APInt(BitWidth, 0);   // Don't know anything.
1618   if (Depth == 6 || Mask == 0)
1619     return;  // Limit search depth.
1620 
1621   APInt KnownZero2, KnownOne2;
1622 
1623   switch (Op.getOpcode()) {
1624   case ISD::Constant:
1625     // We know all of the bits for a constant!
1626     KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1627     KnownZero = ~KnownOne & Mask;
1628     return;
1629   case ISD::AND:
1630     // If either the LHS or the RHS are Zero, the result is zero.
1631     ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1632     ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1633                       KnownZero2, KnownOne2, Depth+1);
1634     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1635     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1636 
1637     // Output known-1 bits are only known if set in both the LHS & RHS.
1638     KnownOne &= KnownOne2;
1639     // Output known-0 are known to be clear if zero in either the LHS | RHS.
1640     KnownZero |= KnownZero2;
1641     return;
1642   case ISD::OR:
1643     ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1644     ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1645                       KnownZero2, KnownOne2, Depth+1);
1646     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1647     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1648 
1649     // Output known-0 bits are only known if clear in both the LHS & RHS.
1650     KnownZero &= KnownZero2;
1651     // Output known-1 are known to be set if set in either the LHS | RHS.
1652     KnownOne |= KnownOne2;
1653     return;
1654   case ISD::XOR: {
1655     ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1656     ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1657     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1658     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1659 
1660     // Output known-0 bits are known if clear or set in both the LHS & RHS.
1661     APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1662     // Output known-1 are known to be set if set in only one of the LHS, RHS.
1663     KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1664     KnownZero = KnownZeroOut;
1665     return;
1666   }
1667   case ISD::MUL: {
1668     APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1669     ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1670     ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1671     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1672     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1673 
1674     // If low bits are zero in either operand, output low known-0 bits.
1675     // Also compute a conserative estimate for high known-0 bits.
1676     // More trickiness is possible, but this is sufficient for the
1677     // interesting case of alignment computation.
1678     KnownOne.clearAllBits();
1679     unsigned TrailZ = KnownZero.countTrailingOnes() +
1680                       KnownZero2.countTrailingOnes();
1681     unsigned LeadZ =  std::max(KnownZero.countLeadingOnes() +
1682                                KnownZero2.countLeadingOnes(),
1683                                BitWidth) - BitWidth;
1684 
1685     TrailZ = std::min(TrailZ, BitWidth);
1686     LeadZ = std::min(LeadZ, BitWidth);
1687     KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1688                 APInt::getHighBitsSet(BitWidth, LeadZ);
1689     KnownZero &= Mask;
1690     return;
1691   }
1692   case ISD::UDIV: {
1693     // For the purposes of computing leading zeros we can conservatively
1694     // treat a udiv as a logical right shift by the power of 2 known to
1695     // be less than the denominator.
1696     APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1697     ComputeMaskedBits(Op.getOperand(0),
1698                       AllOnes, KnownZero2, KnownOne2, Depth+1);
1699     unsigned LeadZ = KnownZero2.countLeadingOnes();
1700 
1701     KnownOne2.clearAllBits();
1702     KnownZero2.clearAllBits();
1703     ComputeMaskedBits(Op.getOperand(1),
1704                       AllOnes, KnownZero2, KnownOne2, Depth+1);
1705     unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1706     if (RHSUnknownLeadingOnes != BitWidth)
1707       LeadZ = std::min(BitWidth,
1708                        LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1709 
1710     KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1711     return;
1712   }
1713   case ISD::SELECT:
1714     ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1715     ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1716     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1717     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1718 
1719     // Only known if known in both the LHS and RHS.
1720     KnownOne &= KnownOne2;
1721     KnownZero &= KnownZero2;
1722     return;
1723   case ISD::SELECT_CC:
1724     ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1725     ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1726     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1727     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1728 
1729     // Only known if known in both the LHS and RHS.
1730     KnownOne &= KnownOne2;
1731     KnownZero &= KnownZero2;
1732     return;
1733   case ISD::SADDO:
1734   case ISD::UADDO:
1735   case ISD::SSUBO:
1736   case ISD::USUBO:
1737   case ISD::SMULO:
1738   case ISD::UMULO:
1739     if (Op.getResNo() != 1)
1740       return;
1741     // The boolean result conforms to getBooleanContents.  Fall through.
1742   case ISD::SETCC:
1743     // If we know the result of a setcc has the top bits zero, use this info.
1744     if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1745         TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1746       KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1747     return;
1748   case ISD::SHL:
1749     // (shl X, C1) & C2 == 0   iff   (X & C2 >>u C1) == 0
1750     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1751       unsigned ShAmt = SA->getZExtValue();
1752 
1753       // If the shift count is an invalid immediate, don't do anything.
1754       if (ShAmt >= BitWidth)
1755         return;
1756 
1757       ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1758                         KnownZero, KnownOne, Depth+1);
1759       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1760       KnownZero <<= ShAmt;
1761       KnownOne  <<= ShAmt;
1762       // low bits known zero.
1763       KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1764     }
1765     return;
1766   case ISD::SRL:
1767     // (ushr X, C1) & C2 == 0   iff  (-1 >> C1) & C2 == 0
1768     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1769       unsigned ShAmt = SA->getZExtValue();
1770 
1771       // If the shift count is an invalid immediate, don't do anything.
1772       if (ShAmt >= BitWidth)
1773         return;
1774 
1775       ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1776                         KnownZero, KnownOne, Depth+1);
1777       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778       KnownZero = KnownZero.lshr(ShAmt);
1779       KnownOne  = KnownOne.lshr(ShAmt);
1780 
1781       APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1782       KnownZero |= HighBits;  // High bits known zero.
1783     }
1784     return;
1785   case ISD::SRA:
1786     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1787       unsigned ShAmt = SA->getZExtValue();
1788 
1789       // If the shift count is an invalid immediate, don't do anything.
1790       if (ShAmt >= BitWidth)
1791         return;
1792 
1793       APInt InDemandedMask = (Mask << ShAmt);
1794       // If any of the demanded bits are produced by the sign extension, we also
1795       // demand the input sign bit.
1796       APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1797       if (HighBits.getBoolValue())
1798         InDemandedMask |= APInt::getSignBit(BitWidth);
1799 
1800       ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1801                         Depth+1);
1802       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1803       KnownZero = KnownZero.lshr(ShAmt);
1804       KnownOne  = KnownOne.lshr(ShAmt);
1805 
1806       // Handle the sign bits.
1807       APInt SignBit = APInt::getSignBit(BitWidth);
1808       SignBit = SignBit.lshr(ShAmt);  // Adjust to where it is now in the mask.
1809 
1810       if (KnownZero.intersects(SignBit)) {
1811         KnownZero |= HighBits;  // New bits are known zero.
1812       } else if (KnownOne.intersects(SignBit)) {
1813         KnownOne  |= HighBits;  // New bits are known one.
1814       }
1815     }
1816     return;
1817   case ISD::SIGN_EXTEND_INREG: {
1818     EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1819     unsigned EBits = EVT.getScalarType().getSizeInBits();
1820 
1821     // Sign extension.  Compute the demanded bits in the result that are not
1822     // present in the input.
1823     APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1824 
1825     APInt InSignBit = APInt::getSignBit(EBits);
1826     APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1827 
1828     // If the sign extended bits are demanded, we know that the sign
1829     // bit is demanded.
1830     InSignBit = InSignBit.zext(BitWidth);
1831     if (NewBits.getBoolValue())
1832       InputDemandedBits |= InSignBit;
1833 
1834     ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1835                       KnownZero, KnownOne, Depth+1);
1836     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1837 
1838     // If the sign bit of the input is known set or clear, then we know the
1839     // top bits of the result.
1840     if (KnownZero.intersects(InSignBit)) {         // Input sign bit known clear
1841       KnownZero |= NewBits;
1842       KnownOne  &= ~NewBits;
1843     } else if (KnownOne.intersects(InSignBit)) {   // Input sign bit known set
1844       KnownOne  |= NewBits;
1845       KnownZero &= ~NewBits;
1846     } else {                              // Input sign bit unknown
1847       KnownZero &= ~NewBits;
1848       KnownOne  &= ~NewBits;
1849     }
1850     return;
1851   }
1852   case ISD::CTTZ:
1853   case ISD::CTLZ:
1854   case ISD::CTPOP: {
1855     unsigned LowBits = Log2_32(BitWidth)+1;
1856     KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1857     KnownOne.clearAllBits();
1858     return;
1859   }
1860   case ISD::LOAD: {
1861     if (ISD::isZEXTLoad(Op.getNode())) {
1862       LoadSDNode *LD = cast<LoadSDNode>(Op);
1863       EVT VT = LD->getMemoryVT();
1864       unsigned MemBits = VT.getScalarType().getSizeInBits();
1865       KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1866     }
1867     return;
1868   }
1869   case ISD::ZERO_EXTEND: {
1870     EVT InVT = Op.getOperand(0).getValueType();
1871     unsigned InBits = InVT.getScalarType().getSizeInBits();
1872     APInt NewBits   = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1873     APInt InMask    = Mask.trunc(InBits);
1874     KnownZero = KnownZero.trunc(InBits);
1875     KnownOne = KnownOne.trunc(InBits);
1876     ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1877     KnownZero = KnownZero.zext(BitWidth);
1878     KnownOne = KnownOne.zext(BitWidth);
1879     KnownZero |= NewBits;
1880     return;
1881   }
1882   case ISD::SIGN_EXTEND: {
1883     EVT InVT = Op.getOperand(0).getValueType();
1884     unsigned InBits = InVT.getScalarType().getSizeInBits();
1885     APInt InSignBit = APInt::getSignBit(InBits);
1886     APInt NewBits   = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1887     APInt InMask = Mask.trunc(InBits);
1888 
1889     // If any of the sign extended bits are demanded, we know that the sign
1890     // bit is demanded. Temporarily set this bit in the mask for our callee.
1891     if (NewBits.getBoolValue())
1892       InMask |= InSignBit;
1893 
1894     KnownZero = KnownZero.trunc(InBits);
1895     KnownOne = KnownOne.trunc(InBits);
1896     ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1897 
1898     // Note if the sign bit is known to be zero or one.
1899     bool SignBitKnownZero = KnownZero.isNegative();
1900     bool SignBitKnownOne  = KnownOne.isNegative();
1901     assert(!(SignBitKnownZero && SignBitKnownOne) &&
1902            "Sign bit can't be known to be both zero and one!");
1903 
1904     // If the sign bit wasn't actually demanded by our caller, we don't
1905     // want it set in the KnownZero and KnownOne result values. Reset the
1906     // mask and reapply it to the result values.
1907     InMask = Mask.trunc(InBits);
1908     KnownZero &= InMask;
1909     KnownOne  &= InMask;
1910 
1911     KnownZero = KnownZero.zext(BitWidth);
1912     KnownOne = KnownOne.zext(BitWidth);
1913 
1914     // If the sign bit is known zero or one, the top bits match.
1915     if (SignBitKnownZero)
1916       KnownZero |= NewBits;
1917     else if (SignBitKnownOne)
1918       KnownOne  |= NewBits;
1919     return;
1920   }
1921   case ISD::ANY_EXTEND: {
1922     EVT InVT = Op.getOperand(0).getValueType();
1923     unsigned InBits = InVT.getScalarType().getSizeInBits();
1924     APInt InMask = Mask.trunc(InBits);
1925     KnownZero = KnownZero.trunc(InBits);
1926     KnownOne = KnownOne.trunc(InBits);
1927     ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1928     KnownZero = KnownZero.zext(BitWidth);
1929     KnownOne = KnownOne.zext(BitWidth);
1930     return;
1931   }
1932   case ISD::TRUNCATE: {
1933     EVT InVT = Op.getOperand(0).getValueType();
1934     unsigned InBits = InVT.getScalarType().getSizeInBits();
1935     APInt InMask = Mask.zext(InBits);
1936     KnownZero = KnownZero.zext(InBits);
1937     KnownOne = KnownOne.zext(InBits);
1938     ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1939     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1940     KnownZero = KnownZero.trunc(BitWidth);
1941     KnownOne = KnownOne.trunc(BitWidth);
1942     break;
1943   }
1944   case ISD::AssertZext: {
1945     EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1946     APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1947     ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1948                       KnownOne, Depth+1);
1949     KnownZero |= (~InMask) & Mask;
1950     return;
1951   }
1952   case ISD::FGETSIGN:
1953     // All bits are zero except the low bit.
1954     KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1955     return;
1956 
1957   case ISD::SUB: {
1958     if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1959       // We know that the top bits of C-X are clear if X contains less bits
1960       // than C (i.e. no wrap-around can happen).  For example, 20-X is
1961       // positive if we can prove that X is >= 0 and < 16.
1962       if (CLHS->getAPIntValue().isNonNegative()) {
1963         unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1964         // NLZ can't be BitWidth with no sign bit
1965         APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1966         ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1967                           Depth+1);
1968 
1969         // If all of the MaskV bits are known to be zero, then we know the
1970         // output top bits are zero, because we now know that the output is
1971         // from [0-C].
1972         if ((KnownZero2 & MaskV) == MaskV) {
1973           unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1974           // Top bits known zero.
1975           KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1976         }
1977       }
1978     }
1979   }
1980   // fall through
1981   case ISD::ADD:
1982   case ISD::ADDE: {
1983     // Output known-0 bits are known if clear or set in both the low clear bits
1984     // common to both LHS & RHS.  For example, 8+(X<<3) is known to have the
1985     // low 3 bits clear.
1986     APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1987                                        BitWidth - Mask.countLeadingZeros());
1988     ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1989     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1990     unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1991 
1992     ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1993     assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1994     KnownZeroOut = std::min(KnownZeroOut,
1995                             KnownZero2.countTrailingOnes());
1996 
1997     if (Op.getOpcode() == ISD::ADD) {
1998       KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1999       return;
2000     }
2001 
2002     // With ADDE, a carry bit may be added in, so we can only use this
2003     // information if we know (at least) that the low two bits are clear.  We
2004     // then return to the caller that the low bit is unknown but that other bits
2005     // are known zero.
2006     if (KnownZeroOut >= 2) // ADDE
2007       KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2008     return;
2009   }
2010   case ISD::SREM:
2011     if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2012       const APInt &RA = Rem->getAPIntValue().abs();
2013       if (RA.isPowerOf2()) {
2014         APInt LowBits = RA - 1;
2015         APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2016         ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2017 
2018         // The low bits of the first operand are unchanged by the srem.
2019         KnownZero = KnownZero2 & LowBits;
2020         KnownOne = KnownOne2 & LowBits;
2021 
2022         // If the first operand is non-negative or has all low bits zero, then
2023         // the upper bits are all zero.
2024         if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2025           KnownZero |= ~LowBits;
2026 
2027         // If the first operand is negative and not all low bits are zero, then
2028         // the upper bits are all one.
2029         if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2030           KnownOne |= ~LowBits;
2031 
2032         KnownZero &= Mask;
2033         KnownOne &= Mask;
2034 
2035         assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2036       }
2037     }
2038     return;
2039   case ISD::UREM: {
2040     if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2041       const APInt &RA = Rem->getAPIntValue();
2042       if (RA.isPowerOf2()) {
2043         APInt LowBits = (RA - 1);
2044         APInt Mask2 = LowBits & Mask;
2045         KnownZero |= ~LowBits & Mask;
2046         ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2047         assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2048         break;
2049       }
2050     }
2051 
2052     // Since the result is less than or equal to either operand, any leading
2053     // zero bits in either operand must also exist in the result.
2054     APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2055     ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2056                       Depth+1);
2057     ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2058                       Depth+1);
2059 
2060     uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2061                                 KnownZero2.countLeadingOnes());
2062     KnownOne.clearAllBits();
2063     KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2064     return;
2065   }
2066   case ISD::FrameIndex:
2067   case ISD::TargetFrameIndex:
2068     if (unsigned Align = InferPtrAlignment(Op)) {
2069       // The low bits are known zero if the pointer is aligned.
2070       KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2071       return;
2072     }
2073     break;
2074 
2075   default:
2076     if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2077       break;
2078     // Fallthrough
2079   case ISD::INTRINSIC_WO_CHAIN:
2080   case ISD::INTRINSIC_W_CHAIN:
2081   case ISD::INTRINSIC_VOID:
2082     // Allow the target to implement this method for its nodes.
2083     TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2084                                        Depth);
2085     return;
2086   }
2087 }
2088 
2089 /// ComputeNumSignBits - Return the number of times the sign bit of the
2090 /// register is replicated into the other bits.  We know that at least 1 bit
2091 /// is always equal to the sign bit (itself), but other cases can give us
2092 /// information.  For example, immediately after an "SRA X, 2", we know that
2093 /// the top 3 bits are all equal to each other, so we return 3.
ComputeNumSignBits(SDValue Op,unsigned Depth) const2094 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2095   EVT VT = Op.getValueType();
2096   assert(VT.isInteger() && "Invalid VT!");
2097   unsigned VTBits = VT.getScalarType().getSizeInBits();
2098   unsigned Tmp, Tmp2;
2099   unsigned FirstAnswer = 1;
2100 
2101   if (Depth == 6)
2102     return 1;  // Limit search depth.
2103 
2104   switch (Op.getOpcode()) {
2105   default: break;
2106   case ISD::AssertSext:
2107     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2108     return VTBits-Tmp+1;
2109   case ISD::AssertZext:
2110     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2111     return VTBits-Tmp;
2112 
2113   case ISD::Constant: {
2114     const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2115     return Val.getNumSignBits();
2116   }
2117 
2118   case ISD::SIGN_EXTEND:
2119     Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2120     return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2121 
2122   case ISD::SIGN_EXTEND_INREG:
2123     // Max of the input and what this extends.
2124     Tmp =
2125       cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2126     Tmp = VTBits-Tmp+1;
2127 
2128     Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2129     return std::max(Tmp, Tmp2);
2130 
2131   case ISD::SRA:
2132     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2133     // SRA X, C   -> adds C sign bits.
2134     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2135       Tmp += C->getZExtValue();
2136       if (Tmp > VTBits) Tmp = VTBits;
2137     }
2138     return Tmp;
2139   case ISD::SHL:
2140     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2141       // shl destroys sign bits.
2142       Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2143       if (C->getZExtValue() >= VTBits ||      // Bad shift.
2144           C->getZExtValue() >= Tmp) break;    // Shifted all sign bits out.
2145       return Tmp - C->getZExtValue();
2146     }
2147     break;
2148   case ISD::AND:
2149   case ISD::OR:
2150   case ISD::XOR:    // NOT is handled here.
2151     // Logical binary ops preserve the number of sign bits at the worst.
2152     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2153     if (Tmp != 1) {
2154       Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2155       FirstAnswer = std::min(Tmp, Tmp2);
2156       // We computed what we know about the sign bits as our first
2157       // answer. Now proceed to the generic code that uses
2158       // ComputeMaskedBits, and pick whichever answer is better.
2159     }
2160     break;
2161 
2162   case ISD::SELECT:
2163     Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2164     if (Tmp == 1) return 1;  // Early out.
2165     Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2166     return std::min(Tmp, Tmp2);
2167 
2168   case ISD::SADDO:
2169   case ISD::UADDO:
2170   case ISD::SSUBO:
2171   case ISD::USUBO:
2172   case ISD::SMULO:
2173   case ISD::UMULO:
2174     if (Op.getResNo() != 1)
2175       break;
2176     // The boolean result conforms to getBooleanContents.  Fall through.
2177   case ISD::SETCC:
2178     // If setcc returns 0/-1, all bits are sign bits.
2179     if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2180         TargetLowering::ZeroOrNegativeOneBooleanContent)
2181       return VTBits;
2182     break;
2183   case ISD::ROTL:
2184   case ISD::ROTR:
2185     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2186       unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2187 
2188       // Handle rotate right by N like a rotate left by 32-N.
2189       if (Op.getOpcode() == ISD::ROTR)
2190         RotAmt = (VTBits-RotAmt) & (VTBits-1);
2191 
2192       // If we aren't rotating out all of the known-in sign bits, return the
2193       // number that are left.  This handles rotl(sext(x), 1) for example.
2194       Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2195       if (Tmp > RotAmt+1) return Tmp-RotAmt;
2196     }
2197     break;
2198   case ISD::ADD:
2199     // Add can have at most one carry bit.  Thus we know that the output
2200     // is, at worst, one more bit than the inputs.
2201     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2202     if (Tmp == 1) return 1;  // Early out.
2203 
2204     // Special case decrementing a value (ADD X, -1):
2205     if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2206       if (CRHS->isAllOnesValue()) {
2207         APInt KnownZero, KnownOne;
2208         APInt Mask = APInt::getAllOnesValue(VTBits);
2209         ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2210 
2211         // If the input is known to be 0 or 1, the output is 0/-1, which is all
2212         // sign bits set.
2213         if ((KnownZero | APInt(VTBits, 1)) == Mask)
2214           return VTBits;
2215 
2216         // If we are subtracting one from a positive number, there is no carry
2217         // out of the result.
2218         if (KnownZero.isNegative())
2219           return Tmp;
2220       }
2221 
2222     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2223     if (Tmp2 == 1) return 1;
2224       return std::min(Tmp, Tmp2)-1;
2225     break;
2226 
2227   case ISD::SUB:
2228     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2229     if (Tmp2 == 1) return 1;
2230 
2231     // Handle NEG.
2232     if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2233       if (CLHS->isNullValue()) {
2234         APInt KnownZero, KnownOne;
2235         APInt Mask = APInt::getAllOnesValue(VTBits);
2236         ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2237         // If the input is known to be 0 or 1, the output is 0/-1, which is all
2238         // sign bits set.
2239         if ((KnownZero | APInt(VTBits, 1)) == Mask)
2240           return VTBits;
2241 
2242         // If the input is known to be positive (the sign bit is known clear),
2243         // the output of the NEG has the same number of sign bits as the input.
2244         if (KnownZero.isNegative())
2245           return Tmp2;
2246 
2247         // Otherwise, we treat this like a SUB.
2248       }
2249 
2250     // Sub can have at most one carry bit.  Thus we know that the output
2251     // is, at worst, one more bit than the inputs.
2252     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2253     if (Tmp == 1) return 1;  // Early out.
2254       return std::min(Tmp, Tmp2)-1;
2255     break;
2256   case ISD::TRUNCATE:
2257     // FIXME: it's tricky to do anything useful for this, but it is an important
2258     // case for targets like X86.
2259     break;
2260   }
2261 
2262   // Handle LOADX separately here. EXTLOAD case will fallthrough.
2263   if (Op.getOpcode() == ISD::LOAD) {
2264     LoadSDNode *LD = cast<LoadSDNode>(Op);
2265     unsigned ExtType = LD->getExtensionType();
2266     switch (ExtType) {
2267     default: break;
2268     case ISD::SEXTLOAD:    // '17' bits known
2269       Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2270       return VTBits-Tmp+1;
2271     case ISD::ZEXTLOAD:    // '16' bits known
2272       Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2273       return VTBits-Tmp;
2274     }
2275   }
2276 
2277   // Allow the target to implement this method for its nodes.
2278   if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2279       Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2280       Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2281       Op.getOpcode() == ISD::INTRINSIC_VOID) {
2282     unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2283     if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2284   }
2285 
2286   // Finally, if we can prove that the top bits of the result are 0's or 1's,
2287   // use this information.
2288   APInt KnownZero, KnownOne;
2289   APInt Mask = APInt::getAllOnesValue(VTBits);
2290   ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2291 
2292   if (KnownZero.isNegative()) {        // sign bit is 0
2293     Mask = KnownZero;
2294   } else if (KnownOne.isNegative()) {  // sign bit is 1;
2295     Mask = KnownOne;
2296   } else {
2297     // Nothing known.
2298     return FirstAnswer;
2299   }
2300 
2301   // Okay, we know that the sign bit in Mask is set.  Use CLZ to determine
2302   // the number of identical bits in the top of the input value.
2303   Mask = ~Mask;
2304   Mask <<= Mask.getBitWidth()-VTBits;
2305   // Return # leading zeros.  We use 'min' here in case Val was zero before
2306   // shifting.  We don't want to return '64' as for an i32 "0".
2307   return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2308 }
2309 
2310 /// isBaseWithConstantOffset - Return true if the specified operand is an
2311 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2312 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2313 /// semantics as an ADD.  This handles the equivalence:
2314 ///     X|Cst == X+Cst iff X&Cst = 0.
isBaseWithConstantOffset(SDValue Op) const2315 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2316   if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2317       !isa<ConstantSDNode>(Op.getOperand(1)))
2318     return false;
2319 
2320   if (Op.getOpcode() == ISD::OR &&
2321       !MaskedValueIsZero(Op.getOperand(0),
2322                      cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2323     return false;
2324 
2325   return true;
2326 }
2327 
2328 
isKnownNeverNaN(SDValue Op) const2329 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2330   // If we're told that NaNs won't happen, assume they won't.
2331   if (NoNaNsFPMath)
2332     return true;
2333 
2334   // If the value is a constant, we can obviously see if it is a NaN or not.
2335   if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2336     return !C->getValueAPF().isNaN();
2337 
2338   // TODO: Recognize more cases here.
2339 
2340   return false;
2341 }
2342 
isKnownNeverZero(SDValue Op) const2343 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2344   // If the value is a constant, we can obviously see if it is a zero or not.
2345   if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2346     return !C->isZero();
2347 
2348   // TODO: Recognize more cases here.
2349   switch (Op.getOpcode()) {
2350   default: break;
2351   case ISD::OR:
2352     if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2353       return !C->isNullValue();
2354     break;
2355   }
2356 
2357   return false;
2358 }
2359 
isEqualTo(SDValue A,SDValue B) const2360 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2361   // Check the obvious case.
2362   if (A == B) return true;
2363 
2364   // For for negative and positive zero.
2365   if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2366     if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2367       if (CA->isZero() && CB->isZero()) return true;
2368 
2369   // Otherwise they may not be equal.
2370   return false;
2371 }
2372 
2373 /// getNode - Gets or creates the specified node.
2374 ///
getNode(unsigned Opcode,DebugLoc DL,EVT VT)2375 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2376   FoldingSetNodeID ID;
2377   AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2378   void *IP = 0;
2379   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2380     return SDValue(E, 0);
2381 
2382   SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2383   CSEMap.InsertNode(N, IP);
2384 
2385   AllNodes.push_back(N);
2386 #ifndef NDEBUG
2387   VerifySDNode(N);
2388 #endif
2389   return SDValue(N, 0);
2390 }
2391 
getNode(unsigned Opcode,DebugLoc DL,EVT VT,SDValue Operand)2392 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2393                               EVT VT, SDValue Operand) {
2394   // Constant fold unary operations with an integer constant operand.
2395   if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2396     const APInt &Val = C->getAPIntValue();
2397     switch (Opcode) {
2398     default: break;
2399     case ISD::SIGN_EXTEND:
2400       return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2401     case ISD::ANY_EXTEND:
2402     case ISD::ZERO_EXTEND:
2403     case ISD::TRUNCATE:
2404       return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2405     case ISD::UINT_TO_FP:
2406     case ISD::SINT_TO_FP: {
2407       // No compile time operations on ppcf128.
2408       if (VT == MVT::ppcf128) break;
2409       APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2410       (void)apf.convertFromAPInt(Val,
2411                                  Opcode==ISD::SINT_TO_FP,
2412                                  APFloat::rmNearestTiesToEven);
2413       return getConstantFP(apf, VT);
2414     }
2415     case ISD::BITCAST:
2416       if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2417         return getConstantFP(Val.bitsToFloat(), VT);
2418       else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2419         return getConstantFP(Val.bitsToDouble(), VT);
2420       break;
2421     case ISD::BSWAP:
2422       return getConstant(Val.byteSwap(), VT);
2423     case ISD::CTPOP:
2424       return getConstant(Val.countPopulation(), VT);
2425     case ISD::CTLZ:
2426       return getConstant(Val.countLeadingZeros(), VT);
2427     case ISD::CTTZ:
2428       return getConstant(Val.countTrailingZeros(), VT);
2429     }
2430   }
2431 
2432   // Constant fold unary operations with a floating point constant operand.
2433   if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2434     APFloat V = C->getValueAPF();    // make copy
2435     if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2436       switch (Opcode) {
2437       case ISD::FNEG:
2438         V.changeSign();
2439         return getConstantFP(V, VT);
2440       case ISD::FABS:
2441         V.clearSign();
2442         return getConstantFP(V, VT);
2443       case ISD::FP_ROUND:
2444       case ISD::FP_EXTEND: {
2445         bool ignored;
2446         // This can return overflow, underflow, or inexact; we don't care.
2447         // FIXME need to be more flexible about rounding mode.
2448         (void)V.convert(*EVTToAPFloatSemantics(VT),
2449                         APFloat::rmNearestTiesToEven, &ignored);
2450         return getConstantFP(V, VT);
2451       }
2452       case ISD::FP_TO_SINT:
2453       case ISD::FP_TO_UINT: {
2454         integerPart x[2];
2455         bool ignored;
2456         assert(integerPartWidth >= 64);
2457         // FIXME need to be more flexible about rounding mode.
2458         APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2459                               Opcode==ISD::FP_TO_SINT,
2460                               APFloat::rmTowardZero, &ignored);
2461         if (s==APFloat::opInvalidOp)     // inexact is OK, in fact usual
2462           break;
2463         APInt api(VT.getSizeInBits(), x);
2464         return getConstant(api, VT);
2465       }
2466       case ISD::BITCAST:
2467         if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2468           return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2469         else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2470           return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2471         break;
2472       }
2473     }
2474   }
2475 
2476   unsigned OpOpcode = Operand.getNode()->getOpcode();
2477   switch (Opcode) {
2478   case ISD::TokenFactor:
2479   case ISD::MERGE_VALUES:
2480   case ISD::CONCAT_VECTORS:
2481     return Operand;         // Factor, merge or concat of one node?  No need.
2482   case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2483   case ISD::FP_EXTEND:
2484     assert(VT.isFloatingPoint() &&
2485            Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2486     if (Operand.getValueType() == VT) return Operand;  // noop conversion.
2487     assert((!VT.isVector() ||
2488             VT.getVectorNumElements() ==
2489             Operand.getValueType().getVectorNumElements()) &&
2490            "Vector element count mismatch!");
2491     if (Operand.getOpcode() == ISD::UNDEF)
2492       return getUNDEF(VT);
2493     break;
2494   case ISD::SIGN_EXTEND:
2495     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2496            "Invalid SIGN_EXTEND!");
2497     if (Operand.getValueType() == VT) return Operand;   // noop extension
2498     assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2499            "Invalid sext node, dst < src!");
2500     assert((!VT.isVector() ||
2501             VT.getVectorNumElements() ==
2502             Operand.getValueType().getVectorNumElements()) &&
2503            "Vector element count mismatch!");
2504     if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2505       return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2506     else if (OpOpcode == ISD::UNDEF)
2507       // sext(undef) = 0, because the top bits will all be the same.
2508       return getConstant(0, VT);
2509     break;
2510   case ISD::ZERO_EXTEND:
2511     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2512            "Invalid ZERO_EXTEND!");
2513     if (Operand.getValueType() == VT) return Operand;   // noop extension
2514     assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2515            "Invalid zext node, dst < src!");
2516     assert((!VT.isVector() ||
2517             VT.getVectorNumElements() ==
2518             Operand.getValueType().getVectorNumElements()) &&
2519            "Vector element count mismatch!");
2520     if (OpOpcode == ISD::ZERO_EXTEND)   // (zext (zext x)) -> (zext x)
2521       return getNode(ISD::ZERO_EXTEND, DL, VT,
2522                      Operand.getNode()->getOperand(0));
2523     else if (OpOpcode == ISD::UNDEF)
2524       // zext(undef) = 0, because the top bits will be zero.
2525       return getConstant(0, VT);
2526     break;
2527   case ISD::ANY_EXTEND:
2528     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2529            "Invalid ANY_EXTEND!");
2530     if (Operand.getValueType() == VT) return Operand;   // noop extension
2531     assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2532            "Invalid anyext node, dst < src!");
2533     assert((!VT.isVector() ||
2534             VT.getVectorNumElements() ==
2535             Operand.getValueType().getVectorNumElements()) &&
2536            "Vector element count mismatch!");
2537 
2538     if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2539         OpOpcode == ISD::ANY_EXTEND)
2540       // (ext (zext x)) -> (zext x)  and  (ext (sext x)) -> (sext x)
2541       return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2542     else if (OpOpcode == ISD::UNDEF)
2543       return getUNDEF(VT);
2544 
2545     // (ext (trunx x)) -> x
2546     if (OpOpcode == ISD::TRUNCATE) {
2547       SDValue OpOp = Operand.getNode()->getOperand(0);
2548       if (OpOp.getValueType() == VT)
2549         return OpOp;
2550     }
2551     break;
2552   case ISD::TRUNCATE:
2553     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2554            "Invalid TRUNCATE!");
2555     if (Operand.getValueType() == VT) return Operand;   // noop truncate
2556     assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2557            "Invalid truncate node, src < dst!");
2558     assert((!VT.isVector() ||
2559             VT.getVectorNumElements() ==
2560             Operand.getValueType().getVectorNumElements()) &&
2561            "Vector element count mismatch!");
2562     if (OpOpcode == ISD::TRUNCATE)
2563       return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2564     else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2565              OpOpcode == ISD::ANY_EXTEND) {
2566       // If the source is smaller than the dest, we still need an extend.
2567       if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2568             .bitsLT(VT.getScalarType()))
2569         return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2570       else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2571         return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2572       else
2573         return Operand.getNode()->getOperand(0);
2574     }
2575     break;
2576   case ISD::BITCAST:
2577     // Basic sanity checking.
2578     assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2579            && "Cannot BITCAST between types of different sizes!");
2580     if (VT == Operand.getValueType()) return Operand;  // noop conversion.
2581     if (OpOpcode == ISD::BITCAST)  // bitconv(bitconv(x)) -> bitconv(x)
2582       return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2583     if (OpOpcode == ISD::UNDEF)
2584       return getUNDEF(VT);
2585     break;
2586   case ISD::SCALAR_TO_VECTOR:
2587     assert(VT.isVector() && !Operand.getValueType().isVector() &&
2588            (VT.getVectorElementType() == Operand.getValueType() ||
2589             (VT.getVectorElementType().isInteger() &&
2590              Operand.getValueType().isInteger() &&
2591              VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2592            "Illegal SCALAR_TO_VECTOR node!");
2593     if (OpOpcode == ISD::UNDEF)
2594       return getUNDEF(VT);
2595     // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2596     if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2597         isa<ConstantSDNode>(Operand.getOperand(1)) &&
2598         Operand.getConstantOperandVal(1) == 0 &&
2599         Operand.getOperand(0).getValueType() == VT)
2600       return Operand.getOperand(0);
2601     break;
2602   case ISD::FNEG:
2603     // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2604     if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2605       return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2606                      Operand.getNode()->getOperand(0));
2607     if (OpOpcode == ISD::FNEG)  // --X -> X
2608       return Operand.getNode()->getOperand(0);
2609     break;
2610   case ISD::FABS:
2611     if (OpOpcode == ISD::FNEG)  // abs(-X) -> abs(X)
2612       return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2613     break;
2614   }
2615 
2616   SDNode *N;
2617   SDVTList VTs = getVTList(VT);
2618   if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2619     FoldingSetNodeID ID;
2620     SDValue Ops[1] = { Operand };
2621     AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2622     void *IP = 0;
2623     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2624       return SDValue(E, 0);
2625 
2626     N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2627     CSEMap.InsertNode(N, IP);
2628   } else {
2629     N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2630   }
2631 
2632   AllNodes.push_back(N);
2633 #ifndef NDEBUG
2634   VerifySDNode(N);
2635 #endif
2636   return SDValue(N, 0);
2637 }
2638 
FoldConstantArithmetic(unsigned Opcode,EVT VT,ConstantSDNode * Cst1,ConstantSDNode * Cst2)2639 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2640                                              EVT VT,
2641                                              ConstantSDNode *Cst1,
2642                                              ConstantSDNode *Cst2) {
2643   const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2644 
2645   switch (Opcode) {
2646   case ISD::ADD:  return getConstant(C1 + C2, VT);
2647   case ISD::SUB:  return getConstant(C1 - C2, VT);
2648   case ISD::MUL:  return getConstant(C1 * C2, VT);
2649   case ISD::UDIV:
2650     if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2651     break;
2652   case ISD::UREM:
2653     if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2654     break;
2655   case ISD::SDIV:
2656     if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2657     break;
2658   case ISD::SREM:
2659     if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2660     break;
2661   case ISD::AND:  return getConstant(C1 & C2, VT);
2662   case ISD::OR:   return getConstant(C1 | C2, VT);
2663   case ISD::XOR:  return getConstant(C1 ^ C2, VT);
2664   case ISD::SHL:  return getConstant(C1 << C2, VT);
2665   case ISD::SRL:  return getConstant(C1.lshr(C2), VT);
2666   case ISD::SRA:  return getConstant(C1.ashr(C2), VT);
2667   case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2668   case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2669   default: break;
2670   }
2671 
2672   return SDValue();
2673 }
2674 
getNode(unsigned Opcode,DebugLoc DL,EVT VT,SDValue N1,SDValue N2)2675 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2676                               SDValue N1, SDValue N2) {
2677   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2678   ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2679   switch (Opcode) {
2680   default: break;
2681   case ISD::TokenFactor:
2682     assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2683            N2.getValueType() == MVT::Other && "Invalid token factor!");
2684     // Fold trivial token factors.
2685     if (N1.getOpcode() == ISD::EntryToken) return N2;
2686     if (N2.getOpcode() == ISD::EntryToken) return N1;
2687     if (N1 == N2) return N1;
2688     break;
2689   case ISD::CONCAT_VECTORS:
2690     // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2691     // one big BUILD_VECTOR.
2692     if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2693         N2.getOpcode() == ISD::BUILD_VECTOR) {
2694       SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2695                                     N1.getNode()->op_end());
2696       Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2697       return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2698     }
2699     break;
2700   case ISD::AND:
2701     assert(VT.isInteger() && "This operator does not apply to FP types!");
2702     assert(N1.getValueType() == N2.getValueType() &&
2703            N1.getValueType() == VT && "Binary operator types must match!");
2704     // (X & 0) -> 0.  This commonly occurs when legalizing i64 values, so it's
2705     // worth handling here.
2706     if (N2C && N2C->isNullValue())
2707       return N2;
2708     if (N2C && N2C->isAllOnesValue())  // X & -1 -> X
2709       return N1;
2710     break;
2711   case ISD::OR:
2712   case ISD::XOR:
2713   case ISD::ADD:
2714   case ISD::SUB:
2715     assert(VT.isInteger() && "This operator does not apply to FP types!");
2716     assert(N1.getValueType() == N2.getValueType() &&
2717            N1.getValueType() == VT && "Binary operator types must match!");
2718     // (X ^|+- 0) -> X.  This commonly occurs when legalizing i64 values, so
2719     // it's worth handling here.
2720     if (N2C && N2C->isNullValue())
2721       return N1;
2722     break;
2723   case ISD::UDIV:
2724   case ISD::UREM:
2725   case ISD::MULHU:
2726   case ISD::MULHS:
2727   case ISD::MUL:
2728   case ISD::SDIV:
2729   case ISD::SREM:
2730     assert(VT.isInteger() && "This operator does not apply to FP types!");
2731     assert(N1.getValueType() == N2.getValueType() &&
2732            N1.getValueType() == VT && "Binary operator types must match!");
2733     break;
2734   case ISD::FADD:
2735   case ISD::FSUB:
2736   case ISD::FMUL:
2737   case ISD::FDIV:
2738   case ISD::FREM:
2739     if (UnsafeFPMath) {
2740       if (Opcode == ISD::FADD) {
2741         // 0+x --> x
2742         if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2743           if (CFP->getValueAPF().isZero())
2744             return N2;
2745         // x+0 --> x
2746         if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2747           if (CFP->getValueAPF().isZero())
2748             return N1;
2749       } else if (Opcode == ISD::FSUB) {
2750         // x-0 --> x
2751         if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2752           if (CFP->getValueAPF().isZero())
2753             return N1;
2754       }
2755     }
2756     assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2757     assert(N1.getValueType() == N2.getValueType() &&
2758            N1.getValueType() == VT && "Binary operator types must match!");
2759     break;
2760   case ISD::FCOPYSIGN:   // N1 and result must match.  N1/N2 need not match.
2761     assert(N1.getValueType() == VT &&
2762            N1.getValueType().isFloatingPoint() &&
2763            N2.getValueType().isFloatingPoint() &&
2764            "Invalid FCOPYSIGN!");
2765     break;
2766   case ISD::SHL:
2767   case ISD::SRA:
2768   case ISD::SRL:
2769   case ISD::ROTL:
2770   case ISD::ROTR:
2771     assert(VT == N1.getValueType() &&
2772            "Shift operators return type must be the same as their first arg");
2773     assert(VT.isInteger() && N2.getValueType().isInteger() &&
2774            "Shifts only work on integers");
2775     // Verify that the shift amount VT is bit enough to hold valid shift
2776     // amounts.  This catches things like trying to shift an i1024 value by an
2777     // i8, which is easy to fall into in generic code that uses
2778     // TLI.getShiftAmount().
2779     assert(N2.getValueType().getSizeInBits() >=
2780                    Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2781            "Invalid use of small shift amount with oversized value!");
2782 
2783     // Always fold shifts of i1 values so the code generator doesn't need to
2784     // handle them.  Since we know the size of the shift has to be less than the
2785     // size of the value, the shift/rotate count is guaranteed to be zero.
2786     if (VT == MVT::i1)
2787       return N1;
2788     if (N2C && N2C->isNullValue())
2789       return N1;
2790     break;
2791   case ISD::FP_ROUND_INREG: {
2792     EVT EVT = cast<VTSDNode>(N2)->getVT();
2793     assert(VT == N1.getValueType() && "Not an inreg round!");
2794     assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2795            "Cannot FP_ROUND_INREG integer types");
2796     assert(EVT.isVector() == VT.isVector() &&
2797            "FP_ROUND_INREG type should be vector iff the operand "
2798            "type is vector!");
2799     assert((!EVT.isVector() ||
2800             EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2801            "Vector element counts must match in FP_ROUND_INREG");
2802     assert(EVT.bitsLE(VT) && "Not rounding down!");
2803     (void)EVT;
2804     if (cast<VTSDNode>(N2)->getVT() == VT) return N1;  // Not actually rounding.
2805     break;
2806   }
2807   case ISD::FP_ROUND:
2808     assert(VT.isFloatingPoint() &&
2809            N1.getValueType().isFloatingPoint() &&
2810            VT.bitsLE(N1.getValueType()) &&
2811            isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2812     if (N1.getValueType() == VT) return N1;  // noop conversion.
2813     break;
2814   case ISD::AssertSext:
2815   case ISD::AssertZext: {
2816     EVT EVT = cast<VTSDNode>(N2)->getVT();
2817     assert(VT == N1.getValueType() && "Not an inreg extend!");
2818     assert(VT.isInteger() && EVT.isInteger() &&
2819            "Cannot *_EXTEND_INREG FP types");
2820     assert(!EVT.isVector() &&
2821            "AssertSExt/AssertZExt type should be the vector element type "
2822            "rather than the vector type!");
2823     assert(EVT.bitsLE(VT) && "Not extending!");
2824     if (VT == EVT) return N1; // noop assertion.
2825     break;
2826   }
2827   case ISD::SIGN_EXTEND_INREG: {
2828     EVT EVT = cast<VTSDNode>(N2)->getVT();
2829     assert(VT == N1.getValueType() && "Not an inreg extend!");
2830     assert(VT.isInteger() && EVT.isInteger() &&
2831            "Cannot *_EXTEND_INREG FP types");
2832     assert(EVT.isVector() == VT.isVector() &&
2833            "SIGN_EXTEND_INREG type should be vector iff the operand "
2834            "type is vector!");
2835     assert((!EVT.isVector() ||
2836             EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2837            "Vector element counts must match in SIGN_EXTEND_INREG");
2838     assert(EVT.bitsLE(VT) && "Not extending!");
2839     if (EVT == VT) return N1;  // Not actually extending
2840 
2841     if (N1C) {
2842       APInt Val = N1C->getAPIntValue();
2843       unsigned FromBits = EVT.getScalarType().getSizeInBits();
2844       Val <<= Val.getBitWidth()-FromBits;
2845       Val = Val.ashr(Val.getBitWidth()-FromBits);
2846       return getConstant(Val, VT);
2847     }
2848     break;
2849   }
2850   case ISD::EXTRACT_VECTOR_ELT:
2851     // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2852     if (N1.getOpcode() == ISD::UNDEF)
2853       return getUNDEF(VT);
2854 
2855     // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2856     // expanding copies of large vectors from registers.
2857     if (N2C &&
2858         N1.getOpcode() == ISD::CONCAT_VECTORS &&
2859         N1.getNumOperands() > 0) {
2860       unsigned Factor =
2861         N1.getOperand(0).getValueType().getVectorNumElements();
2862       return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2863                      N1.getOperand(N2C->getZExtValue() / Factor),
2864                      getConstant(N2C->getZExtValue() % Factor,
2865                                  N2.getValueType()));
2866     }
2867 
2868     // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2869     // expanding large vector constants.
2870     if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2871       SDValue Elt = N1.getOperand(N2C->getZExtValue());
2872       EVT VEltTy = N1.getValueType().getVectorElementType();
2873       if (Elt.getValueType() != VEltTy) {
2874         // If the vector element type is not legal, the BUILD_VECTOR operands
2875         // are promoted and implicitly truncated.  Make that explicit here.
2876         Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2877       }
2878       if (VT != VEltTy) {
2879         // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2880         // result is implicitly extended.
2881         Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2882       }
2883       return Elt;
2884     }
2885 
2886     // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2887     // operations are lowered to scalars.
2888     if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2889       // If the indices are the same, return the inserted element else
2890       // if the indices are known different, extract the element from
2891       // the original vector.
2892       SDValue N1Op2 = N1.getOperand(2);
2893       ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2894 
2895       if (N1Op2C && N2C) {
2896         if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2897           if (VT == N1.getOperand(1).getValueType())
2898             return N1.getOperand(1);
2899           else
2900             return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2901         }
2902 
2903         return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2904       }
2905     }
2906     break;
2907   case ISD::EXTRACT_ELEMENT:
2908     assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2909     assert(!N1.getValueType().isVector() && !VT.isVector() &&
2910            (N1.getValueType().isInteger() == VT.isInteger()) &&
2911            N1.getValueType() != VT &&
2912            "Wrong types for EXTRACT_ELEMENT!");
2913 
2914     // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2915     // 64-bit integers into 32-bit parts.  Instead of building the extract of
2916     // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2917     if (N1.getOpcode() == ISD::BUILD_PAIR)
2918       return N1.getOperand(N2C->getZExtValue());
2919 
2920     // EXTRACT_ELEMENT of a constant int is also very common.
2921     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2922       unsigned ElementSize = VT.getSizeInBits();
2923       unsigned Shift = ElementSize * N2C->getZExtValue();
2924       APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2925       return getConstant(ShiftedVal.trunc(ElementSize), VT);
2926     }
2927     break;
2928   case ISD::EXTRACT_SUBVECTOR: {
2929     SDValue Index = N2;
2930     if (VT.isSimple() && N1.getValueType().isSimple()) {
2931       assert(VT.isVector() && N1.getValueType().isVector() &&
2932              "Extract subvector VTs must be a vectors!");
2933       assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2934              "Extract subvector VTs must have the same element type!");
2935       assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2936              "Extract subvector must be from larger vector to smaller vector!");
2937 
2938       if (isa<ConstantSDNode>(Index.getNode())) {
2939         assert((VT.getVectorNumElements() +
2940                 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2941                 <= N1.getValueType().getVectorNumElements())
2942                && "Extract subvector overflow!");
2943       }
2944 
2945       // Trivial extraction.
2946       if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2947         return N1;
2948     }
2949     break;
2950   }
2951   }
2952 
2953   if (N1C) {
2954     if (N2C) {
2955       SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2956       if (SV.getNode()) return SV;
2957     } else {      // Cannonicalize constant to RHS if commutative
2958       if (isCommutativeBinOp(Opcode)) {
2959         std::swap(N1C, N2C);
2960         std::swap(N1, N2);
2961       }
2962     }
2963   }
2964 
2965   // Constant fold FP operations.
2966   ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2967   ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2968   if (N1CFP) {
2969     if (!N2CFP && isCommutativeBinOp(Opcode)) {
2970       // Cannonicalize constant to RHS if commutative
2971       std::swap(N1CFP, N2CFP);
2972       std::swap(N1, N2);
2973     } else if (N2CFP && VT != MVT::ppcf128) {
2974       APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2975       APFloat::opStatus s;
2976       switch (Opcode) {
2977       case ISD::FADD:
2978         s = V1.add(V2, APFloat::rmNearestTiesToEven);
2979         if (s != APFloat::opInvalidOp)
2980           return getConstantFP(V1, VT);
2981         break;
2982       case ISD::FSUB:
2983         s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2984         if (s!=APFloat::opInvalidOp)
2985           return getConstantFP(V1, VT);
2986         break;
2987       case ISD::FMUL:
2988         s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2989         if (s!=APFloat::opInvalidOp)
2990           return getConstantFP(V1, VT);
2991         break;
2992       case ISD::FDIV:
2993         s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2994         if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2995           return getConstantFP(V1, VT);
2996         break;
2997       case ISD::FREM :
2998         s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2999         if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3000           return getConstantFP(V1, VT);
3001         break;
3002       case ISD::FCOPYSIGN:
3003         V1.copySign(V2);
3004         return getConstantFP(V1, VT);
3005       default: break;
3006       }
3007     }
3008   }
3009 
3010   // Canonicalize an UNDEF to the RHS, even over a constant.
3011   if (N1.getOpcode() == ISD::UNDEF) {
3012     if (isCommutativeBinOp(Opcode)) {
3013       std::swap(N1, N2);
3014     } else {
3015       switch (Opcode) {
3016       case ISD::FP_ROUND_INREG:
3017       case ISD::SIGN_EXTEND_INREG:
3018       case ISD::SUB:
3019       case ISD::FSUB:
3020       case ISD::FDIV:
3021       case ISD::FREM:
3022       case ISD::SRA:
3023         return N1;     // fold op(undef, arg2) -> undef
3024       case ISD::UDIV:
3025       case ISD::SDIV:
3026       case ISD::UREM:
3027       case ISD::SREM:
3028       case ISD::SRL:
3029       case ISD::SHL:
3030         if (!VT.isVector())
3031           return getConstant(0, VT);    // fold op(undef, arg2) -> 0
3032         // For vectors, we can't easily build an all zero vector, just return
3033         // the LHS.
3034         return N2;
3035       }
3036     }
3037   }
3038 
3039   // Fold a bunch of operators when the RHS is undef.
3040   if (N2.getOpcode() == ISD::UNDEF) {
3041     switch (Opcode) {
3042     case ISD::XOR:
3043       if (N1.getOpcode() == ISD::UNDEF)
3044         // Handle undef ^ undef -> 0 special case. This is a common
3045         // idiom (misuse).
3046         return getConstant(0, VT);
3047       // fallthrough
3048     case ISD::ADD:
3049     case ISD::ADDC:
3050     case ISD::ADDE:
3051     case ISD::SUB:
3052     case ISD::UDIV:
3053     case ISD::SDIV:
3054     case ISD::UREM:
3055     case ISD::SREM:
3056       return N2;       // fold op(arg1, undef) -> undef
3057     case ISD::FADD:
3058     case ISD::FSUB:
3059     case ISD::FMUL:
3060     case ISD::FDIV:
3061     case ISD::FREM:
3062       if (UnsafeFPMath)
3063         return N2;
3064       break;
3065     case ISD::MUL:
3066     case ISD::AND:
3067     case ISD::SRL:
3068     case ISD::SHL:
3069       if (!VT.isVector())
3070         return getConstant(0, VT);  // fold op(arg1, undef) -> 0
3071       // For vectors, we can't easily build an all zero vector, just return
3072       // the LHS.
3073       return N1;
3074     case ISD::OR:
3075       if (!VT.isVector())
3076         return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3077       // For vectors, we can't easily build an all one vector, just return
3078       // the LHS.
3079       return N1;
3080     case ISD::SRA:
3081       return N1;
3082     }
3083   }
3084 
3085   // Memoize this node if possible.
3086   SDNode *N;
3087   SDVTList VTs = getVTList(VT);
3088   if (VT != MVT::Glue) {
3089     SDValue Ops[] = { N1, N2 };
3090     FoldingSetNodeID ID;
3091     AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3092     void *IP = 0;
3093     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3094       return SDValue(E, 0);
3095 
3096     N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3097     CSEMap.InsertNode(N, IP);
3098   } else {
3099     N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3100   }
3101 
3102   AllNodes.push_back(N);
3103 #ifndef NDEBUG
3104   VerifySDNode(N);
3105 #endif
3106   return SDValue(N, 0);
3107 }
3108 
getNode(unsigned Opcode,DebugLoc DL,EVT VT,SDValue N1,SDValue N2,SDValue N3)3109 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3110                               SDValue N1, SDValue N2, SDValue N3) {
3111   // Perform various simplifications.
3112   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3113   switch (Opcode) {
3114   case ISD::CONCAT_VECTORS:
3115     // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3116     // one big BUILD_VECTOR.
3117     if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3118         N2.getOpcode() == ISD::BUILD_VECTOR &&
3119         N3.getOpcode() == ISD::BUILD_VECTOR) {
3120       SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3121                                     N1.getNode()->op_end());
3122       Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3123       Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3124       return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3125     }
3126     break;
3127   case ISD::SETCC: {
3128     // Use FoldSetCC to simplify SETCC's.
3129     SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3130     if (Simp.getNode()) return Simp;
3131     break;
3132   }
3133   case ISD::SELECT:
3134     if (N1C) {
3135      if (N1C->getZExtValue())
3136         return N2;             // select true, X, Y -> X
3137       else
3138         return N3;             // select false, X, Y -> Y
3139     }
3140 
3141     if (N2 == N3) return N2;   // select C, X, X -> X
3142     break;
3143   case ISD::VECTOR_SHUFFLE:
3144     llvm_unreachable("should use getVectorShuffle constructor!");
3145     break;
3146   case ISD::INSERT_SUBVECTOR: {
3147     SDValue Index = N3;
3148     if (VT.isSimple() && N1.getValueType().isSimple()
3149         && N2.getValueType().isSimple()) {
3150       assert(VT.isVector() && N1.getValueType().isVector() &&
3151              N2.getValueType().isVector() &&
3152              "Insert subvector VTs must be a vectors");
3153       assert(VT == N1.getValueType() &&
3154              "Dest and insert subvector source types must match!");
3155       assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3156              "Insert subvector must be from smaller vector to larger vector!");
3157       if (isa<ConstantSDNode>(Index.getNode())) {
3158         assert((N2.getValueType().getVectorNumElements() +
3159                 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3160                 <= VT.getVectorNumElements())
3161                && "Insert subvector overflow!");
3162       }
3163 
3164       // Trivial insertion.
3165       if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3166         return N2;
3167     }
3168     break;
3169   }
3170   case ISD::BITCAST:
3171     // Fold bit_convert nodes from a type to themselves.
3172     if (N1.getValueType() == VT)
3173       return N1;
3174     break;
3175   }
3176 
3177   // Memoize node if it doesn't produce a flag.
3178   SDNode *N;
3179   SDVTList VTs = getVTList(VT);
3180   if (VT != MVT::Glue) {
3181     SDValue Ops[] = { N1, N2, N3 };
3182     FoldingSetNodeID ID;
3183     AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3184     void *IP = 0;
3185     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3186       return SDValue(E, 0);
3187 
3188     N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3189     CSEMap.InsertNode(N, IP);
3190   } else {
3191     N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3192   }
3193 
3194   AllNodes.push_back(N);
3195 #ifndef NDEBUG
3196   VerifySDNode(N);
3197 #endif
3198   return SDValue(N, 0);
3199 }
3200 
getNode(unsigned Opcode,DebugLoc DL,EVT VT,SDValue N1,SDValue N2,SDValue N3,SDValue N4)3201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3202                               SDValue N1, SDValue N2, SDValue N3,
3203                               SDValue N4) {
3204   SDValue Ops[] = { N1, N2, N3, N4 };
3205   return getNode(Opcode, DL, VT, Ops, 4);
3206 }
3207 
getNode(unsigned Opcode,DebugLoc DL,EVT VT,SDValue N1,SDValue N2,SDValue N3,SDValue N4,SDValue N5)3208 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3209                               SDValue N1, SDValue N2, SDValue N3,
3210                               SDValue N4, SDValue N5) {
3211   SDValue Ops[] = { N1, N2, N3, N4, N5 };
3212   return getNode(Opcode, DL, VT, Ops, 5);
3213 }
3214 
3215 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3216 /// the incoming stack arguments to be loaded from the stack.
getStackArgumentTokenFactor(SDValue Chain)3217 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3218   SmallVector<SDValue, 8> ArgChains;
3219 
3220   // Include the original chain at the beginning of the list. When this is
3221   // used by target LowerCall hooks, this helps legalize find the
3222   // CALLSEQ_BEGIN node.
3223   ArgChains.push_back(Chain);
3224 
3225   // Add a chain value for each stack argument.
3226   for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3227        UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3228     if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3229       if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3230         if (FI->getIndex() < 0)
3231           ArgChains.push_back(SDValue(L, 1));
3232 
3233   // Build a tokenfactor for all the chains.
3234   return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3235                  &ArgChains[0], ArgChains.size());
3236 }
3237 
3238 /// SplatByte - Distribute ByteVal over NumBits bits.
SplatByte(unsigned NumBits,uint8_t ByteVal)3239 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3240   APInt Val = APInt(NumBits, ByteVal);
3241   unsigned Shift = 8;
3242   for (unsigned i = NumBits; i > 8; i >>= 1) {
3243     Val = (Val << Shift) | Val;
3244     Shift <<= 1;
3245   }
3246   return Val;
3247 }
3248 
3249 /// getMemsetValue - Vectorized representation of the memset value
3250 /// operand.
getMemsetValue(SDValue Value,EVT VT,SelectionDAG & DAG,DebugLoc dl)3251 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3252                               DebugLoc dl) {
3253   assert(Value.getOpcode() != ISD::UNDEF);
3254 
3255   unsigned NumBits = VT.getScalarType().getSizeInBits();
3256   if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3257     APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3258     if (VT.isInteger())
3259       return DAG.getConstant(Val, VT);
3260     return DAG.getConstantFP(APFloat(Val), VT);
3261   }
3262 
3263   Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3264   if (NumBits > 8) {
3265     // Use a multiplication with 0x010101... to extend the input to the
3266     // required length.
3267     APInt Magic = SplatByte(NumBits, 0x01);
3268     Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3269   }
3270 
3271   return Value;
3272 }
3273 
3274 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3275 /// used when a memcpy is turned into a memset when the source is a constant
3276 /// string ptr.
getMemsetStringVal(EVT VT,DebugLoc dl,SelectionDAG & DAG,const TargetLowering & TLI,std::string & Str,unsigned Offset)3277 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3278                                   const TargetLowering &TLI,
3279                                   std::string &Str, unsigned Offset) {
3280   // Handle vector with all elements zero.
3281   if (Str.empty()) {
3282     if (VT.isInteger())
3283       return DAG.getConstant(0, VT);
3284     else if (VT == MVT::f32 || VT == MVT::f64)
3285       return DAG.getConstantFP(0.0, VT);
3286     else if (VT.isVector()) {
3287       unsigned NumElts = VT.getVectorNumElements();
3288       MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3289       return DAG.getNode(ISD::BITCAST, dl, VT,
3290                          DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3291                                                              EltVT, NumElts)));
3292     } else
3293       llvm_unreachable("Expected type!");
3294   }
3295 
3296   assert(!VT.isVector() && "Can't handle vector type here!");
3297   unsigned NumBits = VT.getSizeInBits();
3298   unsigned MSB = NumBits / 8;
3299   uint64_t Val = 0;
3300   if (TLI.isLittleEndian())
3301     Offset = Offset + MSB - 1;
3302   for (unsigned i = 0; i != MSB; ++i) {
3303     Val = (Val << 8) | (unsigned char)Str[Offset];
3304     Offset += TLI.isLittleEndian() ? -1 : 1;
3305   }
3306   return DAG.getConstant(Val, VT);
3307 }
3308 
3309 /// getMemBasePlusOffset - Returns base and offset node for the
3310 ///
getMemBasePlusOffset(SDValue Base,unsigned Offset,SelectionDAG & DAG)3311 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3312                                       SelectionDAG &DAG) {
3313   EVT VT = Base.getValueType();
3314   return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3315                      VT, Base, DAG.getConstant(Offset, VT));
3316 }
3317 
3318 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3319 ///
isMemSrcFromString(SDValue Src,std::string & Str)3320 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3321   unsigned SrcDelta = 0;
3322   GlobalAddressSDNode *G = NULL;
3323   if (Src.getOpcode() == ISD::GlobalAddress)
3324     G = cast<GlobalAddressSDNode>(Src);
3325   else if (Src.getOpcode() == ISD::ADD &&
3326            Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3327            Src.getOperand(1).getOpcode() == ISD::Constant) {
3328     G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3329     SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3330   }
3331   if (!G)
3332     return false;
3333 
3334   const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3335   if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3336     return true;
3337 
3338   return false;
3339 }
3340 
3341 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3342 /// to replace the memset / memcpy. Return true if the number of memory ops
3343 /// is below the threshold. It returns the types of the sequence of
3344 /// memory ops to perform memset / memcpy by reference.
FindOptimalMemOpLowering(std::vector<EVT> & MemOps,unsigned Limit,uint64_t Size,unsigned DstAlign,unsigned SrcAlign,bool NonScalarIntSafe,bool MemcpyStrSrc,SelectionDAG & DAG,const TargetLowering & TLI)3345 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3346                                      unsigned Limit, uint64_t Size,
3347                                      unsigned DstAlign, unsigned SrcAlign,
3348                                      bool NonScalarIntSafe,
3349                                      bool MemcpyStrSrc,
3350                                      SelectionDAG &DAG,
3351                                      const TargetLowering &TLI) {
3352   assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3353          "Expecting memcpy / memset source to meet alignment requirement!");
3354   // If 'SrcAlign' is zero, that means the memory operation does not need to
3355   // load the value, i.e. memset or memcpy from constant string. Otherwise,
3356   // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3357   // is the specified alignment of the memory operation. If it is zero, that
3358   // means it's possible to change the alignment of the destination.
3359   // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3360   // not need to be loaded.
3361   EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3362                                    NonScalarIntSafe, MemcpyStrSrc,
3363                                    DAG.getMachineFunction());
3364 
3365   if (VT == MVT::Other) {
3366     if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3367         TLI.allowsUnalignedMemoryAccesses(VT)) {
3368       VT = TLI.getPointerTy();
3369     } else {
3370       switch (DstAlign & 7) {
3371       case 0:  VT = MVT::i64; break;
3372       case 4:  VT = MVT::i32; break;
3373       case 2:  VT = MVT::i16; break;
3374       default: VT = MVT::i8;  break;
3375       }
3376     }
3377 
3378     MVT LVT = MVT::i64;
3379     while (!TLI.isTypeLegal(LVT))
3380       LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3381     assert(LVT.isInteger());
3382 
3383     if (VT.bitsGT(LVT))
3384       VT = LVT;
3385   }
3386 
3387   unsigned NumMemOps = 0;
3388   while (Size != 0) {
3389     unsigned VTSize = VT.getSizeInBits() / 8;
3390     while (VTSize > Size) {
3391       // For now, only use non-vector load / store's for the left-over pieces.
3392       if (VT.isVector() || VT.isFloatingPoint()) {
3393         VT = MVT::i64;
3394         while (!TLI.isTypeLegal(VT))
3395           VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3396         VTSize = VT.getSizeInBits() / 8;
3397       } else {
3398         // This can result in a type that is not legal on the target, e.g.
3399         // 1 or 2 bytes on PPC.
3400         VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3401         VTSize >>= 1;
3402       }
3403     }
3404 
3405     if (++NumMemOps > Limit)
3406       return false;
3407     MemOps.push_back(VT);
3408     Size -= VTSize;
3409   }
3410 
3411   return true;
3412 }
3413 
getMemcpyLoadsAndStores(SelectionDAG & DAG,DebugLoc dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size,unsigned Align,bool isVol,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo)3414 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3415                                        SDValue Chain, SDValue Dst,
3416                                        SDValue Src, uint64_t Size,
3417                                        unsigned Align, bool isVol,
3418                                        bool AlwaysInline,
3419                                        MachinePointerInfo DstPtrInfo,
3420                                        MachinePointerInfo SrcPtrInfo) {
3421   // Turn a memcpy of undef to nop.
3422   if (Src.getOpcode() == ISD::UNDEF)
3423     return Chain;
3424 
3425   // Expand memcpy to a series of load and store ops if the size operand falls
3426   // below a certain threshold.
3427   // TODO: In the AlwaysInline case, if the size is big then generate a loop
3428   // rather than maybe a humongous number of loads and stores.
3429   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3430   std::vector<EVT> MemOps;
3431   bool DstAlignCanChange = false;
3432   MachineFunction &MF = DAG.getMachineFunction();
3433   MachineFrameInfo *MFI = MF.getFrameInfo();
3434   bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3435   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3436   if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3437     DstAlignCanChange = true;
3438   unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3439   if (Align > SrcAlign)
3440     SrcAlign = Align;
3441   std::string Str;
3442   bool CopyFromStr = isMemSrcFromString(Src, Str);
3443   bool isZeroStr = CopyFromStr && Str.empty();
3444   unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3445 
3446   if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3447                                 (DstAlignCanChange ? 0 : Align),
3448                                 (isZeroStr ? 0 : SrcAlign),
3449                                 true, CopyFromStr, DAG, TLI))
3450     return SDValue();
3451 
3452   if (DstAlignCanChange) {
3453     Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3454     unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3455     if (NewAlign > Align) {
3456       // Give the stack frame object a larger alignment if needed.
3457       if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3458         MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3459       Align = NewAlign;
3460     }
3461   }
3462 
3463   SmallVector<SDValue, 8> OutChains;
3464   unsigned NumMemOps = MemOps.size();
3465   uint64_t SrcOff = 0, DstOff = 0;
3466   for (unsigned i = 0; i != NumMemOps; ++i) {
3467     EVT VT = MemOps[i];
3468     unsigned VTSize = VT.getSizeInBits() / 8;
3469     SDValue Value, Store;
3470 
3471     if (CopyFromStr &&
3472         (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3473       // It's unlikely a store of a vector immediate can be done in a single
3474       // instruction. It would require a load from a constantpool first.
3475       // We only handle zero vectors here.
3476       // FIXME: Handle other cases where store of vector immediate is done in
3477       // a single instruction.
3478       Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3479       Store = DAG.getStore(Chain, dl, Value,
3480                            getMemBasePlusOffset(Dst, DstOff, DAG),
3481                            DstPtrInfo.getWithOffset(DstOff), isVol,
3482                            false, Align);
3483     } else {
3484       // The type might not be legal for the target.  This should only happen
3485       // if the type is smaller than a legal type, as on PPC, so the right
3486       // thing to do is generate a LoadExt/StoreTrunc pair.  These simplify
3487       // to Load/Store if NVT==VT.
3488       // FIXME does the case above also need this?
3489       EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3490       assert(NVT.bitsGE(VT));
3491       Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3492                              getMemBasePlusOffset(Src, SrcOff, DAG),
3493                              SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3494                              MinAlign(SrcAlign, SrcOff));
3495       Store = DAG.getTruncStore(Chain, dl, Value,
3496                                 getMemBasePlusOffset(Dst, DstOff, DAG),
3497                                 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3498                                 false, Align);
3499     }
3500     OutChains.push_back(Store);
3501     SrcOff += VTSize;
3502     DstOff += VTSize;
3503   }
3504 
3505   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3506                      &OutChains[0], OutChains.size());
3507 }
3508 
getMemmoveLoadsAndStores(SelectionDAG & DAG,DebugLoc dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size,unsigned Align,bool isVol,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo)3509 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3510                                         SDValue Chain, SDValue Dst,
3511                                         SDValue Src, uint64_t Size,
3512                                         unsigned Align,  bool isVol,
3513                                         bool AlwaysInline,
3514                                         MachinePointerInfo DstPtrInfo,
3515                                         MachinePointerInfo SrcPtrInfo) {
3516   // Turn a memmove of undef to nop.
3517   if (Src.getOpcode() == ISD::UNDEF)
3518     return Chain;
3519 
3520   // Expand memmove to a series of load and store ops if the size operand falls
3521   // below a certain threshold.
3522   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3523   std::vector<EVT> MemOps;
3524   bool DstAlignCanChange = false;
3525   MachineFunction &MF = DAG.getMachineFunction();
3526   MachineFrameInfo *MFI = MF.getFrameInfo();
3527   bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3528   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3529   if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3530     DstAlignCanChange = true;
3531   unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3532   if (Align > SrcAlign)
3533     SrcAlign = Align;
3534   unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3535 
3536   if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3537                                 (DstAlignCanChange ? 0 : Align),
3538                                 SrcAlign, true, false, DAG, TLI))
3539     return SDValue();
3540 
3541   if (DstAlignCanChange) {
3542     Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3543     unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3544     if (NewAlign > Align) {
3545       // Give the stack frame object a larger alignment if needed.
3546       if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3547         MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3548       Align = NewAlign;
3549     }
3550   }
3551 
3552   uint64_t SrcOff = 0, DstOff = 0;
3553   SmallVector<SDValue, 8> LoadValues;
3554   SmallVector<SDValue, 8> LoadChains;
3555   SmallVector<SDValue, 8> OutChains;
3556   unsigned NumMemOps = MemOps.size();
3557   for (unsigned i = 0; i < NumMemOps; i++) {
3558     EVT VT = MemOps[i];
3559     unsigned VTSize = VT.getSizeInBits() / 8;
3560     SDValue Value, Store;
3561 
3562     Value = DAG.getLoad(VT, dl, Chain,
3563                         getMemBasePlusOffset(Src, SrcOff, DAG),
3564                         SrcPtrInfo.getWithOffset(SrcOff), isVol,
3565                         false, SrcAlign);
3566     LoadValues.push_back(Value);
3567     LoadChains.push_back(Value.getValue(1));
3568     SrcOff += VTSize;
3569   }
3570   Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3571                       &LoadChains[0], LoadChains.size());
3572   OutChains.clear();
3573   for (unsigned i = 0; i < NumMemOps; i++) {
3574     EVT VT = MemOps[i];
3575     unsigned VTSize = VT.getSizeInBits() / 8;
3576     SDValue Value, Store;
3577 
3578     Store = DAG.getStore(Chain, dl, LoadValues[i],
3579                          getMemBasePlusOffset(Dst, DstOff, DAG),
3580                          DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3581     OutChains.push_back(Store);
3582     DstOff += VTSize;
3583   }
3584 
3585   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3586                      &OutChains[0], OutChains.size());
3587 }
3588 
getMemsetStores(SelectionDAG & DAG,DebugLoc dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size,unsigned Align,bool isVol,MachinePointerInfo DstPtrInfo)3589 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3590                                SDValue Chain, SDValue Dst,
3591                                SDValue Src, uint64_t Size,
3592                                unsigned Align, bool isVol,
3593                                MachinePointerInfo DstPtrInfo) {
3594   // Turn a memset of undef to nop.
3595   if (Src.getOpcode() == ISD::UNDEF)
3596     return Chain;
3597 
3598   // Expand memset to a series of load/store ops if the size operand
3599   // falls below a certain threshold.
3600   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3601   std::vector<EVT> MemOps;
3602   bool DstAlignCanChange = false;
3603   MachineFunction &MF = DAG.getMachineFunction();
3604   MachineFrameInfo *MFI = MF.getFrameInfo();
3605   bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3606   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3607   if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3608     DstAlignCanChange = true;
3609   bool NonScalarIntSafe =
3610     isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3611   if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3612                                 Size, (DstAlignCanChange ? 0 : Align), 0,
3613                                 NonScalarIntSafe, false, DAG, TLI))
3614     return SDValue();
3615 
3616   if (DstAlignCanChange) {
3617     Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3618     unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3619     if (NewAlign > Align) {
3620       // Give the stack frame object a larger alignment if needed.
3621       if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3622         MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3623       Align = NewAlign;
3624     }
3625   }
3626 
3627   SmallVector<SDValue, 8> OutChains;
3628   uint64_t DstOff = 0;
3629   unsigned NumMemOps = MemOps.size();
3630 
3631   // Find the largest store and generate the bit pattern for it.
3632   EVT LargestVT = MemOps[0];
3633   for (unsigned i = 1; i < NumMemOps; i++)
3634     if (MemOps[i].bitsGT(LargestVT))
3635       LargestVT = MemOps[i];
3636   SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3637 
3638   for (unsigned i = 0; i < NumMemOps; i++) {
3639     EVT VT = MemOps[i];
3640 
3641     // If this store is smaller than the largest store see whether we can get
3642     // the smaller value for free with a truncate.
3643     SDValue Value = MemSetValue;
3644     if (VT.bitsLT(LargestVT)) {
3645       if (!LargestVT.isVector() && !VT.isVector() &&
3646           TLI.isTruncateFree(LargestVT, VT))
3647         Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3648       else
3649         Value = getMemsetValue(Src, VT, DAG, dl);
3650     }
3651     assert(Value.getValueType() == VT && "Value with wrong type.");
3652     SDValue Store = DAG.getStore(Chain, dl, Value,
3653                                  getMemBasePlusOffset(Dst, DstOff, DAG),
3654                                  DstPtrInfo.getWithOffset(DstOff),
3655                                  isVol, false, Align);
3656     OutChains.push_back(Store);
3657     DstOff += VT.getSizeInBits() / 8;
3658   }
3659 
3660   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3661                      &OutChains[0], OutChains.size());
3662 }
3663 
getMemcpy(SDValue Chain,DebugLoc dl,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,bool isVol,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo)3664 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3665                                 SDValue Src, SDValue Size,
3666                                 unsigned Align, bool isVol, bool AlwaysInline,
3667                                 MachinePointerInfo DstPtrInfo,
3668                                 MachinePointerInfo SrcPtrInfo) {
3669 
3670   // Check to see if we should lower the memcpy to loads and stores first.
3671   // For cases within the target-specified limits, this is the best choice.
3672   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3673   if (ConstantSize) {
3674     // Memcpy with size zero? Just return the original chain.
3675     if (ConstantSize->isNullValue())
3676       return Chain;
3677 
3678     SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3679                                              ConstantSize->getZExtValue(),Align,
3680                                 isVol, false, DstPtrInfo, SrcPtrInfo);
3681     if (Result.getNode())
3682       return Result;
3683   }
3684 
3685   // Then check to see if we should lower the memcpy with target-specific
3686   // code. If the target chooses to do this, this is the next best.
3687   SDValue Result =
3688     TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3689                                 isVol, AlwaysInline,
3690                                 DstPtrInfo, SrcPtrInfo);
3691   if (Result.getNode())
3692     return Result;
3693 
3694   // If we really need inline code and the target declined to provide it,
3695   // use a (potentially long) sequence of loads and stores.
3696   if (AlwaysInline) {
3697     assert(ConstantSize && "AlwaysInline requires a constant size!");
3698     return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3699                                    ConstantSize->getZExtValue(), Align, isVol,
3700                                    true, DstPtrInfo, SrcPtrInfo);
3701   }
3702 
3703   // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3704   // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3705   // respect volatile, so they may do things like read or write memory
3706   // beyond the given memory regions. But fixing this isn't easy, and most
3707   // people don't care.
3708 
3709   // Emit a library call.
3710   TargetLowering::ArgListTy Args;
3711   TargetLowering::ArgListEntry Entry;
3712   Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3713   Entry.Node = Dst; Args.push_back(Entry);
3714   Entry.Node = Src; Args.push_back(Entry);
3715   Entry.Node = Size; Args.push_back(Entry);
3716   // FIXME: pass in DebugLoc
3717   std::pair<SDValue,SDValue> CallResult =
3718     TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3719                     false, false, false, false, 0,
3720                     TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3721                     /*isReturnValueUsed=*/false,
3722                     getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3723                                       TLI.getPointerTy()),
3724                     Args, *this, dl);
3725   return CallResult.second;
3726 }
3727 
getMemmove(SDValue Chain,DebugLoc dl,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,bool isVol,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo)3728 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3729                                  SDValue Src, SDValue Size,
3730                                  unsigned Align, bool isVol,
3731                                  MachinePointerInfo DstPtrInfo,
3732                                  MachinePointerInfo SrcPtrInfo) {
3733 
3734   // Check to see if we should lower the memmove to loads and stores first.
3735   // For cases within the target-specified limits, this is the best choice.
3736   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3737   if (ConstantSize) {
3738     // Memmove with size zero? Just return the original chain.
3739     if (ConstantSize->isNullValue())
3740       return Chain;
3741 
3742     SDValue Result =
3743       getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3744                                ConstantSize->getZExtValue(), Align, isVol,
3745                                false, DstPtrInfo, SrcPtrInfo);
3746     if (Result.getNode())
3747       return Result;
3748   }
3749 
3750   // Then check to see if we should lower the memmove with target-specific
3751   // code. If the target chooses to do this, this is the next best.
3752   SDValue Result =
3753     TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3754                                  DstPtrInfo, SrcPtrInfo);
3755   if (Result.getNode())
3756     return Result;
3757 
3758   // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3759   // not be safe.  See memcpy above for more details.
3760 
3761   // Emit a library call.
3762   TargetLowering::ArgListTy Args;
3763   TargetLowering::ArgListEntry Entry;
3764   Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3765   Entry.Node = Dst; Args.push_back(Entry);
3766   Entry.Node = Src; Args.push_back(Entry);
3767   Entry.Node = Size; Args.push_back(Entry);
3768   // FIXME:  pass in DebugLoc
3769   std::pair<SDValue,SDValue> CallResult =
3770     TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3771                     false, false, false, false, 0,
3772                     TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3773                     /*isReturnValueUsed=*/false,
3774                     getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3775                                       TLI.getPointerTy()),
3776                     Args, *this, dl);
3777   return CallResult.second;
3778 }
3779 
getMemset(SDValue Chain,DebugLoc dl,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,bool isVol,MachinePointerInfo DstPtrInfo)3780 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3781                                 SDValue Src, SDValue Size,
3782                                 unsigned Align, bool isVol,
3783                                 MachinePointerInfo DstPtrInfo) {
3784 
3785   // Check to see if we should lower the memset to stores first.
3786   // For cases within the target-specified limits, this is the best choice.
3787   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3788   if (ConstantSize) {
3789     // Memset with size zero? Just return the original chain.
3790     if (ConstantSize->isNullValue())
3791       return Chain;
3792 
3793     SDValue Result =
3794       getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3795                       Align, isVol, DstPtrInfo);
3796 
3797     if (Result.getNode())
3798       return Result;
3799   }
3800 
3801   // Then check to see if we should lower the memset with target-specific
3802   // code. If the target chooses to do this, this is the next best.
3803   SDValue Result =
3804     TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3805                                 DstPtrInfo);
3806   if (Result.getNode())
3807     return Result;
3808 
3809   // Emit a library call.
3810   Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3811   TargetLowering::ArgListTy Args;
3812   TargetLowering::ArgListEntry Entry;
3813   Entry.Node = Dst; Entry.Ty = IntPtrTy;
3814   Args.push_back(Entry);
3815   // Extend or truncate the argument to be an i32 value for the call.
3816   if (Src.getValueType().bitsGT(MVT::i32))
3817     Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3818   else
3819     Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3820   Entry.Node = Src;
3821   Entry.Ty = Type::getInt32Ty(*getContext());
3822   Entry.isSExt = true;
3823   Args.push_back(Entry);
3824   Entry.Node = Size;
3825   Entry.Ty = IntPtrTy;
3826   Entry.isSExt = false;
3827   Args.push_back(Entry);
3828   // FIXME: pass in DebugLoc
3829   std::pair<SDValue,SDValue> CallResult =
3830     TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3831                     false, false, false, false, 0,
3832                     TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3833                     /*isReturnValueUsed=*/false,
3834                     getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3835                                       TLI.getPointerTy()),
3836                     Args, *this, dl);
3837   return CallResult.second;
3838 }
3839 
getAtomic(unsigned Opcode,DebugLoc dl,EVT MemVT,SDValue Chain,SDValue Ptr,SDValue Cmp,SDValue Swp,MachinePointerInfo PtrInfo,unsigned Alignment,AtomicOrdering Ordering,SynchronizationScope SynchScope)3840 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3841                                 SDValue Chain, SDValue Ptr, SDValue Cmp,
3842                                 SDValue Swp, MachinePointerInfo PtrInfo,
3843                                 unsigned Alignment,
3844                                 AtomicOrdering Ordering,
3845                                 SynchronizationScope SynchScope) {
3846   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
3847     Alignment = getEVTAlignment(MemVT);
3848 
3849   MachineFunction &MF = getMachineFunction();
3850   unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3851 
3852   // For now, atomics are considered to be volatile always.
3853   // FIXME: Volatile isn't really correct; we should keep track of atomic
3854   // orderings in the memoperand.
3855   Flags |= MachineMemOperand::MOVolatile;
3856 
3857   MachineMemOperand *MMO =
3858     MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3859 
3860   return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3861                    Ordering, SynchScope);
3862 }
3863 
getAtomic(unsigned Opcode,DebugLoc dl,EVT MemVT,SDValue Chain,SDValue Ptr,SDValue Cmp,SDValue Swp,MachineMemOperand * MMO,AtomicOrdering Ordering,SynchronizationScope SynchScope)3864 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3865                                 SDValue Chain,
3866                                 SDValue Ptr, SDValue Cmp,
3867                                 SDValue Swp, MachineMemOperand *MMO,
3868                                 AtomicOrdering Ordering,
3869                                 SynchronizationScope SynchScope) {
3870   assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3871   assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3872 
3873   EVT VT = Cmp.getValueType();
3874 
3875   SDVTList VTs = getVTList(VT, MVT::Other);
3876   FoldingSetNodeID ID;
3877   ID.AddInteger(MemVT.getRawBits());
3878   SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3879   AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3880   void* IP = 0;
3881   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3882     cast<AtomicSDNode>(E)->refineAlignment(MMO);
3883     return SDValue(E, 0);
3884   }
3885   SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3886                                                Ptr, Cmp, Swp, MMO, Ordering,
3887                                                SynchScope);
3888   CSEMap.InsertNode(N, IP);
3889   AllNodes.push_back(N);
3890   return SDValue(N, 0);
3891 }
3892 
getAtomic(unsigned Opcode,DebugLoc dl,EVT MemVT,SDValue Chain,SDValue Ptr,SDValue Val,const Value * PtrVal,unsigned Alignment,AtomicOrdering Ordering,SynchronizationScope SynchScope)3893 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3894                                 SDValue Chain,
3895                                 SDValue Ptr, SDValue Val,
3896                                 const Value* PtrVal,
3897                                 unsigned Alignment,
3898                                 AtomicOrdering Ordering,
3899                                 SynchronizationScope SynchScope) {
3900   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
3901     Alignment = getEVTAlignment(MemVT);
3902 
3903   MachineFunction &MF = getMachineFunction();
3904   // A monotonic store does not load; a release store "loads" in the sense
3905   // that other stores cannot be sunk past it.
3906   // (An atomicrmw obviously both loads and stores.)
3907   unsigned Flags = MachineMemOperand::MOStore;
3908   if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3909     Flags |= MachineMemOperand::MOLoad;
3910 
3911   // For now, atomics are considered to be volatile always.
3912   // FIXME: Volatile isn't really correct; we should keep track of atomic
3913   // orderings in the memoperand.
3914   Flags |= MachineMemOperand::MOVolatile;
3915 
3916   MachineMemOperand *MMO =
3917     MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3918                             MemVT.getStoreSize(), Alignment);
3919 
3920   return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3921                    Ordering, SynchScope);
3922 }
3923 
getAtomic(unsigned Opcode,DebugLoc dl,EVT MemVT,SDValue Chain,SDValue Ptr,SDValue Val,MachineMemOperand * MMO,AtomicOrdering Ordering,SynchronizationScope SynchScope)3924 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3925                                 SDValue Chain,
3926                                 SDValue Ptr, SDValue Val,
3927                                 MachineMemOperand *MMO,
3928                                 AtomicOrdering Ordering,
3929                                 SynchronizationScope SynchScope) {
3930   assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3931           Opcode == ISD::ATOMIC_LOAD_SUB ||
3932           Opcode == ISD::ATOMIC_LOAD_AND ||
3933           Opcode == ISD::ATOMIC_LOAD_OR ||
3934           Opcode == ISD::ATOMIC_LOAD_XOR ||
3935           Opcode == ISD::ATOMIC_LOAD_NAND ||
3936           Opcode == ISD::ATOMIC_LOAD_MIN ||
3937           Opcode == ISD::ATOMIC_LOAD_MAX ||
3938           Opcode == ISD::ATOMIC_LOAD_UMIN ||
3939           Opcode == ISD::ATOMIC_LOAD_UMAX ||
3940           Opcode == ISD::ATOMIC_SWAP ||
3941           Opcode == ISD::ATOMIC_STORE) &&
3942          "Invalid Atomic Op");
3943 
3944   EVT VT = Val.getValueType();
3945 
3946   SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3947                                                getVTList(VT, MVT::Other);
3948   FoldingSetNodeID ID;
3949   ID.AddInteger(MemVT.getRawBits());
3950   SDValue Ops[] = {Chain, Ptr, Val};
3951   AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3952   void* IP = 0;
3953   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3954     cast<AtomicSDNode>(E)->refineAlignment(MMO);
3955     return SDValue(E, 0);
3956   }
3957   SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3958                                                Ptr, Val, MMO,
3959                                                Ordering, SynchScope);
3960   CSEMap.InsertNode(N, IP);
3961   AllNodes.push_back(N);
3962   return SDValue(N, 0);
3963 }
3964 
getAtomic(unsigned Opcode,DebugLoc dl,EVT MemVT,EVT VT,SDValue Chain,SDValue Ptr,const Value * PtrVal,unsigned Alignment,AtomicOrdering Ordering,SynchronizationScope SynchScope)3965 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3966                                 EVT VT, SDValue Chain,
3967                                 SDValue Ptr,
3968                                 const Value* PtrVal,
3969                                 unsigned Alignment,
3970                                 AtomicOrdering Ordering,
3971                                 SynchronizationScope SynchScope) {
3972   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
3973     Alignment = getEVTAlignment(MemVT);
3974 
3975   MachineFunction &MF = getMachineFunction();
3976   // A monotonic load does not store; an acquire load "stores" in the sense
3977   // that other loads cannot be hoisted past it.
3978   unsigned Flags = MachineMemOperand::MOLoad;
3979   if (Ordering > Monotonic)
3980     Flags |= MachineMemOperand::MOStore;
3981 
3982   // For now, atomics are considered to be volatile always.
3983   // FIXME: Volatile isn't really correct; we should keep track of atomic
3984   // orderings in the memoperand.
3985   Flags |= MachineMemOperand::MOVolatile;
3986 
3987   MachineMemOperand *MMO =
3988     MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3989                             MemVT.getStoreSize(), Alignment);
3990 
3991   return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
3992                    Ordering, SynchScope);
3993 }
3994 
getAtomic(unsigned Opcode,DebugLoc dl,EVT MemVT,EVT VT,SDValue Chain,SDValue Ptr,MachineMemOperand * MMO,AtomicOrdering Ordering,SynchronizationScope SynchScope)3995 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3996                                 EVT VT, SDValue Chain,
3997                                 SDValue Ptr,
3998                                 MachineMemOperand *MMO,
3999                                 AtomicOrdering Ordering,
4000                                 SynchronizationScope SynchScope) {
4001   assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4002 
4003   SDVTList VTs = getVTList(VT, MVT::Other);
4004   FoldingSetNodeID ID;
4005   ID.AddInteger(MemVT.getRawBits());
4006   SDValue Ops[] = {Chain, Ptr};
4007   AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4008   void* IP = 0;
4009   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4010     cast<AtomicSDNode>(E)->refineAlignment(MMO);
4011     return SDValue(E, 0);
4012   }
4013   SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4014                                                Ptr, MMO, Ordering, SynchScope);
4015   CSEMap.InsertNode(N, IP);
4016   AllNodes.push_back(N);
4017   return SDValue(N, 0);
4018 }
4019 
4020 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
getMergeValues(const SDValue * Ops,unsigned NumOps,DebugLoc dl)4021 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4022                                      DebugLoc dl) {
4023   if (NumOps == 1)
4024     return Ops[0];
4025 
4026   SmallVector<EVT, 4> VTs;
4027   VTs.reserve(NumOps);
4028   for (unsigned i = 0; i < NumOps; ++i)
4029     VTs.push_back(Ops[i].getValueType());
4030   return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4031                  Ops, NumOps);
4032 }
4033 
4034 SDValue
getMemIntrinsicNode(unsigned Opcode,DebugLoc dl,const EVT * VTs,unsigned NumVTs,const SDValue * Ops,unsigned NumOps,EVT MemVT,MachinePointerInfo PtrInfo,unsigned Align,bool Vol,bool ReadMem,bool WriteMem)4035 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4036                                   const EVT *VTs, unsigned NumVTs,
4037                                   const SDValue *Ops, unsigned NumOps,
4038                                   EVT MemVT, MachinePointerInfo PtrInfo,
4039                                   unsigned Align, bool Vol,
4040                                   bool ReadMem, bool WriteMem) {
4041   return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4042                              MemVT, PtrInfo, Align, Vol,
4043                              ReadMem, WriteMem);
4044 }
4045 
4046 SDValue
getMemIntrinsicNode(unsigned Opcode,DebugLoc dl,SDVTList VTList,const SDValue * Ops,unsigned NumOps,EVT MemVT,MachinePointerInfo PtrInfo,unsigned Align,bool Vol,bool ReadMem,bool WriteMem)4047 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4048                                   const SDValue *Ops, unsigned NumOps,
4049                                   EVT MemVT, MachinePointerInfo PtrInfo,
4050                                   unsigned Align, bool Vol,
4051                                   bool ReadMem, bool WriteMem) {
4052   if (Align == 0)  // Ensure that codegen never sees alignment 0
4053     Align = getEVTAlignment(MemVT);
4054 
4055   MachineFunction &MF = getMachineFunction();
4056   unsigned Flags = 0;
4057   if (WriteMem)
4058     Flags |= MachineMemOperand::MOStore;
4059   if (ReadMem)
4060     Flags |= MachineMemOperand::MOLoad;
4061   if (Vol)
4062     Flags |= MachineMemOperand::MOVolatile;
4063   MachineMemOperand *MMO =
4064     MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4065 
4066   return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4067 }
4068 
4069 SDValue
getMemIntrinsicNode(unsigned Opcode,DebugLoc dl,SDVTList VTList,const SDValue * Ops,unsigned NumOps,EVT MemVT,MachineMemOperand * MMO)4070 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4071                                   const SDValue *Ops, unsigned NumOps,
4072                                   EVT MemVT, MachineMemOperand *MMO) {
4073   assert((Opcode == ISD::INTRINSIC_VOID ||
4074           Opcode == ISD::INTRINSIC_W_CHAIN ||
4075           Opcode == ISD::PREFETCH ||
4076           (Opcode <= INT_MAX &&
4077            (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4078          "Opcode is not a memory-accessing opcode!");
4079 
4080   // Memoize the node unless it returns a flag.
4081   MemIntrinsicSDNode *N;
4082   if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4083     FoldingSetNodeID ID;
4084     AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4085     void *IP = 0;
4086     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4087       cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4088       return SDValue(E, 0);
4089     }
4090 
4091     N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4092                                                MemVT, MMO);
4093     CSEMap.InsertNode(N, IP);
4094   } else {
4095     N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4096                                                MemVT, MMO);
4097   }
4098   AllNodes.push_back(N);
4099   return SDValue(N, 0);
4100 }
4101 
4102 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4103 /// MachinePointerInfo record from it.  This is particularly useful because the
4104 /// code generator has many cases where it doesn't bother passing in a
4105 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
InferPointerInfo(SDValue Ptr,int64_t Offset=0)4106 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4107   // If this is FI+Offset, we can model it.
4108   if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4109     return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4110 
4111   // If this is (FI+Offset1)+Offset2, we can model it.
4112   if (Ptr.getOpcode() != ISD::ADD ||
4113       !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4114       !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4115     return MachinePointerInfo();
4116 
4117   int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4118   return MachinePointerInfo::getFixedStack(FI, Offset+
4119                        cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4120 }
4121 
4122 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4123 /// MachinePointerInfo record from it.  This is particularly useful because the
4124 /// code generator has many cases where it doesn't bother passing in a
4125 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
InferPointerInfo(SDValue Ptr,SDValue OffsetOp)4126 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4127   // If the 'Offset' value isn't a constant, we can't handle this.
4128   if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4129     return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4130   if (OffsetOp.getOpcode() == ISD::UNDEF)
4131     return InferPointerInfo(Ptr);
4132   return MachinePointerInfo();
4133 }
4134 
4135 
4136 SDValue
getLoad(ISD::MemIndexedMode AM,ISD::LoadExtType ExtType,EVT VT,DebugLoc dl,SDValue Chain,SDValue Ptr,SDValue Offset,MachinePointerInfo PtrInfo,EVT MemVT,bool isVolatile,bool isNonTemporal,unsigned Alignment,const MDNode * TBAAInfo)4137 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4138                       EVT VT, DebugLoc dl, SDValue Chain,
4139                       SDValue Ptr, SDValue Offset,
4140                       MachinePointerInfo PtrInfo, EVT MemVT,
4141                       bool isVolatile, bool isNonTemporal,
4142                       unsigned Alignment, const MDNode *TBAAInfo) {
4143   assert(Chain.getValueType() == MVT::Other &&
4144         "Invalid chain type");
4145   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
4146     Alignment = getEVTAlignment(VT);
4147 
4148   unsigned Flags = MachineMemOperand::MOLoad;
4149   if (isVolatile)
4150     Flags |= MachineMemOperand::MOVolatile;
4151   if (isNonTemporal)
4152     Flags |= MachineMemOperand::MONonTemporal;
4153 
4154   // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4155   // clients.
4156   if (PtrInfo.V == 0)
4157     PtrInfo = InferPointerInfo(Ptr, Offset);
4158 
4159   MachineFunction &MF = getMachineFunction();
4160   MachineMemOperand *MMO =
4161     MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4162                             TBAAInfo);
4163   return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4164 }
4165 
4166 SDValue
getLoad(ISD::MemIndexedMode AM,ISD::LoadExtType ExtType,EVT VT,DebugLoc dl,SDValue Chain,SDValue Ptr,SDValue Offset,EVT MemVT,MachineMemOperand * MMO)4167 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4168                       EVT VT, DebugLoc dl, SDValue Chain,
4169                       SDValue Ptr, SDValue Offset, EVT MemVT,
4170                       MachineMemOperand *MMO) {
4171   if (VT == MemVT) {
4172     ExtType = ISD::NON_EXTLOAD;
4173   } else if (ExtType == ISD::NON_EXTLOAD) {
4174     assert(VT == MemVT && "Non-extending load from different memory type!");
4175   } else {
4176     // Extending load.
4177     assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4178            "Should only be an extending load, not truncating!");
4179     assert(VT.isInteger() == MemVT.isInteger() &&
4180            "Cannot convert from FP to Int or Int -> FP!");
4181     assert(VT.isVector() == MemVT.isVector() &&
4182            "Cannot use trunc store to convert to or from a vector!");
4183     assert((!VT.isVector() ||
4184             VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4185            "Cannot use trunc store to change the number of vector elements!");
4186   }
4187 
4188   bool Indexed = AM != ISD::UNINDEXED;
4189   assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4190          "Unindexed load with an offset!");
4191 
4192   SDVTList VTs = Indexed ?
4193     getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4194   SDValue Ops[] = { Chain, Ptr, Offset };
4195   FoldingSetNodeID ID;
4196   AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4197   ID.AddInteger(MemVT.getRawBits());
4198   ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4199                                      MMO->isNonTemporal()));
4200   void *IP = 0;
4201   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4202     cast<LoadSDNode>(E)->refineAlignment(MMO);
4203     return SDValue(E, 0);
4204   }
4205   SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4206                                              MemVT, MMO);
4207   CSEMap.InsertNode(N, IP);
4208   AllNodes.push_back(N);
4209   return SDValue(N, 0);
4210 }
4211 
getLoad(EVT VT,DebugLoc dl,SDValue Chain,SDValue Ptr,MachinePointerInfo PtrInfo,bool isVolatile,bool isNonTemporal,unsigned Alignment,const MDNode * TBAAInfo)4212 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4213                               SDValue Chain, SDValue Ptr,
4214                               MachinePointerInfo PtrInfo,
4215                               bool isVolatile, bool isNonTemporal,
4216                               unsigned Alignment, const MDNode *TBAAInfo) {
4217   SDValue Undef = getUNDEF(Ptr.getValueType());
4218   return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4219                  PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4220 }
4221 
getExtLoad(ISD::LoadExtType ExtType,DebugLoc dl,EVT VT,SDValue Chain,SDValue Ptr,MachinePointerInfo PtrInfo,EVT MemVT,bool isVolatile,bool isNonTemporal,unsigned Alignment,const MDNode * TBAAInfo)4222 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4223                                  SDValue Chain, SDValue Ptr,
4224                                  MachinePointerInfo PtrInfo, EVT MemVT,
4225                                  bool isVolatile, bool isNonTemporal,
4226                                  unsigned Alignment, const MDNode *TBAAInfo) {
4227   SDValue Undef = getUNDEF(Ptr.getValueType());
4228   return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4229                  PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4230                  TBAAInfo);
4231 }
4232 
4233 
4234 SDValue
getIndexedLoad(SDValue OrigLoad,DebugLoc dl,SDValue Base,SDValue Offset,ISD::MemIndexedMode AM)4235 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4236                              SDValue Offset, ISD::MemIndexedMode AM) {
4237   LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4238   assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4239          "Load is already a indexed load!");
4240   return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4241                  LD->getChain(), Base, Offset, LD->getPointerInfo(),
4242                  LD->getMemoryVT(),
4243                  LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4244 }
4245 
getStore(SDValue Chain,DebugLoc dl,SDValue Val,SDValue Ptr,MachinePointerInfo PtrInfo,bool isVolatile,bool isNonTemporal,unsigned Alignment,const MDNode * TBAAInfo)4246 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4247                                SDValue Ptr, MachinePointerInfo PtrInfo,
4248                                bool isVolatile, bool isNonTemporal,
4249                                unsigned Alignment, const MDNode *TBAAInfo) {
4250   assert(Chain.getValueType() == MVT::Other &&
4251         "Invalid chain type");
4252   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
4253     Alignment = getEVTAlignment(Val.getValueType());
4254 
4255   unsigned Flags = MachineMemOperand::MOStore;
4256   if (isVolatile)
4257     Flags |= MachineMemOperand::MOVolatile;
4258   if (isNonTemporal)
4259     Flags |= MachineMemOperand::MONonTemporal;
4260 
4261   if (PtrInfo.V == 0)
4262     PtrInfo = InferPointerInfo(Ptr);
4263 
4264   MachineFunction &MF = getMachineFunction();
4265   MachineMemOperand *MMO =
4266     MF.getMachineMemOperand(PtrInfo, Flags,
4267                             Val.getValueType().getStoreSize(), Alignment,
4268                             TBAAInfo);
4269 
4270   return getStore(Chain, dl, Val, Ptr, MMO);
4271 }
4272 
getStore(SDValue Chain,DebugLoc dl,SDValue Val,SDValue Ptr,MachineMemOperand * MMO)4273 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4274                                SDValue Ptr, MachineMemOperand *MMO) {
4275   assert(Chain.getValueType() == MVT::Other &&
4276         "Invalid chain type");
4277   EVT VT = Val.getValueType();
4278   SDVTList VTs = getVTList(MVT::Other);
4279   SDValue Undef = getUNDEF(Ptr.getValueType());
4280   SDValue Ops[] = { Chain, Val, Ptr, Undef };
4281   FoldingSetNodeID ID;
4282   AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4283   ID.AddInteger(VT.getRawBits());
4284   ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4285                                      MMO->isNonTemporal()));
4286   void *IP = 0;
4287   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4288     cast<StoreSDNode>(E)->refineAlignment(MMO);
4289     return SDValue(E, 0);
4290   }
4291   SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4292                                               false, VT, MMO);
4293   CSEMap.InsertNode(N, IP);
4294   AllNodes.push_back(N);
4295   return SDValue(N, 0);
4296 }
4297 
getTruncStore(SDValue Chain,DebugLoc dl,SDValue Val,SDValue Ptr,MachinePointerInfo PtrInfo,EVT SVT,bool isVolatile,bool isNonTemporal,unsigned Alignment,const MDNode * TBAAInfo)4298 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4299                                     SDValue Ptr, MachinePointerInfo PtrInfo,
4300                                     EVT SVT,bool isVolatile, bool isNonTemporal,
4301                                     unsigned Alignment,
4302                                     const MDNode *TBAAInfo) {
4303   assert(Chain.getValueType() == MVT::Other &&
4304         "Invalid chain type");
4305   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
4306     Alignment = getEVTAlignment(SVT);
4307 
4308   unsigned Flags = MachineMemOperand::MOStore;
4309   if (isVolatile)
4310     Flags |= MachineMemOperand::MOVolatile;
4311   if (isNonTemporal)
4312     Flags |= MachineMemOperand::MONonTemporal;
4313 
4314   if (PtrInfo.V == 0)
4315     PtrInfo = InferPointerInfo(Ptr);
4316 
4317   MachineFunction &MF = getMachineFunction();
4318   MachineMemOperand *MMO =
4319     MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4320                             TBAAInfo);
4321 
4322   return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4323 }
4324 
getTruncStore(SDValue Chain,DebugLoc dl,SDValue Val,SDValue Ptr,EVT SVT,MachineMemOperand * MMO)4325 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4326                                     SDValue Ptr, EVT SVT,
4327                                     MachineMemOperand *MMO) {
4328   EVT VT = Val.getValueType();
4329 
4330   assert(Chain.getValueType() == MVT::Other &&
4331         "Invalid chain type");
4332   if (VT == SVT)
4333     return getStore(Chain, dl, Val, Ptr, MMO);
4334 
4335   assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4336          "Should only be a truncating store, not extending!");
4337   assert(VT.isInteger() == SVT.isInteger() &&
4338          "Can't do FP-INT conversion!");
4339   assert(VT.isVector() == SVT.isVector() &&
4340          "Cannot use trunc store to convert to or from a vector!");
4341   assert((!VT.isVector() ||
4342           VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4343          "Cannot use trunc store to change the number of vector elements!");
4344 
4345   SDVTList VTs = getVTList(MVT::Other);
4346   SDValue Undef = getUNDEF(Ptr.getValueType());
4347   SDValue Ops[] = { Chain, Val, Ptr, Undef };
4348   FoldingSetNodeID ID;
4349   AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4350   ID.AddInteger(SVT.getRawBits());
4351   ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4352                                      MMO->isNonTemporal()));
4353   void *IP = 0;
4354   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4355     cast<StoreSDNode>(E)->refineAlignment(MMO);
4356     return SDValue(E, 0);
4357   }
4358   SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4359                                               true, SVT, MMO);
4360   CSEMap.InsertNode(N, IP);
4361   AllNodes.push_back(N);
4362   return SDValue(N, 0);
4363 }
4364 
4365 SDValue
getIndexedStore(SDValue OrigStore,DebugLoc dl,SDValue Base,SDValue Offset,ISD::MemIndexedMode AM)4366 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4367                               SDValue Offset, ISD::MemIndexedMode AM) {
4368   StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4369   assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4370          "Store is already a indexed store!");
4371   SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4372   SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4373   FoldingSetNodeID ID;
4374   AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4375   ID.AddInteger(ST->getMemoryVT().getRawBits());
4376   ID.AddInteger(ST->getRawSubclassData());
4377   void *IP = 0;
4378   if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4379     return SDValue(E, 0);
4380 
4381   SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4382                                               ST->isTruncatingStore(),
4383                                               ST->getMemoryVT(),
4384                                               ST->getMemOperand());
4385   CSEMap.InsertNode(N, IP);
4386   AllNodes.push_back(N);
4387   return SDValue(N, 0);
4388 }
4389 
getVAArg(EVT VT,DebugLoc dl,SDValue Chain,SDValue Ptr,SDValue SV,unsigned Align)4390 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4391                                SDValue Chain, SDValue Ptr,
4392                                SDValue SV,
4393                                unsigned Align) {
4394   SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4395   return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4396 }
4397 
getNode(unsigned Opcode,DebugLoc DL,EVT VT,const SDUse * Ops,unsigned NumOps)4398 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4399                               const SDUse *Ops, unsigned NumOps) {
4400   switch (NumOps) {
4401   case 0: return getNode(Opcode, DL, VT);
4402   case 1: return getNode(Opcode, DL, VT, Ops[0]);
4403   case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4404   case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4405   default: break;
4406   }
4407 
4408   // Copy from an SDUse array into an SDValue array for use with
4409   // the regular getNode logic.
4410   SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4411   return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4412 }
4413 
getNode(unsigned Opcode,DebugLoc DL,EVT VT,const SDValue * Ops,unsigned NumOps)4414 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4415                               const SDValue *Ops, unsigned NumOps) {
4416   switch (NumOps) {
4417   case 0: return getNode(Opcode, DL, VT);
4418   case 1: return getNode(Opcode, DL, VT, Ops[0]);
4419   case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4420   case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4421   default: break;
4422   }
4423 
4424   switch (Opcode) {
4425   default: break;
4426   case ISD::SELECT_CC: {
4427     assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4428     assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4429            "LHS and RHS of condition must have same type!");
4430     assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4431            "True and False arms of SelectCC must have same type!");
4432     assert(Ops[2].getValueType() == VT &&
4433            "select_cc node must be of same type as true and false value!");
4434     break;
4435   }
4436   case ISD::BR_CC: {
4437     assert(NumOps == 5 && "BR_CC takes 5 operands!");
4438     assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4439            "LHS/RHS of comparison should match types!");
4440     break;
4441   }
4442   }
4443 
4444   // Memoize nodes.
4445   SDNode *N;
4446   SDVTList VTs = getVTList(VT);
4447 
4448   if (VT != MVT::Glue) {
4449     FoldingSetNodeID ID;
4450     AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4451     void *IP = 0;
4452 
4453     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4454       return SDValue(E, 0);
4455 
4456     N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4457     CSEMap.InsertNode(N, IP);
4458   } else {
4459     N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4460   }
4461 
4462   AllNodes.push_back(N);
4463 #ifndef NDEBUG
4464   VerifySDNode(N);
4465 #endif
4466   return SDValue(N, 0);
4467 }
4468 
getNode(unsigned Opcode,DebugLoc DL,const std::vector<EVT> & ResultTys,const SDValue * Ops,unsigned NumOps)4469 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4470                               const std::vector<EVT> &ResultTys,
4471                               const SDValue *Ops, unsigned NumOps) {
4472   return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4473                  Ops, NumOps);
4474 }
4475 
getNode(unsigned Opcode,DebugLoc DL,const EVT * VTs,unsigned NumVTs,const SDValue * Ops,unsigned NumOps)4476 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4477                               const EVT *VTs, unsigned NumVTs,
4478                               const SDValue *Ops, unsigned NumOps) {
4479   if (NumVTs == 1)
4480     return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4481   return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4482 }
4483 
getNode(unsigned Opcode,DebugLoc DL,SDVTList VTList,const SDValue * Ops,unsigned NumOps)4484 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4485                               const SDValue *Ops, unsigned NumOps) {
4486   if (VTList.NumVTs == 1)
4487     return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4488 
4489 #if 0
4490   switch (Opcode) {
4491   // FIXME: figure out how to safely handle things like
4492   // int foo(int x) { return 1 << (x & 255); }
4493   // int bar() { return foo(256); }
4494   case ISD::SRA_PARTS:
4495   case ISD::SRL_PARTS:
4496   case ISD::SHL_PARTS:
4497     if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4498         cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4499       return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4500     else if (N3.getOpcode() == ISD::AND)
4501       if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4502         // If the and is only masking out bits that cannot effect the shift,
4503         // eliminate the and.
4504         unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4505         if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4506           return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4507       }
4508     break;
4509   }
4510 #endif
4511 
4512   // Memoize the node unless it returns a flag.
4513   SDNode *N;
4514   if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4515     FoldingSetNodeID ID;
4516     AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4517     void *IP = 0;
4518     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4519       return SDValue(E, 0);
4520 
4521     if (NumOps == 1) {
4522       N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4523     } else if (NumOps == 2) {
4524       N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4525     } else if (NumOps == 3) {
4526       N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4527                                             Ops[2]);
4528     } else {
4529       N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4530     }
4531     CSEMap.InsertNode(N, IP);
4532   } else {
4533     if (NumOps == 1) {
4534       N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4535     } else if (NumOps == 2) {
4536       N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4537     } else if (NumOps == 3) {
4538       N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4539                                             Ops[2]);
4540     } else {
4541       N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4542     }
4543   }
4544   AllNodes.push_back(N);
4545 #ifndef NDEBUG
4546   VerifySDNode(N);
4547 #endif
4548   return SDValue(N, 0);
4549 }
4550 
getNode(unsigned Opcode,DebugLoc DL,SDVTList VTList)4551 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4552   return getNode(Opcode, DL, VTList, 0, 0);
4553 }
4554 
getNode(unsigned Opcode,DebugLoc DL,SDVTList VTList,SDValue N1)4555 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4556                               SDValue N1) {
4557   SDValue Ops[] = { N1 };
4558   return getNode(Opcode, DL, VTList, Ops, 1);
4559 }
4560 
getNode(unsigned Opcode,DebugLoc DL,SDVTList VTList,SDValue N1,SDValue N2)4561 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4562                               SDValue N1, SDValue N2) {
4563   SDValue Ops[] = { N1, N2 };
4564   return getNode(Opcode, DL, VTList, Ops, 2);
4565 }
4566 
getNode(unsigned Opcode,DebugLoc DL,SDVTList VTList,SDValue N1,SDValue N2,SDValue N3)4567 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4568                               SDValue N1, SDValue N2, SDValue N3) {
4569   SDValue Ops[] = { N1, N2, N3 };
4570   return getNode(Opcode, DL, VTList, Ops, 3);
4571 }
4572 
getNode(unsigned Opcode,DebugLoc DL,SDVTList VTList,SDValue N1,SDValue N2,SDValue N3,SDValue N4)4573 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4574                               SDValue N1, SDValue N2, SDValue N3,
4575                               SDValue N4) {
4576   SDValue Ops[] = { N1, N2, N3, N4 };
4577   return getNode(Opcode, DL, VTList, Ops, 4);
4578 }
4579 
getNode(unsigned Opcode,DebugLoc DL,SDVTList VTList,SDValue N1,SDValue N2,SDValue N3,SDValue N4,SDValue N5)4580 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4581                               SDValue N1, SDValue N2, SDValue N3,
4582                               SDValue N4, SDValue N5) {
4583   SDValue Ops[] = { N1, N2, N3, N4, N5 };
4584   return getNode(Opcode, DL, VTList, Ops, 5);
4585 }
4586 
getVTList(EVT VT)4587 SDVTList SelectionDAG::getVTList(EVT VT) {
4588   return makeVTList(SDNode::getValueTypeList(VT), 1);
4589 }
4590 
getVTList(EVT VT1,EVT VT2)4591 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4592   for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4593        E = VTList.rend(); I != E; ++I)
4594     if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4595       return *I;
4596 
4597   EVT *Array = Allocator.Allocate<EVT>(2);
4598   Array[0] = VT1;
4599   Array[1] = VT2;
4600   SDVTList Result = makeVTList(Array, 2);
4601   VTList.push_back(Result);
4602   return Result;
4603 }
4604 
getVTList(EVT VT1,EVT VT2,EVT VT3)4605 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4606   for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4607        E = VTList.rend(); I != E; ++I)
4608     if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4609                           I->VTs[2] == VT3)
4610       return *I;
4611 
4612   EVT *Array = Allocator.Allocate<EVT>(3);
4613   Array[0] = VT1;
4614   Array[1] = VT2;
4615   Array[2] = VT3;
4616   SDVTList Result = makeVTList(Array, 3);
4617   VTList.push_back(Result);
4618   return Result;
4619 }
4620 
getVTList(EVT VT1,EVT VT2,EVT VT3,EVT VT4)4621 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4622   for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4623        E = VTList.rend(); I != E; ++I)
4624     if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4625                           I->VTs[2] == VT3 && I->VTs[3] == VT4)
4626       return *I;
4627 
4628   EVT *Array = Allocator.Allocate<EVT>(4);
4629   Array[0] = VT1;
4630   Array[1] = VT2;
4631   Array[2] = VT3;
4632   Array[3] = VT4;
4633   SDVTList Result = makeVTList(Array, 4);
4634   VTList.push_back(Result);
4635   return Result;
4636 }
4637 
getVTList(const EVT * VTs,unsigned NumVTs)4638 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4639   switch (NumVTs) {
4640     case 0: llvm_unreachable("Cannot have nodes without results!");
4641     case 1: return getVTList(VTs[0]);
4642     case 2: return getVTList(VTs[0], VTs[1]);
4643     case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4644     case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4645     default: break;
4646   }
4647 
4648   for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4649        E = VTList.rend(); I != E; ++I) {
4650     if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4651       continue;
4652 
4653     bool NoMatch = false;
4654     for (unsigned i = 2; i != NumVTs; ++i)
4655       if (VTs[i] != I->VTs[i]) {
4656         NoMatch = true;
4657         break;
4658       }
4659     if (!NoMatch)
4660       return *I;
4661   }
4662 
4663   EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4664   std::copy(VTs, VTs+NumVTs, Array);
4665   SDVTList Result = makeVTList(Array, NumVTs);
4666   VTList.push_back(Result);
4667   return Result;
4668 }
4669 
4670 
4671 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4672 /// specified operands.  If the resultant node already exists in the DAG,
4673 /// this does not modify the specified node, instead it returns the node that
4674 /// already exists.  If the resultant node does not exist in the DAG, the
4675 /// input node is returned.  As a degenerate case, if you specify the same
4676 /// input operands as the node already has, the input node is returned.
UpdateNodeOperands(SDNode * N,SDValue Op)4677 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4678   assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4679 
4680   // Check to see if there is no change.
4681   if (Op == N->getOperand(0)) return N;
4682 
4683   // See if the modified node already exists.
4684   void *InsertPos = 0;
4685   if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4686     return Existing;
4687 
4688   // Nope it doesn't.  Remove the node from its current place in the maps.
4689   if (InsertPos)
4690     if (!RemoveNodeFromCSEMaps(N))
4691       InsertPos = 0;
4692 
4693   // Now we update the operands.
4694   N->OperandList[0].set(Op);
4695 
4696   // If this gets put into a CSE map, add it.
4697   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4698   return N;
4699 }
4700 
UpdateNodeOperands(SDNode * N,SDValue Op1,SDValue Op2)4701 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4702   assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4703 
4704   // Check to see if there is no change.
4705   if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4706     return N;   // No operands changed, just return the input node.
4707 
4708   // See if the modified node already exists.
4709   void *InsertPos = 0;
4710   if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4711     return Existing;
4712 
4713   // Nope it doesn't.  Remove the node from its current place in the maps.
4714   if (InsertPos)
4715     if (!RemoveNodeFromCSEMaps(N))
4716       InsertPos = 0;
4717 
4718   // Now we update the operands.
4719   if (N->OperandList[0] != Op1)
4720     N->OperandList[0].set(Op1);
4721   if (N->OperandList[1] != Op2)
4722     N->OperandList[1].set(Op2);
4723 
4724   // If this gets put into a CSE map, add it.
4725   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4726   return N;
4727 }
4728 
4729 SDNode *SelectionDAG::
UpdateNodeOperands(SDNode * N,SDValue Op1,SDValue Op2,SDValue Op3)4730 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4731   SDValue Ops[] = { Op1, Op2, Op3 };
4732   return UpdateNodeOperands(N, Ops, 3);
4733 }
4734 
4735 SDNode *SelectionDAG::
UpdateNodeOperands(SDNode * N,SDValue Op1,SDValue Op2,SDValue Op3,SDValue Op4)4736 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4737                    SDValue Op3, SDValue Op4) {
4738   SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4739   return UpdateNodeOperands(N, Ops, 4);
4740 }
4741 
4742 SDNode *SelectionDAG::
UpdateNodeOperands(SDNode * N,SDValue Op1,SDValue Op2,SDValue Op3,SDValue Op4,SDValue Op5)4743 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4744                    SDValue Op3, SDValue Op4, SDValue Op5) {
4745   SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4746   return UpdateNodeOperands(N, Ops, 5);
4747 }
4748 
4749 SDNode *SelectionDAG::
UpdateNodeOperands(SDNode * N,const SDValue * Ops,unsigned NumOps)4750 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4751   assert(N->getNumOperands() == NumOps &&
4752          "Update with wrong number of operands");
4753 
4754   // Check to see if there is no change.
4755   bool AnyChange = false;
4756   for (unsigned i = 0; i != NumOps; ++i) {
4757     if (Ops[i] != N->getOperand(i)) {
4758       AnyChange = true;
4759       break;
4760     }
4761   }
4762 
4763   // No operands changed, just return the input node.
4764   if (!AnyChange) return N;
4765 
4766   // See if the modified node already exists.
4767   void *InsertPos = 0;
4768   if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4769     return Existing;
4770 
4771   // Nope it doesn't.  Remove the node from its current place in the maps.
4772   if (InsertPos)
4773     if (!RemoveNodeFromCSEMaps(N))
4774       InsertPos = 0;
4775 
4776   // Now we update the operands.
4777   for (unsigned i = 0; i != NumOps; ++i)
4778     if (N->OperandList[i] != Ops[i])
4779       N->OperandList[i].set(Ops[i]);
4780 
4781   // If this gets put into a CSE map, add it.
4782   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4783   return N;
4784 }
4785 
4786 /// DropOperands - Release the operands and set this node to have
4787 /// zero operands.
DropOperands()4788 void SDNode::DropOperands() {
4789   // Unlike the code in MorphNodeTo that does this, we don't need to
4790   // watch for dead nodes here.
4791   for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4792     SDUse &Use = *I++;
4793     Use.set(SDValue());
4794   }
4795 }
4796 
4797 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4798 /// machine opcode.
4799 ///
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT)4800 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4801                                    EVT VT) {
4802   SDVTList VTs = getVTList(VT);
4803   return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4804 }
4805 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT,SDValue Op1)4806 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4807                                    EVT VT, SDValue Op1) {
4808   SDVTList VTs = getVTList(VT);
4809   SDValue Ops[] = { Op1 };
4810   return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4811 }
4812 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT,SDValue Op1,SDValue Op2)4813 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4814                                    EVT VT, SDValue Op1,
4815                                    SDValue Op2) {
4816   SDVTList VTs = getVTList(VT);
4817   SDValue Ops[] = { Op1, Op2 };
4818   return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4819 }
4820 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT,SDValue Op1,SDValue Op2,SDValue Op3)4821 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4822                                    EVT VT, SDValue Op1,
4823                                    SDValue Op2, SDValue Op3) {
4824   SDVTList VTs = getVTList(VT);
4825   SDValue Ops[] = { Op1, Op2, Op3 };
4826   return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4827 }
4828 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT,const SDValue * Ops,unsigned NumOps)4829 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4830                                    EVT VT, const SDValue *Ops,
4831                                    unsigned NumOps) {
4832   SDVTList VTs = getVTList(VT);
4833   return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4834 }
4835 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2,const SDValue * Ops,unsigned NumOps)4836 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4837                                    EVT VT1, EVT VT2, const SDValue *Ops,
4838                                    unsigned NumOps) {
4839   SDVTList VTs = getVTList(VT1, VT2);
4840   return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4841 }
4842 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2)4843 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4844                                    EVT VT1, EVT VT2) {
4845   SDVTList VTs = getVTList(VT1, VT2);
4846   return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4847 }
4848 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2,EVT VT3,const SDValue * Ops,unsigned NumOps)4849 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4850                                    EVT VT1, EVT VT2, EVT VT3,
4851                                    const SDValue *Ops, unsigned NumOps) {
4852   SDVTList VTs = getVTList(VT1, VT2, VT3);
4853   return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4854 }
4855 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2,EVT VT3,EVT VT4,const SDValue * Ops,unsigned NumOps)4856 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4857                                    EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4858                                    const SDValue *Ops, unsigned NumOps) {
4859   SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4860   return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4861 }
4862 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2,SDValue Op1)4863 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4864                                    EVT VT1, EVT VT2,
4865                                    SDValue Op1) {
4866   SDVTList VTs = getVTList(VT1, VT2);
4867   SDValue Ops[] = { Op1 };
4868   return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4869 }
4870 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2,SDValue Op1,SDValue Op2)4871 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4872                                    EVT VT1, EVT VT2,
4873                                    SDValue Op1, SDValue Op2) {
4874   SDVTList VTs = getVTList(VT1, VT2);
4875   SDValue Ops[] = { Op1, Op2 };
4876   return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4877 }
4878 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2,SDValue Op1,SDValue Op2,SDValue Op3)4879 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4880                                    EVT VT1, EVT VT2,
4881                                    SDValue Op1, SDValue Op2,
4882                                    SDValue Op3) {
4883   SDVTList VTs = getVTList(VT1, VT2);
4884   SDValue Ops[] = { Op1, Op2, Op3 };
4885   return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4886 }
4887 
SelectNodeTo(SDNode * N,unsigned MachineOpc,EVT VT1,EVT VT2,EVT VT3,SDValue Op1,SDValue Op2,SDValue Op3)4888 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4889                                    EVT VT1, EVT VT2, EVT VT3,
4890                                    SDValue Op1, SDValue Op2,
4891                                    SDValue Op3) {
4892   SDVTList VTs = getVTList(VT1, VT2, VT3);
4893   SDValue Ops[] = { Op1, Op2, Op3 };
4894   return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4895 }
4896 
SelectNodeTo(SDNode * N,unsigned MachineOpc,SDVTList VTs,const SDValue * Ops,unsigned NumOps)4897 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4898                                    SDVTList VTs, const SDValue *Ops,
4899                                    unsigned NumOps) {
4900   N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4901   // Reset the NodeID to -1.
4902   N->setNodeId(-1);
4903   return N;
4904 }
4905 
4906 /// MorphNodeTo - This *mutates* the specified node to have the specified
4907 /// return type, opcode, and operands.
4908 ///
4909 /// Note that MorphNodeTo returns the resultant node.  If there is already a
4910 /// node of the specified opcode and operands, it returns that node instead of
4911 /// the current one.  Note that the DebugLoc need not be the same.
4912 ///
4913 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4914 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4915 /// node, and because it doesn't require CSE recalculation for any of
4916 /// the node's users.
4917 ///
MorphNodeTo(SDNode * N,unsigned Opc,SDVTList VTs,const SDValue * Ops,unsigned NumOps)4918 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4919                                   SDVTList VTs, const SDValue *Ops,
4920                                   unsigned NumOps) {
4921   // If an identical node already exists, use it.
4922   void *IP = 0;
4923   if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4924     FoldingSetNodeID ID;
4925     AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4926     if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4927       return ON;
4928   }
4929 
4930   if (!RemoveNodeFromCSEMaps(N))
4931     IP = 0;
4932 
4933   // Start the morphing.
4934   N->NodeType = Opc;
4935   N->ValueList = VTs.VTs;
4936   N->NumValues = VTs.NumVTs;
4937 
4938   // Clear the operands list, updating used nodes to remove this from their
4939   // use list.  Keep track of any operands that become dead as a result.
4940   SmallPtrSet<SDNode*, 16> DeadNodeSet;
4941   for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4942     SDUse &Use = *I++;
4943     SDNode *Used = Use.getNode();
4944     Use.set(SDValue());
4945     if (Used->use_empty())
4946       DeadNodeSet.insert(Used);
4947   }
4948 
4949   if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4950     // Initialize the memory references information.
4951     MN->setMemRefs(0, 0);
4952     // If NumOps is larger than the # of operands we can have in a
4953     // MachineSDNode, reallocate the operand list.
4954     if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4955       if (MN->OperandsNeedDelete)
4956         delete[] MN->OperandList;
4957       if (NumOps > array_lengthof(MN->LocalOperands))
4958         // We're creating a final node that will live unmorphed for the
4959         // remainder of the current SelectionDAG iteration, so we can allocate
4960         // the operands directly out of a pool with no recycling metadata.
4961         MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4962                          Ops, NumOps);
4963       else
4964         MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4965       MN->OperandsNeedDelete = false;
4966     } else
4967       MN->InitOperands(MN->OperandList, Ops, NumOps);
4968   } else {
4969     // If NumOps is larger than the # of operands we currently have, reallocate
4970     // the operand list.
4971     if (NumOps > N->NumOperands) {
4972       if (N->OperandsNeedDelete)
4973         delete[] N->OperandList;
4974       N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4975       N->OperandsNeedDelete = true;
4976     } else
4977       N->InitOperands(N->OperandList, Ops, NumOps);
4978   }
4979 
4980   // Delete any nodes that are still dead after adding the uses for the
4981   // new operands.
4982   if (!DeadNodeSet.empty()) {
4983     SmallVector<SDNode *, 16> DeadNodes;
4984     for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4985          E = DeadNodeSet.end(); I != E; ++I)
4986       if ((*I)->use_empty())
4987         DeadNodes.push_back(*I);
4988     RemoveDeadNodes(DeadNodes);
4989   }
4990 
4991   if (IP)
4992     CSEMap.InsertNode(N, IP);   // Memoize the new node.
4993   return N;
4994 }
4995 
4996 
4997 /// getMachineNode - These are used for target selectors to create a new node
4998 /// with specified return type(s), MachineInstr opcode, and operands.
4999 ///
5000 /// Note that getMachineNode returns the resultant node.  If there is already a
5001 /// node of the specified opcode and operands, it returns that node instead of
5002 /// the current one.
5003 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT)5004 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5005   SDVTList VTs = getVTList(VT);
5006   return getMachineNode(Opcode, dl, VTs, 0, 0);
5007 }
5008 
5009 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT,SDValue Op1)5010 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5011   SDVTList VTs = getVTList(VT);
5012   SDValue Ops[] = { Op1 };
5013   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5014 }
5015 
5016 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT,SDValue Op1,SDValue Op2)5017 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5018                              SDValue Op1, SDValue Op2) {
5019   SDVTList VTs = getVTList(VT);
5020   SDValue Ops[] = { Op1, Op2 };
5021   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5022 }
5023 
5024 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT,SDValue Op1,SDValue Op2,SDValue Op3)5025 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5026                              SDValue Op1, SDValue Op2, SDValue Op3) {
5027   SDVTList VTs = getVTList(VT);
5028   SDValue Ops[] = { Op1, Op2, Op3 };
5029   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5030 }
5031 
5032 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT,const SDValue * Ops,unsigned NumOps)5033 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5034                              const SDValue *Ops, unsigned NumOps) {
5035   SDVTList VTs = getVTList(VT);
5036   return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5037 }
5038 
5039 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2)5040 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5041   SDVTList VTs = getVTList(VT1, VT2);
5042   return getMachineNode(Opcode, dl, VTs, 0, 0);
5043 }
5044 
5045 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,SDValue Op1)5046 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5047                              EVT VT1, EVT VT2, SDValue Op1) {
5048   SDVTList VTs = getVTList(VT1, VT2);
5049   SDValue Ops[] = { Op1 };
5050   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5051 }
5052 
5053 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,SDValue Op1,SDValue Op2)5054 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5055                              EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5056   SDVTList VTs = getVTList(VT1, VT2);
5057   SDValue Ops[] = { Op1, Op2 };
5058   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5059 }
5060 
5061 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,SDValue Op1,SDValue Op2,SDValue Op3)5062 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5063                              EVT VT1, EVT VT2, SDValue Op1,
5064                              SDValue Op2, SDValue Op3) {
5065   SDVTList VTs = getVTList(VT1, VT2);
5066   SDValue Ops[] = { Op1, Op2, Op3 };
5067   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5068 }
5069 
5070 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,const SDValue * Ops,unsigned NumOps)5071 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5072                              EVT VT1, EVT VT2,
5073                              const SDValue *Ops, unsigned NumOps) {
5074   SDVTList VTs = getVTList(VT1, VT2);
5075   return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5076 }
5077 
5078 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,EVT VT3,SDValue Op1,SDValue Op2)5079 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5080                              EVT VT1, EVT VT2, EVT VT3,
5081                              SDValue Op1, SDValue Op2) {
5082   SDVTList VTs = getVTList(VT1, VT2, VT3);
5083   SDValue Ops[] = { Op1, Op2 };
5084   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5085 }
5086 
5087 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,EVT VT3,SDValue Op1,SDValue Op2,SDValue Op3)5088 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5089                              EVT VT1, EVT VT2, EVT VT3,
5090                              SDValue Op1, SDValue Op2, SDValue Op3) {
5091   SDVTList VTs = getVTList(VT1, VT2, VT3);
5092   SDValue Ops[] = { Op1, Op2, Op3 };
5093   return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5094 }
5095 
5096 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,EVT VT3,const SDValue * Ops,unsigned NumOps)5097 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5098                              EVT VT1, EVT VT2, EVT VT3,
5099                              const SDValue *Ops, unsigned NumOps) {
5100   SDVTList VTs = getVTList(VT1, VT2, VT3);
5101   return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5102 }
5103 
5104 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,EVT VT1,EVT VT2,EVT VT3,EVT VT4,const SDValue * Ops,unsigned NumOps)5105 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5106                              EVT VT2, EVT VT3, EVT VT4,
5107                              const SDValue *Ops, unsigned NumOps) {
5108   SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5109   return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5110 }
5111 
5112 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc dl,const std::vector<EVT> & ResultTys,const SDValue * Ops,unsigned NumOps)5113 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5114                              const std::vector<EVT> &ResultTys,
5115                              const SDValue *Ops, unsigned NumOps) {
5116   SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5117   return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5118 }
5119 
5120 MachineSDNode *
getMachineNode(unsigned Opcode,DebugLoc DL,SDVTList VTs,const SDValue * Ops,unsigned NumOps)5121 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5122                              const SDValue *Ops, unsigned NumOps) {
5123   bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5124   MachineSDNode *N;
5125   void *IP = 0;
5126 
5127   if (DoCSE) {
5128     FoldingSetNodeID ID;
5129     AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5130     IP = 0;
5131     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5132       return cast<MachineSDNode>(E);
5133   }
5134 
5135   // Allocate a new MachineSDNode.
5136   N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5137 
5138   // Initialize the operands list.
5139   if (NumOps > array_lengthof(N->LocalOperands))
5140     // We're creating a final node that will live unmorphed for the
5141     // remainder of the current SelectionDAG iteration, so we can allocate
5142     // the operands directly out of a pool with no recycling metadata.
5143     N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5144                     Ops, NumOps);
5145   else
5146     N->InitOperands(N->LocalOperands, Ops, NumOps);
5147   N->OperandsNeedDelete = false;
5148 
5149   if (DoCSE)
5150     CSEMap.InsertNode(N, IP);
5151 
5152   AllNodes.push_back(N);
5153 #ifndef NDEBUG
5154   VerifyMachineNode(N);
5155 #endif
5156   return N;
5157 }
5158 
5159 /// getTargetExtractSubreg - A convenience function for creating
5160 /// TargetOpcode::EXTRACT_SUBREG nodes.
5161 SDValue
getTargetExtractSubreg(int SRIdx,DebugLoc DL,EVT VT,SDValue Operand)5162 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5163                                      SDValue Operand) {
5164   SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5165   SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5166                                   VT, Operand, SRIdxVal);
5167   return SDValue(Subreg, 0);
5168 }
5169 
5170 /// getTargetInsertSubreg - A convenience function for creating
5171 /// TargetOpcode::INSERT_SUBREG nodes.
5172 SDValue
getTargetInsertSubreg(int SRIdx,DebugLoc DL,EVT VT,SDValue Operand,SDValue Subreg)5173 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5174                                     SDValue Operand, SDValue Subreg) {
5175   SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5176   SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5177                                   VT, Operand, Subreg, SRIdxVal);
5178   return SDValue(Result, 0);
5179 }
5180 
5181 /// getNodeIfExists - Get the specified node if it's already available, or
5182 /// else return NULL.
getNodeIfExists(unsigned Opcode,SDVTList VTList,const SDValue * Ops,unsigned NumOps)5183 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5184                                       const SDValue *Ops, unsigned NumOps) {
5185   if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5186     FoldingSetNodeID ID;
5187     AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5188     void *IP = 0;
5189     if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5190       return E;
5191   }
5192   return NULL;
5193 }
5194 
5195 /// getDbgValue - Creates a SDDbgValue node.
5196 ///
5197 SDDbgValue *
getDbgValue(MDNode * MDPtr,SDNode * N,unsigned R,uint64_t Off,DebugLoc DL,unsigned O)5198 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5199                           DebugLoc DL, unsigned O) {
5200   return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5201 }
5202 
5203 SDDbgValue *
getDbgValue(MDNode * MDPtr,const Value * C,uint64_t Off,DebugLoc DL,unsigned O)5204 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5205                           DebugLoc DL, unsigned O) {
5206   return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5207 }
5208 
5209 SDDbgValue *
getDbgValue(MDNode * MDPtr,unsigned FI,uint64_t Off,DebugLoc DL,unsigned O)5210 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5211                           DebugLoc DL, unsigned O) {
5212   return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5213 }
5214 
5215 namespace {
5216 
5217 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5218 /// pointed to by a use iterator is deleted, increment the use iterator
5219 /// so that it doesn't dangle.
5220 ///
5221 /// This class also manages a "downlink" DAGUpdateListener, to forward
5222 /// messages to ReplaceAllUsesWith's callers.
5223 ///
5224 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5225   SelectionDAG::DAGUpdateListener *DownLink;
5226   SDNode::use_iterator &UI;
5227   SDNode::use_iterator &UE;
5228 
NodeDeleted(SDNode * N,SDNode * E)5229   virtual void NodeDeleted(SDNode *N, SDNode *E) {
5230     // Increment the iterator as needed.
5231     while (UI != UE && N == *UI)
5232       ++UI;
5233 
5234     // Then forward the message.
5235     if (DownLink) DownLink->NodeDeleted(N, E);
5236   }
5237 
NodeUpdated(SDNode * N)5238   virtual void NodeUpdated(SDNode *N) {
5239     // Just forward the message.
5240     if (DownLink) DownLink->NodeUpdated(N);
5241   }
5242 
5243 public:
RAUWUpdateListener(SelectionDAG::DAGUpdateListener * dl,SDNode::use_iterator & ui,SDNode::use_iterator & ue)5244   RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5245                      SDNode::use_iterator &ui,
5246                      SDNode::use_iterator &ue)
5247     : DownLink(dl), UI(ui), UE(ue) {}
5248 };
5249 
5250 }
5251 
5252 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5253 /// This can cause recursive merging of nodes in the DAG.
5254 ///
5255 /// This version assumes From has a single result value.
5256 ///
ReplaceAllUsesWith(SDValue FromN,SDValue To,DAGUpdateListener * UpdateListener)5257 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5258                                       DAGUpdateListener *UpdateListener) {
5259   SDNode *From = FromN.getNode();
5260   assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5261          "Cannot replace with this method!");
5262   assert(From != To.getNode() && "Cannot replace uses of with self");
5263 
5264   // Iterate over all the existing uses of From. New uses will be added
5265   // to the beginning of the use list, which we avoid visiting.
5266   // This specifically avoids visiting uses of From that arise while the
5267   // replacement is happening, because any such uses would be the result
5268   // of CSE: If an existing node looks like From after one of its operands
5269   // is replaced by To, we don't want to replace of all its users with To
5270   // too. See PR3018 for more info.
5271   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5272   RAUWUpdateListener Listener(UpdateListener, UI, UE);
5273   while (UI != UE) {
5274     SDNode *User = *UI;
5275 
5276     // This node is about to morph, remove its old self from the CSE maps.
5277     RemoveNodeFromCSEMaps(User);
5278 
5279     // A user can appear in a use list multiple times, and when this
5280     // happens the uses are usually next to each other in the list.
5281     // To help reduce the number of CSE recomputations, process all
5282     // the uses of this user that we can find this way.
5283     do {
5284       SDUse &Use = UI.getUse();
5285       ++UI;
5286       Use.set(To);
5287     } while (UI != UE && *UI == User);
5288 
5289     // Now that we have modified User, add it back to the CSE maps.  If it
5290     // already exists there, recursively merge the results together.
5291     AddModifiedNodeToCSEMaps(User, &Listener);
5292   }
5293 }
5294 
5295 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5296 /// This can cause recursive merging of nodes in the DAG.
5297 ///
5298 /// This version assumes that for each value of From, there is a
5299 /// corresponding value in To in the same position with the same type.
5300 ///
ReplaceAllUsesWith(SDNode * From,SDNode * To,DAGUpdateListener * UpdateListener)5301 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5302                                       DAGUpdateListener *UpdateListener) {
5303 #ifndef NDEBUG
5304   for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5305     assert((!From->hasAnyUseOfValue(i) ||
5306             From->getValueType(i) == To->getValueType(i)) &&
5307            "Cannot use this version of ReplaceAllUsesWith!");
5308 #endif
5309 
5310   // Handle the trivial case.
5311   if (From == To)
5312     return;
5313 
5314   // Iterate over just the existing users of From. See the comments in
5315   // the ReplaceAllUsesWith above.
5316   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5317   RAUWUpdateListener Listener(UpdateListener, UI, UE);
5318   while (UI != UE) {
5319     SDNode *User = *UI;
5320 
5321     // This node is about to morph, remove its old self from the CSE maps.
5322     RemoveNodeFromCSEMaps(User);
5323 
5324     // A user can appear in a use list multiple times, and when this
5325     // happens the uses are usually next to each other in the list.
5326     // To help reduce the number of CSE recomputations, process all
5327     // the uses of this user that we can find this way.
5328     do {
5329       SDUse &Use = UI.getUse();
5330       ++UI;
5331       Use.setNode(To);
5332     } while (UI != UE && *UI == User);
5333 
5334     // Now that we have modified User, add it back to the CSE maps.  If it
5335     // already exists there, recursively merge the results together.
5336     AddModifiedNodeToCSEMaps(User, &Listener);
5337   }
5338 }
5339 
5340 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5341 /// This can cause recursive merging of nodes in the DAG.
5342 ///
5343 /// This version can replace From with any result values.  To must match the
5344 /// number and types of values returned by From.
ReplaceAllUsesWith(SDNode * From,const SDValue * To,DAGUpdateListener * UpdateListener)5345 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5346                                       const SDValue *To,
5347                                       DAGUpdateListener *UpdateListener) {
5348   if (From->getNumValues() == 1)  // Handle the simple case efficiently.
5349     return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5350 
5351   // Iterate over just the existing users of From. See the comments in
5352   // the ReplaceAllUsesWith above.
5353   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5354   RAUWUpdateListener Listener(UpdateListener, UI, UE);
5355   while (UI != UE) {
5356     SDNode *User = *UI;
5357 
5358     // This node is about to morph, remove its old self from the CSE maps.
5359     RemoveNodeFromCSEMaps(User);
5360 
5361     // A user can appear in a use list multiple times, and when this
5362     // happens the uses are usually next to each other in the list.
5363     // To help reduce the number of CSE recomputations, process all
5364     // the uses of this user that we can find this way.
5365     do {
5366       SDUse &Use = UI.getUse();
5367       const SDValue &ToOp = To[Use.getResNo()];
5368       ++UI;
5369       Use.set(ToOp);
5370     } while (UI != UE && *UI == User);
5371 
5372     // Now that we have modified User, add it back to the CSE maps.  If it
5373     // already exists there, recursively merge the results together.
5374     AddModifiedNodeToCSEMaps(User, &Listener);
5375   }
5376 }
5377 
5378 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5379 /// uses of other values produced by From.getNode() alone.  The Deleted
5380 /// vector is handled the same way as for ReplaceAllUsesWith.
ReplaceAllUsesOfValueWith(SDValue From,SDValue To,DAGUpdateListener * UpdateListener)5381 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5382                                              DAGUpdateListener *UpdateListener){
5383   // Handle the really simple, really trivial case efficiently.
5384   if (From == To) return;
5385 
5386   // Handle the simple, trivial, case efficiently.
5387   if (From.getNode()->getNumValues() == 1) {
5388     ReplaceAllUsesWith(From, To, UpdateListener);
5389     return;
5390   }
5391 
5392   // Iterate over just the existing users of From. See the comments in
5393   // the ReplaceAllUsesWith above.
5394   SDNode::use_iterator UI = From.getNode()->use_begin(),
5395                        UE = From.getNode()->use_end();
5396   RAUWUpdateListener Listener(UpdateListener, UI, UE);
5397   while (UI != UE) {
5398     SDNode *User = *UI;
5399     bool UserRemovedFromCSEMaps = false;
5400 
5401     // A user can appear in a use list multiple times, and when this
5402     // happens the uses are usually next to each other in the list.
5403     // To help reduce the number of CSE recomputations, process all
5404     // the uses of this user that we can find this way.
5405     do {
5406       SDUse &Use = UI.getUse();
5407 
5408       // Skip uses of different values from the same node.
5409       if (Use.getResNo() != From.getResNo()) {
5410         ++UI;
5411         continue;
5412       }
5413 
5414       // If this node hasn't been modified yet, it's still in the CSE maps,
5415       // so remove its old self from the CSE maps.
5416       if (!UserRemovedFromCSEMaps) {
5417         RemoveNodeFromCSEMaps(User);
5418         UserRemovedFromCSEMaps = true;
5419       }
5420 
5421       ++UI;
5422       Use.set(To);
5423     } while (UI != UE && *UI == User);
5424 
5425     // We are iterating over all uses of the From node, so if a use
5426     // doesn't use the specific value, no changes are made.
5427     if (!UserRemovedFromCSEMaps)
5428       continue;
5429 
5430     // Now that we have modified User, add it back to the CSE maps.  If it
5431     // already exists there, recursively merge the results together.
5432     AddModifiedNodeToCSEMaps(User, &Listener);
5433   }
5434 }
5435 
5436 namespace {
5437   /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5438   /// to record information about a use.
5439   struct UseMemo {
5440     SDNode *User;
5441     unsigned Index;
5442     SDUse *Use;
5443   };
5444 
5445   /// operator< - Sort Memos by User.
operator <(const UseMemo & L,const UseMemo & R)5446   bool operator<(const UseMemo &L, const UseMemo &R) {
5447     return (intptr_t)L.User < (intptr_t)R.User;
5448   }
5449 }
5450 
5451 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5452 /// uses of other values produced by From.getNode() alone.  The same value
5453 /// may appear in both the From and To list.  The Deleted vector is
5454 /// handled the same way as for ReplaceAllUsesWith.
ReplaceAllUsesOfValuesWith(const SDValue * From,const SDValue * To,unsigned Num,DAGUpdateListener * UpdateListener)5455 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5456                                               const SDValue *To,
5457                                               unsigned Num,
5458                                               DAGUpdateListener *UpdateListener){
5459   // Handle the simple, trivial case efficiently.
5460   if (Num == 1)
5461     return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5462 
5463   // Read up all the uses and make records of them. This helps
5464   // processing new uses that are introduced during the
5465   // replacement process.
5466   SmallVector<UseMemo, 4> Uses;
5467   for (unsigned i = 0; i != Num; ++i) {
5468     unsigned FromResNo = From[i].getResNo();
5469     SDNode *FromNode = From[i].getNode();
5470     for (SDNode::use_iterator UI = FromNode->use_begin(),
5471          E = FromNode->use_end(); UI != E; ++UI) {
5472       SDUse &Use = UI.getUse();
5473       if (Use.getResNo() == FromResNo) {
5474         UseMemo Memo = { *UI, i, &Use };
5475         Uses.push_back(Memo);
5476       }
5477     }
5478   }
5479 
5480   // Sort the uses, so that all the uses from a given User are together.
5481   std::sort(Uses.begin(), Uses.end());
5482 
5483   for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5484        UseIndex != UseIndexEnd; ) {
5485     // We know that this user uses some value of From.  If it is the right
5486     // value, update it.
5487     SDNode *User = Uses[UseIndex].User;
5488 
5489     // This node is about to morph, remove its old self from the CSE maps.
5490     RemoveNodeFromCSEMaps(User);
5491 
5492     // The Uses array is sorted, so all the uses for a given User
5493     // are next to each other in the list.
5494     // To help reduce the number of CSE recomputations, process all
5495     // the uses of this user that we can find this way.
5496     do {
5497       unsigned i = Uses[UseIndex].Index;
5498       SDUse &Use = *Uses[UseIndex].Use;
5499       ++UseIndex;
5500 
5501       Use.set(To[i]);
5502     } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5503 
5504     // Now that we have modified User, add it back to the CSE maps.  If it
5505     // already exists there, recursively merge the results together.
5506     AddModifiedNodeToCSEMaps(User, UpdateListener);
5507   }
5508 }
5509 
5510 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5511 /// based on their topological order. It returns the maximum id and a vector
5512 /// of the SDNodes* in assigned order by reference.
AssignTopologicalOrder()5513 unsigned SelectionDAG::AssignTopologicalOrder() {
5514 
5515   unsigned DAGSize = 0;
5516 
5517   // SortedPos tracks the progress of the algorithm. Nodes before it are
5518   // sorted, nodes after it are unsorted. When the algorithm completes
5519   // it is at the end of the list.
5520   allnodes_iterator SortedPos = allnodes_begin();
5521 
5522   // Visit all the nodes. Move nodes with no operands to the front of
5523   // the list immediately. Annotate nodes that do have operands with their
5524   // operand count. Before we do this, the Node Id fields of the nodes
5525   // may contain arbitrary values. After, the Node Id fields for nodes
5526   // before SortedPos will contain the topological sort index, and the
5527   // Node Id fields for nodes At SortedPos and after will contain the
5528   // count of outstanding operands.
5529   for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5530     SDNode *N = I++;
5531     checkForCycles(N);
5532     unsigned Degree = N->getNumOperands();
5533     if (Degree == 0) {
5534       // A node with no uses, add it to the result array immediately.
5535       N->setNodeId(DAGSize++);
5536       allnodes_iterator Q = N;
5537       if (Q != SortedPos)
5538         SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5539       assert(SortedPos != AllNodes.end() && "Overran node list");
5540       ++SortedPos;
5541     } else {
5542       // Temporarily use the Node Id as scratch space for the degree count.
5543       N->setNodeId(Degree);
5544     }
5545   }
5546 
5547   // Visit all the nodes. As we iterate, moves nodes into sorted order,
5548   // such that by the time the end is reached all nodes will be sorted.
5549   for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5550     SDNode *N = I;
5551     checkForCycles(N);
5552     // N is in sorted position, so all its uses have one less operand
5553     // that needs to be sorted.
5554     for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5555          UI != UE; ++UI) {
5556       SDNode *P = *UI;
5557       unsigned Degree = P->getNodeId();
5558       assert(Degree != 0 && "Invalid node degree");
5559       --Degree;
5560       if (Degree == 0) {
5561         // All of P's operands are sorted, so P may sorted now.
5562         P->setNodeId(DAGSize++);
5563         if (P != SortedPos)
5564           SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5565         assert(SortedPos != AllNodes.end() && "Overran node list");
5566         ++SortedPos;
5567       } else {
5568         // Update P's outstanding operand count.
5569         P->setNodeId(Degree);
5570       }
5571     }
5572     if (I == SortedPos) {
5573 #ifndef NDEBUG
5574       SDNode *S = ++I;
5575       dbgs() << "Overran sorted position:\n";
5576       S->dumprFull();
5577 #endif
5578       llvm_unreachable(0);
5579     }
5580   }
5581 
5582   assert(SortedPos == AllNodes.end() &&
5583          "Topological sort incomplete!");
5584   assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5585          "First node in topological sort is not the entry token!");
5586   assert(AllNodes.front().getNodeId() == 0 &&
5587          "First node in topological sort has non-zero id!");
5588   assert(AllNodes.front().getNumOperands() == 0 &&
5589          "First node in topological sort has operands!");
5590   assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5591          "Last node in topologic sort has unexpected id!");
5592   assert(AllNodes.back().use_empty() &&
5593          "Last node in topologic sort has users!");
5594   assert(DAGSize == allnodes_size() && "Node count mismatch!");
5595   return DAGSize;
5596 }
5597 
5598 /// AssignOrdering - Assign an order to the SDNode.
AssignOrdering(const SDNode * SD,unsigned Order)5599 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5600   assert(SD && "Trying to assign an order to a null node!");
5601   Ordering->add(SD, Order);
5602 }
5603 
5604 /// GetOrdering - Get the order for the SDNode.
GetOrdering(const SDNode * SD) const5605 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5606   assert(SD && "Trying to get the order of a null node!");
5607   return Ordering->getOrder(SD);
5608 }
5609 
5610 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5611 /// value is produced by SD.
AddDbgValue(SDDbgValue * DB,SDNode * SD,bool isParameter)5612 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5613   DbgInfo->add(DB, SD, isParameter);
5614   if (SD)
5615     SD->setHasDebugValue(true);
5616 }
5617 
5618 /// TransferDbgValues - Transfer SDDbgValues.
TransferDbgValues(SDValue From,SDValue To)5619 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5620   if (From == To || !From.getNode()->getHasDebugValue())
5621     return;
5622   SDNode *FromNode = From.getNode();
5623   SDNode *ToNode = To.getNode();
5624   ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5625   SmallVector<SDDbgValue *, 2> ClonedDVs;
5626   for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5627        I != E; ++I) {
5628     SDDbgValue *Dbg = *I;
5629     if (Dbg->getKind() == SDDbgValue::SDNODE) {
5630       SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5631                                       Dbg->getOffset(), Dbg->getDebugLoc(),
5632                                       Dbg->getOrder());
5633       ClonedDVs.push_back(Clone);
5634     }
5635   }
5636   for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5637          E = ClonedDVs.end(); I != E; ++I)
5638     AddDbgValue(*I, ToNode, false);
5639 }
5640 
5641 //===----------------------------------------------------------------------===//
5642 //                              SDNode Class
5643 //===----------------------------------------------------------------------===//
5644 
~HandleSDNode()5645 HandleSDNode::~HandleSDNode() {
5646   DropOperands();
5647 }
5648 
GlobalAddressSDNode(unsigned Opc,DebugLoc DL,const GlobalValue * GA,EVT VT,int64_t o,unsigned char TF)5649 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5650                                          const GlobalValue *GA,
5651                                          EVT VT, int64_t o, unsigned char TF)
5652   : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5653   TheGlobal = GA;
5654 }
5655 
MemSDNode(unsigned Opc,DebugLoc dl,SDVTList VTs,EVT memvt,MachineMemOperand * mmo)5656 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5657                      MachineMemOperand *mmo)
5658  : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5659   SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5660                                       MMO->isNonTemporal());
5661   assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5662   assert(isNonTemporal() == MMO->isNonTemporal() &&
5663          "Non-temporal encoding error!");
5664   assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5665 }
5666 
MemSDNode(unsigned Opc,DebugLoc dl,SDVTList VTs,const SDValue * Ops,unsigned NumOps,EVT memvt,MachineMemOperand * mmo)5667 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5668                      const SDValue *Ops, unsigned NumOps, EVT memvt,
5669                      MachineMemOperand *mmo)
5670    : SDNode(Opc, dl, VTs, Ops, NumOps),
5671      MemoryVT(memvt), MMO(mmo) {
5672   SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5673                                       MMO->isNonTemporal());
5674   assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5675   assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5676 }
5677 
5678 /// Profile - Gather unique data for the node.
5679 ///
Profile(FoldingSetNodeID & ID) const5680 void SDNode::Profile(FoldingSetNodeID &ID) const {
5681   AddNodeIDNode(ID, this);
5682 }
5683 
5684 namespace {
5685   struct EVTArray {
5686     std::vector<EVT> VTs;
5687 
EVTArray__anon80837fde0311::EVTArray5688     EVTArray() {
5689       VTs.reserve(MVT::LAST_VALUETYPE);
5690       for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5691         VTs.push_back(MVT((MVT::SimpleValueType)i));
5692     }
5693   };
5694 }
5695 
5696 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5697 static ManagedStatic<EVTArray> SimpleVTArray;
5698 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5699 
5700 /// getValueTypeList - Return a pointer to the specified value type.
5701 ///
getValueTypeList(EVT VT)5702 const EVT *SDNode::getValueTypeList(EVT VT) {
5703   if (VT.isExtended()) {
5704     sys::SmartScopedLock<true> Lock(*VTMutex);
5705     return &(*EVTs->insert(VT).first);
5706   } else {
5707     assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5708            "Value type out of range!");
5709     return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5710   }
5711 }
5712 
5713 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5714 /// indicated value.  This method ignores uses of other values defined by this
5715 /// operation.
hasNUsesOfValue(unsigned NUses,unsigned Value) const5716 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5717   assert(Value < getNumValues() && "Bad value!");
5718 
5719   // TODO: Only iterate over uses of a given value of the node
5720   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5721     if (UI.getUse().getResNo() == Value) {
5722       if (NUses == 0)
5723         return false;
5724       --NUses;
5725     }
5726   }
5727 
5728   // Found exactly the right number of uses?
5729   return NUses == 0;
5730 }
5731 
5732 
5733 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5734 /// value. This method ignores uses of other values defined by this operation.
hasAnyUseOfValue(unsigned Value) const5735 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5736   assert(Value < getNumValues() && "Bad value!");
5737 
5738   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5739     if (UI.getUse().getResNo() == Value)
5740       return true;
5741 
5742   return false;
5743 }
5744 
5745 
5746 /// isOnlyUserOf - Return true if this node is the only use of N.
5747 ///
isOnlyUserOf(SDNode * N) const5748 bool SDNode::isOnlyUserOf(SDNode *N) const {
5749   bool Seen = false;
5750   for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5751     SDNode *User = *I;
5752     if (User == this)
5753       Seen = true;
5754     else
5755       return false;
5756   }
5757 
5758   return Seen;
5759 }
5760 
5761 /// isOperand - Return true if this node is an operand of N.
5762 ///
isOperandOf(SDNode * N) const5763 bool SDValue::isOperandOf(SDNode *N) const {
5764   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5765     if (*this == N->getOperand(i))
5766       return true;
5767   return false;
5768 }
5769 
isOperandOf(SDNode * N) const5770 bool SDNode::isOperandOf(SDNode *N) const {
5771   for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5772     if (this == N->OperandList[i].getNode())
5773       return true;
5774   return false;
5775 }
5776 
5777 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5778 /// be a chain) reaches the specified operand without crossing any
5779 /// side-effecting instructions on any chain path.  In practice, this looks
5780 /// through token factors and non-volatile loads.  In order to remain efficient,
5781 /// this only looks a couple of nodes in, it does not do an exhaustive search.
reachesChainWithoutSideEffects(SDValue Dest,unsigned Depth) const5782 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5783                                                unsigned Depth) const {
5784   if (*this == Dest) return true;
5785 
5786   // Don't search too deeply, we just want to be able to see through
5787   // TokenFactor's etc.
5788   if (Depth == 0) return false;
5789 
5790   // If this is a token factor, all inputs to the TF happen in parallel.  If any
5791   // of the operands of the TF does not reach dest, then we cannot do the xform.
5792   if (getOpcode() == ISD::TokenFactor) {
5793     for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5794       if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5795         return false;
5796     return true;
5797   }
5798 
5799   // Loads don't have side effects, look through them.
5800   if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5801     if (!Ld->isVolatile())
5802       return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5803   }
5804   return false;
5805 }
5806 
5807 /// hasPredecessor - Return true if N is a predecessor of this node.
5808 /// N is either an operand of this node, or can be reached by recursively
5809 /// traversing up the operands.
5810 /// NOTE: This is an expensive method. Use it carefully.
hasPredecessor(const SDNode * N) const5811 bool SDNode::hasPredecessor(const SDNode *N) const {
5812   SmallPtrSet<const SDNode *, 32> Visited;
5813   SmallVector<const SDNode *, 16> Worklist;
5814   return hasPredecessorHelper(N, Visited, Worklist);
5815 }
5816 
hasPredecessorHelper(const SDNode * N,SmallPtrSet<const SDNode *,32> & Visited,SmallVector<const SDNode *,16> & Worklist) const5817 bool SDNode::hasPredecessorHelper(const SDNode *N,
5818                                   SmallPtrSet<const SDNode *, 32> &Visited,
5819                                   SmallVector<const SDNode *, 16> &Worklist) const {
5820   if (Visited.empty()) {
5821     Worklist.push_back(this);
5822   } else {
5823     // Take a look in the visited set. If we've already encountered this node
5824     // we needn't search further.
5825     if (Visited.count(N))
5826       return true;
5827   }
5828 
5829   // Haven't visited N yet. Continue the search.
5830   while (!Worklist.empty()) {
5831     const SDNode *M = Worklist.pop_back_val();
5832     for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5833       SDNode *Op = M->getOperand(i).getNode();
5834       if (Visited.insert(Op))
5835         Worklist.push_back(Op);
5836       if (Op == N)
5837         return true;
5838     }
5839   }
5840 
5841   return false;
5842 }
5843 
getConstantOperandVal(unsigned Num) const5844 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5845   assert(Num < NumOperands && "Invalid child # of SDNode!");
5846   return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5847 }
5848 
getOperationName(const SelectionDAG * G) const5849 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5850   switch (getOpcode()) {
5851   default:
5852     if (getOpcode() < ISD::BUILTIN_OP_END)
5853       return "<<Unknown DAG Node>>";
5854     if (isMachineOpcode()) {
5855       if (G)
5856         if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5857           if (getMachineOpcode() < TII->getNumOpcodes())
5858             return TII->get(getMachineOpcode()).getName();
5859       return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5860     }
5861     if (G) {
5862       const TargetLowering &TLI = G->getTargetLoweringInfo();
5863       const char *Name = TLI.getTargetNodeName(getOpcode());
5864       if (Name) return Name;
5865       return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5866     }
5867     return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5868 
5869 #ifndef NDEBUG
5870   case ISD::DELETED_NODE:
5871     return "<<Deleted Node!>>";
5872 #endif
5873   case ISD::PREFETCH:      return "Prefetch";
5874   case ISD::MEMBARRIER:    return "MemBarrier";
5875   case ISD::ATOMIC_FENCE:    return "AtomicFence";
5876   case ISD::ATOMIC_CMP_SWAP:    return "AtomicCmpSwap";
5877   case ISD::ATOMIC_SWAP:        return "AtomicSwap";
5878   case ISD::ATOMIC_LOAD_ADD:    return "AtomicLoadAdd";
5879   case ISD::ATOMIC_LOAD_SUB:    return "AtomicLoadSub";
5880   case ISD::ATOMIC_LOAD_AND:    return "AtomicLoadAnd";
5881   case ISD::ATOMIC_LOAD_OR:     return "AtomicLoadOr";
5882   case ISD::ATOMIC_LOAD_XOR:    return "AtomicLoadXor";
5883   case ISD::ATOMIC_LOAD_NAND:   return "AtomicLoadNand";
5884   case ISD::ATOMIC_LOAD_MIN:    return "AtomicLoadMin";
5885   case ISD::ATOMIC_LOAD_MAX:    return "AtomicLoadMax";
5886   case ISD::ATOMIC_LOAD_UMIN:   return "AtomicLoadUMin";
5887   case ISD::ATOMIC_LOAD_UMAX:   return "AtomicLoadUMax";
5888   case ISD::ATOMIC_LOAD:        return "AtomicLoad";
5889   case ISD::ATOMIC_STORE:       return "AtomicStore";
5890   case ISD::PCMARKER:      return "PCMarker";
5891   case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5892   case ISD::SRCVALUE:      return "SrcValue";
5893   case ISD::MDNODE_SDNODE: return "MDNode";
5894   case ISD::EntryToken:    return "EntryToken";
5895   case ISD::TokenFactor:   return "TokenFactor";
5896   case ISD::AssertSext:    return "AssertSext";
5897   case ISD::AssertZext:    return "AssertZext";
5898 
5899   case ISD::BasicBlock:    return "BasicBlock";
5900   case ISD::VALUETYPE:     return "ValueType";
5901   case ISD::Register:      return "Register";
5902 
5903   case ISD::Constant:      return "Constant";
5904   case ISD::ConstantFP:    return "ConstantFP";
5905   case ISD::GlobalAddress: return "GlobalAddress";
5906   case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5907   case ISD::FrameIndex:    return "FrameIndex";
5908   case ISD::JumpTable:     return "JumpTable";
5909   case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5910   case ISD::RETURNADDR: return "RETURNADDR";
5911   case ISD::FRAMEADDR: return "FRAMEADDR";
5912   case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5913   case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5914   case ISD::LSDAADDR: return "LSDAADDR";
5915   case ISD::EHSELECTION: return "EHSELECTION";
5916   case ISD::EH_RETURN: return "EH_RETURN";
5917   case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5918   case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5919   case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5920   case ISD::ConstantPool:  return "ConstantPool";
5921   case ISD::ExternalSymbol: return "ExternalSymbol";
5922   case ISD::BlockAddress:  return "BlockAddress";
5923   case ISD::INTRINSIC_WO_CHAIN:
5924   case ISD::INTRINSIC_VOID:
5925   case ISD::INTRINSIC_W_CHAIN: {
5926     unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5927     unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5928     if (IID < Intrinsic::num_intrinsics)
5929       return Intrinsic::getName((Intrinsic::ID)IID);
5930     else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5931       return TII->getName(IID);
5932     llvm_unreachable("Invalid intrinsic ID");
5933   }
5934 
5935   case ISD::BUILD_VECTOR:   return "BUILD_VECTOR";
5936   case ISD::TargetConstant: return "TargetConstant";
5937   case ISD::TargetConstantFP:return "TargetConstantFP";
5938   case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5939   case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5940   case ISD::TargetFrameIndex: return "TargetFrameIndex";
5941   case ISD::TargetJumpTable:  return "TargetJumpTable";
5942   case ISD::TargetConstantPool:  return "TargetConstantPool";
5943   case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5944   case ISD::TargetBlockAddress: return "TargetBlockAddress";
5945 
5946   case ISD::CopyToReg:     return "CopyToReg";
5947   case ISD::CopyFromReg:   return "CopyFromReg";
5948   case ISD::UNDEF:         return "undef";
5949   case ISD::MERGE_VALUES:  return "merge_values";
5950   case ISD::INLINEASM:     return "inlineasm";
5951   case ISD::EH_LABEL:      return "eh_label";
5952   case ISD::HANDLENODE:    return "handlenode";
5953 
5954   // Unary operators
5955   case ISD::FABS:   return "fabs";
5956   case ISD::FNEG:   return "fneg";
5957   case ISD::FSQRT:  return "fsqrt";
5958   case ISD::FSIN:   return "fsin";
5959   case ISD::FCOS:   return "fcos";
5960   case ISD::FTRUNC: return "ftrunc";
5961   case ISD::FFLOOR: return "ffloor";
5962   case ISD::FCEIL:  return "fceil";
5963   case ISD::FRINT:  return "frint";
5964   case ISD::FNEARBYINT: return "fnearbyint";
5965   case ISD::FEXP:   return "fexp";
5966   case ISD::FEXP2:  return "fexp2";
5967   case ISD::FLOG:   return "flog";
5968   case ISD::FLOG2:  return "flog2";
5969   case ISD::FLOG10: return "flog10";
5970 
5971   // Binary operators
5972   case ISD::ADD:    return "add";
5973   case ISD::SUB:    return "sub";
5974   case ISD::MUL:    return "mul";
5975   case ISD::MULHU:  return "mulhu";
5976   case ISD::MULHS:  return "mulhs";
5977   case ISD::SDIV:   return "sdiv";
5978   case ISD::UDIV:   return "udiv";
5979   case ISD::SREM:   return "srem";
5980   case ISD::UREM:   return "urem";
5981   case ISD::SMUL_LOHI:  return "smul_lohi";
5982   case ISD::UMUL_LOHI:  return "umul_lohi";
5983   case ISD::SDIVREM:    return "sdivrem";
5984   case ISD::UDIVREM:    return "udivrem";
5985   case ISD::AND:    return "and";
5986   case ISD::OR:     return "or";
5987   case ISD::XOR:    return "xor";
5988   case ISD::SHL:    return "shl";
5989   case ISD::SRA:    return "sra";
5990   case ISD::SRL:    return "srl";
5991   case ISD::ROTL:   return "rotl";
5992   case ISD::ROTR:   return "rotr";
5993   case ISD::FADD:   return "fadd";
5994   case ISD::FSUB:   return "fsub";
5995   case ISD::FMUL:   return "fmul";
5996   case ISD::FDIV:   return "fdiv";
5997   case ISD::FMA:    return "fma";
5998   case ISD::FREM:   return "frem";
5999   case ISD::FCOPYSIGN: return "fcopysign";
6000   case ISD::FGETSIGN:  return "fgetsign";
6001   case ISD::FPOW:   return "fpow";
6002 
6003   case ISD::FPOWI:  return "fpowi";
6004   case ISD::SETCC:       return "setcc";
6005   case ISD::SELECT:      return "select";
6006   case ISD::VSELECT:     return "vselect";
6007   case ISD::SELECT_CC:   return "select_cc";
6008   case ISD::INSERT_VECTOR_ELT:   return "insert_vector_elt";
6009   case ISD::EXTRACT_VECTOR_ELT:  return "extract_vector_elt";
6010   case ISD::CONCAT_VECTORS:      return "concat_vectors";
6011   case ISD::INSERT_SUBVECTOR:    return "insert_subvector";
6012   case ISD::EXTRACT_SUBVECTOR:   return "extract_subvector";
6013   case ISD::SCALAR_TO_VECTOR:    return "scalar_to_vector";
6014   case ISD::VECTOR_SHUFFLE:      return "vector_shuffle";
6015   case ISD::CARRY_FALSE:         return "carry_false";
6016   case ISD::ADDC:        return "addc";
6017   case ISD::ADDE:        return "adde";
6018   case ISD::SADDO:       return "saddo";
6019   case ISD::UADDO:       return "uaddo";
6020   case ISD::SSUBO:       return "ssubo";
6021   case ISD::USUBO:       return "usubo";
6022   case ISD::SMULO:       return "smulo";
6023   case ISD::UMULO:       return "umulo";
6024   case ISD::SUBC:        return "subc";
6025   case ISD::SUBE:        return "sube";
6026   case ISD::SHL_PARTS:   return "shl_parts";
6027   case ISD::SRA_PARTS:   return "sra_parts";
6028   case ISD::SRL_PARTS:   return "srl_parts";
6029 
6030   // Conversion operators.
6031   case ISD::SIGN_EXTEND: return "sign_extend";
6032   case ISD::ZERO_EXTEND: return "zero_extend";
6033   case ISD::ANY_EXTEND:  return "any_extend";
6034   case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
6035   case ISD::TRUNCATE:    return "truncate";
6036   case ISD::FP_ROUND:    return "fp_round";
6037   case ISD::FLT_ROUNDS_: return "flt_rounds";
6038   case ISD::FP_ROUND_INREG: return "fp_round_inreg";
6039   case ISD::FP_EXTEND:   return "fp_extend";
6040 
6041   case ISD::SINT_TO_FP:  return "sint_to_fp";
6042   case ISD::UINT_TO_FP:  return "uint_to_fp";
6043   case ISD::FP_TO_SINT:  return "fp_to_sint";
6044   case ISD::FP_TO_UINT:  return "fp_to_uint";
6045   case ISD::BITCAST:     return "bitcast";
6046   case ISD::FP16_TO_FP32: return "fp16_to_fp32";
6047   case ISD::FP32_TO_FP16: return "fp32_to_fp16";
6048 
6049   case ISD::CONVERT_RNDSAT: {
6050     switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
6051     default: llvm_unreachable("Unknown cvt code!");
6052     case ISD::CVT_FF:  return "cvt_ff";
6053     case ISD::CVT_FS:  return "cvt_fs";
6054     case ISD::CVT_FU:  return "cvt_fu";
6055     case ISD::CVT_SF:  return "cvt_sf";
6056     case ISD::CVT_UF:  return "cvt_uf";
6057     case ISD::CVT_SS:  return "cvt_ss";
6058     case ISD::CVT_SU:  return "cvt_su";
6059     case ISD::CVT_US:  return "cvt_us";
6060     case ISD::CVT_UU:  return "cvt_uu";
6061     }
6062   }
6063 
6064     // Control flow instructions
6065   case ISD::BR:      return "br";
6066   case ISD::BRIND:   return "brind";
6067   case ISD::BR_JT:   return "br_jt";
6068   case ISD::BRCOND:  return "brcond";
6069   case ISD::BR_CC:   return "br_cc";
6070   case ISD::CALLSEQ_START:  return "callseq_start";
6071   case ISD::CALLSEQ_END:    return "callseq_end";
6072 
6073     // Other operators
6074   case ISD::LOAD:               return "load";
6075   case ISD::STORE:              return "store";
6076   case ISD::VAARG:              return "vaarg";
6077   case ISD::VACOPY:             return "vacopy";
6078   case ISD::VAEND:              return "vaend";
6079   case ISD::VASTART:            return "vastart";
6080   case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
6081   case ISD::EXTRACT_ELEMENT:    return "extract_element";
6082   case ISD::BUILD_PAIR:         return "build_pair";
6083   case ISD::STACKSAVE:          return "stacksave";
6084   case ISD::STACKRESTORE:       return "stackrestore";
6085   case ISD::TRAP:               return "trap";
6086 
6087   // Bit manipulation
6088   case ISD::BSWAP:   return "bswap";
6089   case ISD::CTPOP:   return "ctpop";
6090   case ISD::CTTZ:    return "cttz";
6091   case ISD::CTLZ:    return "ctlz";
6092 
6093   // Trampolines
6094   case ISD::INIT_TRAMPOLINE: return "init_trampoline";
6095   case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
6096 
6097   case ISD::CONDCODE:
6098     switch (cast<CondCodeSDNode>(this)->get()) {
6099     default: llvm_unreachable("Unknown setcc condition!");
6100     case ISD::SETOEQ:  return "setoeq";
6101     case ISD::SETOGT:  return "setogt";
6102     case ISD::SETOGE:  return "setoge";
6103     case ISD::SETOLT:  return "setolt";
6104     case ISD::SETOLE:  return "setole";
6105     case ISD::SETONE:  return "setone";
6106 
6107     case ISD::SETO:    return "seto";
6108     case ISD::SETUO:   return "setuo";
6109     case ISD::SETUEQ:  return "setue";
6110     case ISD::SETUGT:  return "setugt";
6111     case ISD::SETUGE:  return "setuge";
6112     case ISD::SETULT:  return "setult";
6113     case ISD::SETULE:  return "setule";
6114     case ISD::SETUNE:  return "setune";
6115 
6116     case ISD::SETEQ:   return "seteq";
6117     case ISD::SETGT:   return "setgt";
6118     case ISD::SETGE:   return "setge";
6119     case ISD::SETLT:   return "setlt";
6120     case ISD::SETLE:   return "setle";
6121     case ISD::SETNE:   return "setne";
6122     }
6123   }
6124 }
6125 
getIndexedModeName(ISD::MemIndexedMode AM)6126 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
6127   switch (AM) {
6128   default:
6129     return "";
6130   case ISD::PRE_INC:
6131     return "<pre-inc>";
6132   case ISD::PRE_DEC:
6133     return "<pre-dec>";
6134   case ISD::POST_INC:
6135     return "<post-inc>";
6136   case ISD::POST_DEC:
6137     return "<post-dec>";
6138   }
6139 }
6140 
getArgFlagsString()6141 std::string ISD::ArgFlagsTy::getArgFlagsString() {
6142   std::string S = "< ";
6143 
6144   if (isZExt())
6145     S += "zext ";
6146   if (isSExt())
6147     S += "sext ";
6148   if (isInReg())
6149     S += "inreg ";
6150   if (isSRet())
6151     S += "sret ";
6152   if (isByVal())
6153     S += "byval ";
6154   if (isNest())
6155     S += "nest ";
6156   if (getByValAlign())
6157     S += "byval-align:" + utostr(getByValAlign()) + " ";
6158   if (getOrigAlign())
6159     S += "orig-align:" + utostr(getOrigAlign()) + " ";
6160   if (getByValSize())
6161     S += "byval-size:" + utostr(getByValSize()) + " ";
6162   return S + ">";
6163 }
6164 
dump() const6165 void SDNode::dump() const { dump(0); }
dump(const SelectionDAG * G) const6166 void SDNode::dump(const SelectionDAG *G) const {
6167   print(dbgs(), G);
6168   dbgs() << '\n';
6169 }
6170 
print_types(raw_ostream & OS,const SelectionDAG * G) const6171 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
6172   OS << (void*)this << ": ";
6173 
6174   for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
6175     if (i) OS << ",";
6176     if (getValueType(i) == MVT::Other)
6177       OS << "ch";
6178     else
6179       OS << getValueType(i).getEVTString();
6180   }
6181   OS << " = " << getOperationName(G);
6182 }
6183 
print_details(raw_ostream & OS,const SelectionDAG * G) const6184 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
6185   if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
6186     if (!MN->memoperands_empty()) {
6187       OS << "<";
6188       OS << "Mem:";
6189       for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
6190            e = MN->memoperands_end(); i != e; ++i) {
6191         OS << **i;
6192         if (llvm::next(i) != e)
6193           OS << " ";
6194       }
6195       OS << ">";
6196     }
6197   } else if (const ShuffleVectorSDNode *SVN =
6198                dyn_cast<ShuffleVectorSDNode>(this)) {
6199     OS << "<";
6200     for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
6201       int Idx = SVN->getMaskElt(i);
6202       if (i) OS << ",";
6203       if (Idx < 0)
6204         OS << "u";
6205       else
6206         OS << Idx;
6207     }
6208     OS << ">";
6209   } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
6210     OS << '<' << CSDN->getAPIntValue() << '>';
6211   } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
6212     if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
6213       OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
6214     else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
6215       OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
6216     else {
6217       OS << "<APFloat(";
6218       CSDN->getValueAPF().bitcastToAPInt().dump();
6219       OS << ")>";
6220     }
6221   } else if (const GlobalAddressSDNode *GADN =
6222              dyn_cast<GlobalAddressSDNode>(this)) {
6223     int64_t offset = GADN->getOffset();
6224     OS << '<';
6225     WriteAsOperand(OS, GADN->getGlobal());
6226     OS << '>';
6227     if (offset > 0)
6228       OS << " + " << offset;
6229     else
6230       OS << " " << offset;
6231     if (unsigned int TF = GADN->getTargetFlags())
6232       OS << " [TF=" << TF << ']';
6233   } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
6234     OS << "<" << FIDN->getIndex() << ">";
6235   } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
6236     OS << "<" << JTDN->getIndex() << ">";
6237     if (unsigned int TF = JTDN->getTargetFlags())
6238       OS << " [TF=" << TF << ']';
6239   } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
6240     int offset = CP->getOffset();
6241     if (CP->isMachineConstantPoolEntry())
6242       OS << "<" << *CP->getMachineCPVal() << ">";
6243     else
6244       OS << "<" << *CP->getConstVal() << ">";
6245     if (offset > 0)
6246       OS << " + " << offset;
6247     else
6248       OS << " " << offset;
6249     if (unsigned int TF = CP->getTargetFlags())
6250       OS << " [TF=" << TF << ']';
6251   } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6252     OS << "<";
6253     const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6254     if (LBB)
6255       OS << LBB->getName() << " ";
6256     OS << (const void*)BBDN->getBasicBlock() << ">";
6257   } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6258     OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0);
6259   } else if (const ExternalSymbolSDNode *ES =
6260              dyn_cast<ExternalSymbolSDNode>(this)) {
6261     OS << "'" << ES->getSymbol() << "'";
6262     if (unsigned int TF = ES->getTargetFlags())
6263       OS << " [TF=" << TF << ']';
6264   } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6265     if (M->getValue())
6266       OS << "<" << M->getValue() << ">";
6267     else
6268       OS << "<null>";
6269   } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6270     if (MD->getMD())
6271       OS << "<" << MD->getMD() << ">";
6272     else
6273       OS << "<null>";
6274   } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6275     OS << ":" << N->getVT().getEVTString();
6276   }
6277   else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6278     OS << "<" << *LD->getMemOperand();
6279 
6280     bool doExt = true;
6281     switch (LD->getExtensionType()) {
6282     default: doExt = false; break;
6283     case ISD::EXTLOAD: OS << ", anyext"; break;
6284     case ISD::SEXTLOAD: OS << ", sext"; break;
6285     case ISD::ZEXTLOAD: OS << ", zext"; break;
6286     }
6287     if (doExt)
6288       OS << " from " << LD->getMemoryVT().getEVTString();
6289 
6290     const char *AM = getIndexedModeName(LD->getAddressingMode());
6291     if (*AM)
6292       OS << ", " << AM;
6293 
6294     OS << ">";
6295   } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6296     OS << "<" << *ST->getMemOperand();
6297 
6298     if (ST->isTruncatingStore())
6299       OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6300 
6301     const char *AM = getIndexedModeName(ST->getAddressingMode());
6302     if (*AM)
6303       OS << ", " << AM;
6304 
6305     OS << ">";
6306   } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6307     OS << "<" << *M->getMemOperand() << ">";
6308   } else if (const BlockAddressSDNode *BA =
6309                dyn_cast<BlockAddressSDNode>(this)) {
6310     OS << "<";
6311     WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6312     OS << ", ";
6313     WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6314     OS << ">";
6315     if (unsigned int TF = BA->getTargetFlags())
6316       OS << " [TF=" << TF << ']';
6317   }
6318 
6319   if (G)
6320     if (unsigned Order = G->GetOrdering(this))
6321       OS << " [ORD=" << Order << ']';
6322 
6323   if (getNodeId() != -1)
6324     OS << " [ID=" << getNodeId() << ']';
6325 
6326   DebugLoc dl = getDebugLoc();
6327   if (G && !dl.isUnknown()) {
6328     DIScope
6329       Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6330     OS << " dbg:";
6331     // Omit the directory, since it's usually long and uninteresting.
6332     if (Scope.Verify())
6333       OS << Scope.getFilename();
6334     else
6335       OS << "<unknown>";
6336     OS << ':' << dl.getLine();
6337     if (dl.getCol() != 0)
6338       OS << ':' << dl.getCol();
6339   }
6340 }
6341 
print(raw_ostream & OS,const SelectionDAG * G) const6342 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6343   print_types(OS, G);
6344   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6345     if (i) OS << ", "; else OS << " ";
6346     OS << (void*)getOperand(i).getNode();
6347     if (unsigned RN = getOperand(i).getResNo())
6348       OS << ":" << RN;
6349   }
6350   print_details(OS, G);
6351 }
6352 
printrWithDepthHelper(raw_ostream & OS,const SDNode * N,const SelectionDAG * G,unsigned depth,unsigned indent)6353 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6354                                   const SelectionDAG *G, unsigned depth,
6355                                   unsigned indent) {
6356   if (depth == 0)
6357     return;
6358 
6359   OS.indent(indent);
6360 
6361   N->print(OS, G);
6362 
6363   if (depth < 1)
6364     return;
6365 
6366   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6367     // Don't follow chain operands.
6368     if (N->getOperand(i).getValueType() == MVT::Other)
6369       continue;
6370     OS << '\n';
6371     printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6372   }
6373 }
6374 
printrWithDepth(raw_ostream & OS,const SelectionDAG * G,unsigned depth) const6375 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6376                             unsigned depth) const {
6377   printrWithDepthHelper(OS, this, G, depth, 0);
6378 }
6379 
printrFull(raw_ostream & OS,const SelectionDAG * G) const6380 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6381   // Don't print impossibly deep things.
6382   printrWithDepth(OS, G, 10);
6383 }
6384 
dumprWithDepth(const SelectionDAG * G,unsigned depth) const6385 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6386   printrWithDepth(dbgs(), G, depth);
6387 }
6388 
dumprFull(const SelectionDAG * G) const6389 void SDNode::dumprFull(const SelectionDAG *G) const {
6390   // Don't print impossibly deep things.
6391   dumprWithDepth(G, 10);
6392 }
6393 
DumpNodes(const SDNode * N,unsigned indent,const SelectionDAG * G)6394 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6395   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6396     if (N->getOperand(i).getNode()->hasOneUse())
6397       DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6398     else
6399       dbgs() << "\n" << std::string(indent+2, ' ')
6400            << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6401 
6402 
6403   dbgs() << "\n";
6404   dbgs().indent(indent);
6405   N->dump(G);
6406 }
6407 
UnrollVectorOp(SDNode * N,unsigned ResNE)6408 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6409   assert(N->getNumValues() == 1 &&
6410          "Can't unroll a vector with multiple results!");
6411 
6412   EVT VT = N->getValueType(0);
6413   unsigned NE = VT.getVectorNumElements();
6414   EVT EltVT = VT.getVectorElementType();
6415   DebugLoc dl = N->getDebugLoc();
6416 
6417   SmallVector<SDValue, 8> Scalars;
6418   SmallVector<SDValue, 4> Operands(N->getNumOperands());
6419 
6420   // If ResNE is 0, fully unroll the vector op.
6421   if (ResNE == 0)
6422     ResNE = NE;
6423   else if (NE > ResNE)
6424     NE = ResNE;
6425 
6426   unsigned i;
6427   for (i= 0; i != NE; ++i) {
6428     for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6429       SDValue Operand = N->getOperand(j);
6430       EVT OperandVT = Operand.getValueType();
6431       if (OperandVT.isVector()) {
6432         // A vector operand; extract a single element.
6433         EVT OperandEltVT = OperandVT.getVectorElementType();
6434         Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6435                               OperandEltVT,
6436                               Operand,
6437                               getConstant(i, TLI.getPointerTy()));
6438       } else {
6439         // A scalar operand; just use it as is.
6440         Operands[j] = Operand;
6441       }
6442     }
6443 
6444     switch (N->getOpcode()) {
6445     default:
6446       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6447                                 &Operands[0], Operands.size()));
6448       break;
6449     case ISD::VSELECT:
6450       Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6451                                 &Operands[0], Operands.size()));
6452       break;
6453     case ISD::SHL:
6454     case ISD::SRA:
6455     case ISD::SRL:
6456     case ISD::ROTL:
6457     case ISD::ROTR:
6458       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6459                                 getShiftAmountOperand(Operands[0].getValueType(),
6460                                                       Operands[1])));
6461       break;
6462     case ISD::SIGN_EXTEND_INREG:
6463     case ISD::FP_ROUND_INREG: {
6464       EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6465       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6466                                 Operands[0],
6467                                 getValueType(ExtVT)));
6468     }
6469     }
6470   }
6471 
6472   for (; i < ResNE; ++i)
6473     Scalars.push_back(getUNDEF(EltVT));
6474 
6475   return getNode(ISD::BUILD_VECTOR, dl,
6476                  EVT::getVectorVT(*getContext(), EltVT, ResNE),
6477                  &Scalars[0], Scalars.size());
6478 }
6479 
6480 
6481 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6482 /// location that is 'Dist' units away from the location that the 'Base' load
6483 /// is loading from.
isConsecutiveLoad(LoadSDNode * LD,LoadSDNode * Base,unsigned Bytes,int Dist) const6484 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6485                                      unsigned Bytes, int Dist) const {
6486   if (LD->getChain() != Base->getChain())
6487     return false;
6488   EVT VT = LD->getValueType(0);
6489   if (VT.getSizeInBits() / 8 != Bytes)
6490     return false;
6491 
6492   SDValue Loc = LD->getOperand(1);
6493   SDValue BaseLoc = Base->getOperand(1);
6494   if (Loc.getOpcode() == ISD::FrameIndex) {
6495     if (BaseLoc.getOpcode() != ISD::FrameIndex)
6496       return false;
6497     const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6498     int FI  = cast<FrameIndexSDNode>(Loc)->getIndex();
6499     int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6500     int FS  = MFI->getObjectSize(FI);
6501     int BFS = MFI->getObjectSize(BFI);
6502     if (FS != BFS || FS != (int)Bytes) return false;
6503     return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6504   }
6505 
6506   // Handle X+C
6507   if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6508       cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6509     return true;
6510 
6511   const GlobalValue *GV1 = NULL;
6512   const GlobalValue *GV2 = NULL;
6513   int64_t Offset1 = 0;
6514   int64_t Offset2 = 0;
6515   bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6516   bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6517   if (isGA1 && isGA2 && GV1 == GV2)
6518     return Offset1 == (Offset2 + Dist*Bytes);
6519   return false;
6520 }
6521 
6522 
6523 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6524 /// it cannot be inferred.
InferPtrAlignment(SDValue Ptr) const6525 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6526   // If this is a GlobalAddress + cst, return the alignment.
6527   const GlobalValue *GV;
6528   int64_t GVOffset = 0;
6529   if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6530     // If GV has specified alignment, then use it. Otherwise, use the preferred
6531     // alignment.
6532     unsigned Align = GV->getAlignment();
6533     if (!Align) {
6534       if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6535         if (GVar->hasInitializer()) {
6536           const TargetData *TD = TLI.getTargetData();
6537           Align = TD->getPreferredAlignment(GVar);
6538         }
6539       }
6540       if (!Align)
6541         Align = TLI.getTargetData()->getABITypeAlignment(GV->getType());
6542     }
6543     return MinAlign(Align, GVOffset);
6544   }
6545 
6546   // If this is a direct reference to a stack slot, use information about the
6547   // stack slot's alignment.
6548   int FrameIdx = 1 << 31;
6549   int64_t FrameOffset = 0;
6550   if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6551     FrameIdx = FI->getIndex();
6552   } else if (isBaseWithConstantOffset(Ptr) &&
6553              isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6554     // Handle FI+Cst
6555     FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6556     FrameOffset = Ptr.getConstantOperandVal(1);
6557   }
6558 
6559   if (FrameIdx != (1 << 31)) {
6560     const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6561     unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6562                                     FrameOffset);
6563     return FIInfoAlign;
6564   }
6565 
6566   return 0;
6567 }
6568 
dump() const6569 void SelectionDAG::dump() const {
6570   dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6571 
6572   for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6573        I != E; ++I) {
6574     const SDNode *N = I;
6575     if (!N->hasOneUse() && N != getRoot().getNode())
6576       DumpNodes(N, 2, this);
6577   }
6578 
6579   if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6580 
6581   dbgs() << "\n\n";
6582 }
6583 
printr(raw_ostream & OS,const SelectionDAG * G) const6584 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6585   print_types(OS, G);
6586   print_details(OS, G);
6587 }
6588 
6589 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
DumpNodesr(raw_ostream & OS,const SDNode * N,unsigned indent,const SelectionDAG * G,VisitedSDNodeSet & once)6590 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6591                        const SelectionDAG *G, VisitedSDNodeSet &once) {
6592   if (!once.insert(N))          // If we've been here before, return now.
6593     return;
6594 
6595   // Dump the current SDNode, but don't end the line yet.
6596   OS << std::string(indent, ' ');
6597   N->printr(OS, G);
6598 
6599   // Having printed this SDNode, walk the children:
6600   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6601     const SDNode *child = N->getOperand(i).getNode();
6602 
6603     if (i) OS << ",";
6604     OS << " ";
6605 
6606     if (child->getNumOperands() == 0) {
6607       // This child has no grandchildren; print it inline right here.
6608       child->printr(OS, G);
6609       once.insert(child);
6610     } else {         // Just the address. FIXME: also print the child's opcode.
6611       OS << (void*)child;
6612       if (unsigned RN = N->getOperand(i).getResNo())
6613         OS << ":" << RN;
6614     }
6615   }
6616 
6617   OS << "\n";
6618 
6619   // Dump children that have grandchildren on their own line(s).
6620   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6621     const SDNode *child = N->getOperand(i).getNode();
6622     DumpNodesr(OS, child, indent+2, G, once);
6623   }
6624 }
6625 
dumpr() const6626 void SDNode::dumpr() const {
6627   VisitedSDNodeSet once;
6628   DumpNodesr(dbgs(), this, 0, 0, once);
6629 }
6630 
dumpr(const SelectionDAG * G) const6631 void SDNode::dumpr(const SelectionDAG *G) const {
6632   VisitedSDNodeSet once;
6633   DumpNodesr(dbgs(), this, 0, G, once);
6634 }
6635 
6636 
6637 // getAddressSpace - Return the address space this GlobalAddress belongs to.
getAddressSpace() const6638 unsigned GlobalAddressSDNode::getAddressSpace() const {
6639   return getGlobal()->getType()->getAddressSpace();
6640 }
6641 
6642 
getType() const6643 Type *ConstantPoolSDNode::getType() const {
6644   if (isMachineConstantPoolEntry())
6645     return Val.MachineCPVal->getType();
6646   return Val.ConstVal->getType();
6647 }
6648 
isConstantSplat(APInt & SplatValue,APInt & SplatUndef,unsigned & SplatBitSize,bool & HasAnyUndefs,unsigned MinSplatBits,bool isBigEndian)6649 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6650                                         APInt &SplatUndef,
6651                                         unsigned &SplatBitSize,
6652                                         bool &HasAnyUndefs,
6653                                         unsigned MinSplatBits,
6654                                         bool isBigEndian) {
6655   EVT VT = getValueType(0);
6656   assert(VT.isVector() && "Expected a vector type");
6657   unsigned sz = VT.getSizeInBits();
6658   if (MinSplatBits > sz)
6659     return false;
6660 
6661   SplatValue = APInt(sz, 0);
6662   SplatUndef = APInt(sz, 0);
6663 
6664   // Get the bits.  Bits with undefined values (when the corresponding element
6665   // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6666   // in SplatValue.  If any of the values are not constant, give up and return
6667   // false.
6668   unsigned int nOps = getNumOperands();
6669   assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6670   unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6671 
6672   for (unsigned j = 0; j < nOps; ++j) {
6673     unsigned i = isBigEndian ? nOps-1-j : j;
6674     SDValue OpVal = getOperand(i);
6675     unsigned BitPos = j * EltBitSize;
6676 
6677     if (OpVal.getOpcode() == ISD::UNDEF)
6678       SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6679     else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6680       SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6681                     zextOrTrunc(sz) << BitPos;
6682     else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6683       SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6684      else
6685       return false;
6686   }
6687 
6688   // The build_vector is all constants or undefs.  Find the smallest element
6689   // size that splats the vector.
6690 
6691   HasAnyUndefs = (SplatUndef != 0);
6692   while (sz > 8) {
6693 
6694     unsigned HalfSize = sz / 2;
6695     APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6696     APInt LowValue = SplatValue.trunc(HalfSize);
6697     APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6698     APInt LowUndef = SplatUndef.trunc(HalfSize);
6699 
6700     // If the two halves do not match (ignoring undef bits), stop here.
6701     if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6702         MinSplatBits > HalfSize)
6703       break;
6704 
6705     SplatValue = HighValue | LowValue;
6706     SplatUndef = HighUndef & LowUndef;
6707 
6708     sz = HalfSize;
6709   }
6710 
6711   SplatBitSize = sz;
6712   return true;
6713 }
6714 
isSplatMask(const int * Mask,EVT VT)6715 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6716   // Find the first non-undef value in the shuffle mask.
6717   unsigned i, e;
6718   for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6719     /* search */;
6720 
6721   assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6722 
6723   // Make sure all remaining elements are either undef or the same as the first
6724   // non-undef value.
6725   for (int Idx = Mask[i]; i != e; ++i)
6726     if (Mask[i] >= 0 && Mask[i] != Idx)
6727       return false;
6728   return true;
6729 }
6730 
6731 #ifdef XDEBUG
checkForCyclesHelper(const SDNode * N,SmallPtrSet<const SDNode *,32> & Visited,SmallPtrSet<const SDNode *,32> & Checked)6732 static void checkForCyclesHelper(const SDNode *N,
6733                                  SmallPtrSet<const SDNode*, 32> &Visited,
6734                                  SmallPtrSet<const SDNode*, 32> &Checked) {
6735   // If this node has already been checked, don't check it again.
6736   if (Checked.count(N))
6737     return;
6738 
6739   // If a node has already been visited on this depth-first walk, reject it as
6740   // a cycle.
6741   if (!Visited.insert(N)) {
6742     dbgs() << "Offending node:\n";
6743     N->dumprFull();
6744     errs() << "Detected cycle in SelectionDAG\n";
6745     abort();
6746   }
6747 
6748   for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6749     checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6750 
6751   Checked.insert(N);
6752   Visited.erase(N);
6753 }
6754 #endif
6755 
checkForCycles(const llvm::SDNode * N)6756 void llvm::checkForCycles(const llvm::SDNode *N) {
6757 #ifdef XDEBUG
6758   assert(N && "Checking nonexistant SDNode");
6759   SmallPtrSet<const SDNode*, 32> visited;
6760   SmallPtrSet<const SDNode*, 32> checked;
6761   checkForCyclesHelper(N, visited, checked);
6762 #endif
6763 }
6764 
checkForCycles(const llvm::SelectionDAG * DAG)6765 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6766   checkForCycles(DAG->getRoot().getNode());
6767 }
6768