1 //===-- MipsMachineFunctionInfo.cpp - Private data used for Mips ----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "MipsMachineFunction.h"
11 #include "MCTargetDesc/MipsABIInfo.h"
12 #include "MipsSubtarget.h"
13 #include "MipsTargetMachine.h"
14 #include "llvm/CodeGen/MachineFrameInfo.h"
15 #include "llvm/CodeGen/MachineRegisterInfo.h"
16 #include "llvm/CodeGen/PseudoSourceValue.h"
17 #include "llvm/CodeGen/TargetRegisterInfo.h"
18 #include "llvm/Support/CommandLine.h"
19
20 using namespace llvm;
21
22 static cl::opt<bool>
23 FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
24 cl::desc("Always use $gp as the global base register."));
25
26 MipsFunctionInfo::~MipsFunctionInfo() = default;
27
globalBaseRegSet() const28 bool MipsFunctionInfo::globalBaseRegSet() const {
29 return GlobalBaseReg;
30 }
31
getGlobalBaseRegClass(MachineFunction & MF)32 static const TargetRegisterClass &getGlobalBaseRegClass(MachineFunction &MF) {
33 auto &STI = static_cast<const MipsSubtarget &>(MF.getSubtarget());
34 auto &TM = static_cast<const MipsTargetMachine &>(MF.getTarget());
35
36 if (STI.inMips16Mode())
37 return Mips::CPU16RegsRegClass;
38
39 if (STI.inMicroMipsMode())
40 return Mips::GPRMM16RegClass;
41
42 if (TM.getABI().IsN64())
43 return Mips::GPR64RegClass;
44
45 return Mips::GPR32RegClass;
46 }
47
getGlobalBaseReg()48 unsigned MipsFunctionInfo::getGlobalBaseReg() {
49 if (!GlobalBaseReg)
50 GlobalBaseReg =
51 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF));
52 return GlobalBaseReg;
53 }
54
createEhDataRegsFI()55 void MipsFunctionInfo::createEhDataRegsFI() {
56 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
57 for (int I = 0; I < 4; ++I) {
58 const TargetRegisterClass &RC =
59 static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64()
60 ? Mips::GPR64RegClass
61 : Mips::GPR32RegClass;
62
63 EhDataRegFI[I] = MF.getFrameInfo().CreateStackObject(TRI.getSpillSize(RC),
64 TRI.getSpillAlignment(RC), false);
65 }
66 }
67
createISRRegFI()68 void MipsFunctionInfo::createISRRegFI() {
69 // ISRs require spill slots for Status & ErrorPC Coprocessor 0 registers.
70 // The current implementation only supports Mips32r2+ not Mips64rX. Status
71 // is always 32 bits, ErrorPC is 32 or 64 bits dependent on architecture,
72 // however Mips32r2+ is the supported architecture.
73 const TargetRegisterClass &RC = Mips::GPR32RegClass;
74 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
75
76 for (int I = 0; I < 2; ++I)
77 ISRDataRegFI[I] = MF.getFrameInfo().CreateStackObject(
78 TRI.getSpillSize(RC), TRI.getSpillAlignment(RC), false);
79 }
80
isEhDataRegFI(int FI) const81 bool MipsFunctionInfo::isEhDataRegFI(int FI) const {
82 return CallsEhReturn && (FI == EhDataRegFI[0] || FI == EhDataRegFI[1]
83 || FI == EhDataRegFI[2] || FI == EhDataRegFI[3]);
84 }
85
isISRRegFI(int FI) const86 bool MipsFunctionInfo::isISRRegFI(int FI) const {
87 return IsISR && (FI == ISRDataRegFI[0] || FI == ISRDataRegFI[1]);
88 }
callPtrInfo(const char * ES)89 MachinePointerInfo MipsFunctionInfo::callPtrInfo(const char *ES) {
90 return MachinePointerInfo(MF.getPSVManager().getExternalSymbolCallEntry(ES));
91 }
92
callPtrInfo(const GlobalValue * GV)93 MachinePointerInfo MipsFunctionInfo::callPtrInfo(const GlobalValue *GV) {
94 return MachinePointerInfo(MF.getPSVManager().getGlobalValueCallEntry(GV));
95 }
96
getMoveF64ViaSpillFI(const TargetRegisterClass * RC)97 int MipsFunctionInfo::getMoveF64ViaSpillFI(const TargetRegisterClass *RC) {
98 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
99 if (MoveF64ViaSpillFI == -1) {
100 MoveF64ViaSpillFI = MF.getFrameInfo().CreateStackObject(
101 TRI.getSpillSize(*RC), TRI.getSpillAlignment(*RC), false);
102 }
103 return MoveF64ViaSpillFI;
104 }
105
anchor()106 void MipsFunctionInfo::anchor() {}
107