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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
3
4---
5name: mul_s32_ss
6legalized: true
7
8body: |
9  bb.0:
10    liveins: $sgpr0, $sgpr1
11    ; CHECK-LABEL: name: mul_s32_ss
12    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
13    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
14    ; CHECK: [[MUL:%[0-9]+]]:sgpr(s32) = G_MUL [[COPY]], [[COPY1]]
15    %0:_(s32) = COPY $sgpr0
16    %1:_(s32) = COPY $sgpr1
17    %2:_(s32) = G_MUL %0, %1
18...
19
20---
21name: mul_s32_sv
22legalized: true
23
24body: |
25  bb.0:
26    liveins: $sgpr0, $vgpr0
27    ; CHECK-LABEL: name: mul_s32_sv
28    ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
29    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
30    ; CHECK: [[MUL:%[0-9]+]]:vgpr(s32) = G_MUL [[COPY]], [[COPY1]]
31    %0:_(s32) = COPY $sgpr0
32    %1:_(s32) = COPY $vgpr0
33    %2:_(s32) = G_MUL %0, %1
34...
35
36---
37name: mul_s32_vs
38legalized: true
39
40body: |
41  bb.0:
42    liveins: $sgpr0, $vgpr0
43    ; CHECK-LABEL: name: mul_s32_vs
44    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
45    ; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
46    ; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
47    ; CHECK: [[MUL:%[0-9]+]]:vgpr(s32) = G_MUL [[COPY]], [[COPY2]]
48    %0:_(s32) = COPY $vgpr0
49    %1:_(s32) = COPY $sgpr0
50    %2:_(s32) = G_MUL %0, %1
51...
52
53---
54name: mul_s32_vv
55legalized: true
56
57body: |
58  bb.0:
59    liveins: $vgpr0, $vgpr1
60    ; CHECK-LABEL: name: mul_s32_vv
61    ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
62    ; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
63    ; CHECK: [[MUL:%[0-9]+]]:vgpr(s32) = G_MUL [[COPY]], [[COPY1]]
64    %0:_(s32) = COPY $vgpr0
65    %1:_(s32) = COPY $vgpr1
66    %2:_(s32) = G_MUL %0, %1
67...
68