1; RUN: llc < %s | FileCheck %s 2; RUN: llc < %s -enable-tail-merge=0 | FileCheck --check-prefix=NOMERGE %s 3 4; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 5; works. 6; PR1628 7 8; CHECK: bl _baz 9; CHECK-NOT: bl _baz 10 11; CHECK: bl _quux 12; CHECK-NOT: bl _quux 13 14; NOMERGE-DAG: bl _baz 15; NOMERGE-DAG: bl _baz 16 17; NOMERGE-DAG: bl _quux 18; NOMERGE-DAG: bl _quux 19 20; ModuleID = 'tail.c' 21target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" 22target triple = "arm-apple-darwin8" 23 24define i32 @f(i32 %i, i32 %q) { 25entry: 26 %i_addr = alloca i32 ; <i32*> [#uses=2] 27 %q_addr = alloca i32 ; <i32*> [#uses=2] 28 %retval = alloca i32, align 4 ; <i32*> [#uses=1] 29 store i32 %i, i32* %i_addr 30 store i32 %q, i32* %q_addr 31 %tmp = load i32, i32* %i_addr ; <i32> [#uses=1] 32 %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1] 33 %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1] 34 %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1] 35 br i1 %toBool, label %cond_true, label %cond_false 36 37cond_true: ; preds = %entry 38 %tmp3 = call i32 (...) @bar( ) ; <i32> [#uses=0] 39 %tmp4 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0] 40 %tmp7 = load i32, i32* %q_addr ; <i32> [#uses=1] 41 %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] 42 %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1] 43 %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1] 44 br i1 %toBool10, label %cond_true11, label %cond_false15 45 46cond_false: ; preds = %entry 47 %tmp5 = call i32 (...) @foo( ) ; <i32> [#uses=0] 48 %tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0] 49 %tmp27 = load i32, i32* %q_addr ; <i32> [#uses=1] 50 %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1] 51 %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1] 52 %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1] 53 br i1 %toBool210, label %cond_true11, label %cond_false15 54 55cond_true11: ; preds = %cond_next 56 %tmp13 = call i32 (...) @foo( ) ; <i32> [#uses=0] 57 %tmp14 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0] 58 br label %cond_next18 59 60cond_false15: ; preds = %cond_next 61 %tmp16 = call i32 (...) @bar( ) ; <i32> [#uses=0] 62 %tmp17 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0] 63 br label %cond_next18 64 65cond_next18: ; preds = %cond_false15, %cond_true11 66 %tmp19 = call i32 (...) @bar( ) ; <i32> [#uses=0] 67 br label %return 68 69return: ; preds = %cond_next18 70 %retval20 = load i32, i32* %retval ; <i32> [#uses=1] 71 ret i32 %retval20 72} 73 74declare i32 @bar(...) 75 76declare i32 @baz(...) 77 78declare i32 @foo(...) 79 80declare i32 @quux(...) 81