1; RUN: llc -o - %s | FileCheck %s 2; Make sure we do not try to compute liveness for FPSCR which in this case 3; is read before being written to (this is fine because becase FPSCR is 4; reserved). 5target triple = "thumbv7s-apple-ios" 6 7%struct.wibble = type { double } 8 9@global = common global i32 0, align 4 10@global.1 = common global i32 0, align 4 11 12; CHECK-LABEL: eggs: 13; CHECK: sub sp, #8 14; VMRS instruction comes before any other instruction writing FPSCR: 15; CHECK-NEXT: vmrs r0, fpscr 16; ... 17; CHECK: add sp, #8 18; CHECK: bx lr 19define i32 @eggs(double* nocapture readnone %arg) { 20bb: 21 %tmp = alloca %struct.wibble, align 4 22 %tmp1 = bitcast %struct.wibble* %tmp to i8* 23 %tmp2 = tail call i32 @llvm.flt.rounds() 24 %tmp3 = ptrtoint %struct.wibble* %tmp to i32 25 %tmp4 = sitofp i32 %tmp3 to double 26 %tmp5 = fmul double %tmp4, 0x0123456789ABCDEF 27 %tmp6 = fptosi double %tmp5 to i32 28 %tmp7 = fcmp une double %tmp5, 0.000000e+00 29 %tmp8 = sitofp i32 %tmp6 to double 30 %tmp9 = fcmp une double %tmp5, %tmp8 31 %tmp10 = and i1 %tmp7, %tmp9 32 %tmp11 = sext i1 %tmp10 to i32 33 %tmp12 = add nsw i32 %tmp11, %tmp6 34 store i32 %tmp12, i32* @global, align 4 35 %tmp13 = icmp ne i32 %tmp12, 0 36 %tmp14 = icmp ne i32 %tmp2, 0 37 %tmp15 = and i1 %tmp14, %tmp13 38 br i1 %tmp15, label %bb16, label %bb18 39 40bb16: ; preds = %bb 41 %tmp17 = load i32, i32* @global.1, align 4 42 br label %bb18 43 44bb18: ; preds = %bb16, %bb 45 ret i32 undef 46} 47 48declare i32 @llvm.flt.rounds() 49declare i32 @zot(...) 50