1# RUN: llc -o - %s -mtriple=thumb-arm-none-eabi -mcpu=cortex-m0 -run-pass scavenger-test | FileCheck %s 2--- 3# CHECK-LABEL: name: scavengebug0 4# Make sure we are not spilling/using a physreg used in the very last 5# instruction of the scavenging range. 6# CHECK-NOT: tSTRi {{.*}}$r0,{{.*}}$r0 7# CHECK-NOT: tSTRi {{.*}}$r1,{{.*}}$r1 8# CHECK-NOT: tSTRi {{.*}}$r2,{{.*}}$r2 9# CHECK-NOT: tSTRi {{.*}}$r3,{{.*}}$r3 10# CHECK-NOT: tSTRi {{.*}}$r4,{{.*}}$r4 11# CHECK-NOT: tSTRi {{.*}}$r5,{{.*}}$r5 12# CHECK-NOT: tSTRi {{.*}}$r6,{{.*}}$r6 13# CHECK-NOT: tSTRi {{.*}}$r7,{{.*}}$r7 14name: scavengebug0 15body: | 16 bb.0: 17 ; Bring up register pressure to force emergency spilling 18 $r0 = IMPLICIT_DEF 19 $r1 = IMPLICIT_DEF 20 $r2 = IMPLICIT_DEF 21 $r3 = IMPLICIT_DEF 22 $r4 = IMPLICIT_DEF 23 $r5 = IMPLICIT_DEF 24 $r6 = IMPLICIT_DEF 25 $r7 = IMPLICIT_DEF 26 27 %0 : tgpr = IMPLICIT_DEF 28 %0 = tADDhirr %0, $sp, 14, $noreg 29 tSTRi $r0, %0, 0, 14, $noreg 30 31 %1 : tgpr = IMPLICIT_DEF 32 %1 = tADDhirr %1, $sp, 14, $noreg 33 tSTRi $r1, %1, 0, 14, $noreg 34 35 %2 : tgpr = IMPLICIT_DEF 36 %2 = tADDhirr %2, $sp, 14, $noreg 37 tSTRi $r2, %2, 0, 14, $noreg 38 39 %3 : tgpr = IMPLICIT_DEF 40 %3 = tADDhirr %3, $sp, 14, $noreg 41 tSTRi $r3, %3, 0, 14, $noreg 42 43 %4 : tgpr = IMPLICIT_DEF 44 %4 = tADDhirr %4, $sp, 14, $noreg 45 tSTRi $r4, %4, 0, 14, $noreg 46 47 %5 : tgpr = IMPLICIT_DEF 48 %5 = tADDhirr %5, $sp, 14, $noreg 49 tSTRi $r5, %5, 0, 14, $noreg 50 51 %6 : tgpr = IMPLICIT_DEF 52 %6 = tADDhirr %6, $sp, 14, $noreg 53 tSTRi $r6, %6, 0, 14, $noreg 54 55 %7 : tgpr = IMPLICIT_DEF 56 %7 = tADDhirr %7, $sp, 14, $noreg 57 tSTRi $r7, %7, 0, 14, $noreg 58 59 KILL $r0 60 KILL $r1 61 KILL $r2 62 KILL $r3 63 KILL $r4 64 KILL $r5 65 KILL $r6 66 KILL $r7 67