1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 3--- | 4 5 define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) { 6 %res = ashr i64 %arg1, %arg2 7 ret i64 %res 8 } 9 10 define i64 @test_ashr_i64_imm(i64 %arg1) { 11 %res = ashr i64 %arg1, 5 12 ret i64 %res 13 } 14 15 define i64 @test_ashr_i64_imm1(i64 %arg1) { 16 %res = ashr i64 %arg1, 1 17 ret i64 %res 18 } 19 20 define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) { 21 %res = ashr i32 %arg1, %arg2 22 ret i32 %res 23 } 24 25 define i32 @test_ashr_i32_imm(i32 %arg1) { 26 %res = ashr i32 %arg1, 5 27 ret i32 %res 28 } 29 30 define i32 @test_ashr_i32_imm1(i32 %arg1) { 31 %res = ashr i32 %arg1, 1 32 ret i32 %res 33 } 34 35 define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) { 36 %a = trunc i32 %arg1 to i16 37 %a2 = trunc i32 %arg2 to i16 38 %res = ashr i16 %a, %a2 39 ret i16 %res 40 } 41 42 define i16 @test_ashr_i16_imm(i32 %arg1) { 43 %a = trunc i32 %arg1 to i16 44 %res = ashr i16 %a, 5 45 ret i16 %res 46 } 47 48 define i16 @test_ashr_i16_imm1(i32 %arg1) { 49 %a = trunc i32 %arg1 to i16 50 %res = ashr i16 %a, 1 51 ret i16 %res 52 } 53 54 define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) { 55 %a = trunc i32 %arg1 to i8 56 %a2 = trunc i32 %arg2 to i8 57 %res = ashr i8 %a, %a2 58 ret i8 %res 59 } 60 61 define i8 @test_ashr_i8_imm(i32 %arg1) { 62 %a = trunc i32 %arg1 to i8 63 %res = ashr i8 %a, 5 64 ret i8 %res 65 } 66 67 define i8 @test_ashr_i8_imm1(i32 %arg1) { 68 %a = trunc i32 %arg1 to i8 69 %res = ashr i8 %a, 1 70 ret i8 %res 71 } 72... 73--- 74name: test_ashr_i64 75alignment: 4 76legalized: true 77regBankSelected: true 78tracksRegLiveness: true 79registers: 80 - { id: 0, class: gpr, preferred-register: '' } 81 - { id: 1, class: gpr, preferred-register: '' } 82 - { id: 2, class: gpr, preferred-register: '' } 83liveins: 84fixedStack: 85stack: 86constants: 87body: | 88 bb.1 (%ir-block.0): 89 liveins: $rdi, $rsi 90 91 ; ALL-LABEL: name: test_ashr_i64 92 ; ALL: liveins: $rdi, $rsi 93 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 94 ; ALL: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 95 ; ALL: $rcx = COPY [[COPY1]] 96 ; ALL: $cl = KILL killed $rcx 97 ; ALL: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def $eflags, implicit $cl 98 ; ALL: $rax = COPY [[SAR64rCL]] 99 ; ALL: RET 0, implicit $rax 100 %0(s64) = COPY $rdi 101 %1(s64) = COPY $rsi 102 %2(s64) = G_ASHR %0, %1 103 $rax = COPY %2(s64) 104 RET 0, implicit $rax 105 106... 107--- 108name: test_ashr_i64_imm 109alignment: 4 110legalized: true 111regBankSelected: true 112tracksRegLiveness: true 113registers: 114 - { id: 0, class: gpr, preferred-register: '' } 115 - { id: 1, class: gpr, preferred-register: '' } 116 - { id: 2, class: gpr, preferred-register: '' } 117liveins: 118fixedStack: 119stack: 120constants: 121body: | 122 bb.1 (%ir-block.0): 123 liveins: $rdi 124 125 ; ALL-LABEL: name: test_ashr_i64_imm 126 ; ALL: liveins: $rdi 127 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 128 ; ALL: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 5 129 ; ALL: $rcx = COPY [[MOV64ri32_]] 130 ; ALL: $cl = KILL killed $rcx 131 ; ALL: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def $eflags, implicit $cl 132 ; ALL: $rax = COPY [[SAR64rCL]] 133 ; ALL: RET 0, implicit $rax 134 %0(s64) = COPY $rdi 135 %1(s64) = G_CONSTANT i64 5 136 %2(s64) = G_ASHR %0, %1 137 $rax = COPY %2(s64) 138 RET 0, implicit $rax 139 140... 141--- 142name: test_ashr_i64_imm1 143alignment: 4 144legalized: true 145regBankSelected: true 146tracksRegLiveness: true 147registers: 148 - { id: 0, class: gpr, preferred-register: '' } 149 - { id: 1, class: gpr, preferred-register: '' } 150 - { id: 2, class: gpr, preferred-register: '' } 151liveins: 152fixedStack: 153stack: 154constants: 155body: | 156 bb.1 (%ir-block.0): 157 liveins: $rdi 158 159 ; ALL-LABEL: name: test_ashr_i64_imm1 160 ; ALL: liveins: $rdi 161 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 162 ; ALL: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 1 163 ; ALL: $rcx = COPY [[MOV64ri32_]] 164 ; ALL: $cl = KILL killed $rcx 165 ; ALL: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def $eflags, implicit $cl 166 ; ALL: $rax = COPY [[SAR64rCL]] 167 ; ALL: RET 0, implicit $rax 168 %0(s64) = COPY $rdi 169 %1(s64) = G_CONSTANT i64 1 170 %2(s64) = G_ASHR %0, %1 171 $rax = COPY %2(s64) 172 RET 0, implicit $rax 173 174... 175--- 176name: test_ashr_i32 177alignment: 4 178legalized: true 179regBankSelected: true 180tracksRegLiveness: true 181registers: 182 - { id: 0, class: gpr, preferred-register: '' } 183 - { id: 1, class: gpr, preferred-register: '' } 184 - { id: 2, class: gpr, preferred-register: '' } 185liveins: 186fixedStack: 187stack: 188constants: 189body: | 190 bb.1 (%ir-block.0): 191 liveins: $edi, $esi 192 193 ; ALL-LABEL: name: test_ashr_i32 194 ; ALL: liveins: $edi, $esi 195 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 196 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 197 ; ALL: $ecx = COPY [[COPY1]] 198 ; ALL: $cl = KILL killed $ecx 199 ; ALL: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def $eflags, implicit $cl 200 ; ALL: $eax = COPY [[SAR32rCL]] 201 ; ALL: RET 0, implicit $eax 202 %0(s32) = COPY $edi 203 %1(s32) = COPY $esi 204 %2(s32) = G_ASHR %0, %1 205 $eax = COPY %2(s32) 206 RET 0, implicit $eax 207 208... 209--- 210name: test_ashr_i32_imm 211alignment: 4 212legalized: true 213regBankSelected: true 214tracksRegLiveness: true 215registers: 216 - { id: 0, class: gpr, preferred-register: '' } 217 - { id: 1, class: gpr, preferred-register: '' } 218 - { id: 2, class: gpr, preferred-register: '' } 219liveins: 220fixedStack: 221stack: 222constants: 223body: | 224 bb.1 (%ir-block.0): 225 liveins: $edi 226 227 ; ALL-LABEL: name: test_ashr_i32_imm 228 ; ALL: liveins: $edi 229 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 230 ; ALL: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 5 231 ; ALL: $ecx = COPY [[MOV32ri]] 232 ; ALL: $cl = KILL killed $ecx 233 ; ALL: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def $eflags, implicit $cl 234 ; ALL: $eax = COPY [[SAR32rCL]] 235 ; ALL: RET 0, implicit $eax 236 %0(s32) = COPY $edi 237 %1(s32) = G_CONSTANT i32 5 238 %2(s32) = G_ASHR %0, %1 239 $eax = COPY %2(s32) 240 RET 0, implicit $eax 241 242... 243--- 244name: test_ashr_i32_imm1 245alignment: 4 246legalized: true 247regBankSelected: true 248tracksRegLiveness: true 249registers: 250 - { id: 0, class: gpr, preferred-register: '' } 251 - { id: 1, class: gpr, preferred-register: '' } 252 - { id: 2, class: gpr, preferred-register: '' } 253liveins: 254fixedStack: 255stack: 256constants: 257body: | 258 bb.1 (%ir-block.0): 259 liveins: $edi 260 261 ; ALL-LABEL: name: test_ashr_i32_imm1 262 ; ALL: liveins: $edi 263 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 264 ; ALL: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 1 265 ; ALL: $ecx = COPY [[MOV32ri]] 266 ; ALL: $cl = KILL killed $ecx 267 ; ALL: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def $eflags, implicit $cl 268 ; ALL: $eax = COPY [[SAR32rCL]] 269 ; ALL: RET 0, implicit $eax 270 %0(s32) = COPY $edi 271 %1(s32) = G_CONSTANT i32 1 272 %2(s32) = G_ASHR %0, %1 273 $eax = COPY %2(s32) 274 RET 0, implicit $eax 275 276... 277--- 278name: test_ashr_i16 279alignment: 4 280legalized: true 281regBankSelected: true 282tracksRegLiveness: true 283registers: 284 - { id: 0, class: gpr, preferred-register: '' } 285 - { id: 1, class: gpr, preferred-register: '' } 286 - { id: 2, class: gpr, preferred-register: '' } 287 - { id: 3, class: gpr, preferred-register: '' } 288 - { id: 4, class: gpr, preferred-register: '' } 289liveins: 290fixedStack: 291stack: 292constants: 293body: | 294 bb.1 (%ir-block.0): 295 liveins: $edi, $esi 296 297 ; ALL-LABEL: name: test_ashr_i16 298 ; ALL: liveins: $edi, $esi 299 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 300 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 301 ; ALL: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 302 ; ALL: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY1]].sub_16bit 303 ; ALL: $cx = COPY [[COPY3]] 304 ; ALL: $cl = KILL killed $cx 305 ; ALL: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY2]], implicit-def $eflags, implicit $cl 306 ; ALL: $ax = COPY [[SAR16rCL]] 307 ; ALL: RET 0, implicit $ax 308 %0(s32) = COPY $edi 309 %1(s32) = COPY $esi 310 %2(s16) = G_TRUNC %0(s32) 311 %3(s16) = G_TRUNC %1(s32) 312 %4(s16) = G_ASHR %2, %3 313 $ax = COPY %4(s16) 314 RET 0, implicit $ax 315 316... 317--- 318name: test_ashr_i16_imm 319alignment: 4 320legalized: true 321regBankSelected: true 322tracksRegLiveness: true 323registers: 324 - { id: 0, class: gpr, preferred-register: '' } 325 - { id: 1, class: gpr, preferred-register: '' } 326 - { id: 2, class: gpr, preferred-register: '' } 327 - { id: 3, class: gpr, preferred-register: '' } 328liveins: 329fixedStack: 330stack: 331constants: 332body: | 333 bb.1 (%ir-block.0): 334 liveins: $edi 335 336 ; ALL-LABEL: name: test_ashr_i16_imm 337 ; ALL: liveins: $edi 338 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 339 ; ALL: [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 5 340 ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 341 ; ALL: $cx = COPY [[MOV16ri]] 342 ; ALL: $cl = KILL killed $cx 343 ; ALL: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY1]], implicit-def $eflags, implicit $cl 344 ; ALL: $ax = COPY [[SAR16rCL]] 345 ; ALL: RET 0, implicit $ax 346 %0(s32) = COPY $edi 347 %2(s16) = G_CONSTANT i16 5 348 %1(s16) = G_TRUNC %0(s32) 349 %3(s16) = G_ASHR %1, %2 350 $ax = COPY %3(s16) 351 RET 0, implicit $ax 352 353... 354--- 355name: test_ashr_i16_imm1 356alignment: 4 357legalized: true 358regBankSelected: true 359tracksRegLiveness: true 360registers: 361 - { id: 0, class: gpr, preferred-register: '' } 362 - { id: 1, class: gpr, preferred-register: '' } 363 - { id: 2, class: gpr, preferred-register: '' } 364 - { id: 3, class: gpr, preferred-register: '' } 365liveins: 366fixedStack: 367stack: 368constants: 369body: | 370 bb.1 (%ir-block.0): 371 liveins: $edi 372 373 ; ALL-LABEL: name: test_ashr_i16_imm1 374 ; ALL: liveins: $edi 375 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 376 ; ALL: [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 1 377 ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 378 ; ALL: $cx = COPY [[MOV16ri]] 379 ; ALL: $cl = KILL killed $cx 380 ; ALL: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY1]], implicit-def $eflags, implicit $cl 381 ; ALL: $ax = COPY [[SAR16rCL]] 382 ; ALL: RET 0, implicit $ax 383 %0(s32) = COPY $edi 384 %2(s16) = G_CONSTANT i16 1 385 %1(s16) = G_TRUNC %0(s32) 386 %3(s16) = G_ASHR %1, %2 387 $ax = COPY %3(s16) 388 RET 0, implicit $ax 389 390... 391--- 392name: test_ashr_i8 393alignment: 4 394legalized: true 395regBankSelected: true 396tracksRegLiveness: true 397registers: 398 - { id: 0, class: gpr, preferred-register: '' } 399 - { id: 1, class: gpr, preferred-register: '' } 400 - { id: 2, class: gpr, preferred-register: '' } 401 - { id: 3, class: gpr, preferred-register: '' } 402 - { id: 4, class: gpr, preferred-register: '' } 403liveins: 404fixedStack: 405stack: 406constants: 407body: | 408 bb.1 (%ir-block.0): 409 liveins: $edi, $esi 410 411 ; ALL-LABEL: name: test_ashr_i8 412 ; ALL: liveins: $edi, $esi 413 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 414 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 415 ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 416 ; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 417 ; ALL: $cl = COPY [[COPY3]] 418 ; ALL: [[SAR8rCL:%[0-9]+]]:gr8 = SAR8rCL [[COPY2]], implicit-def $eflags, implicit $cl 419 ; ALL: $al = COPY [[SAR8rCL]] 420 ; ALL: RET 0, implicit $al 421 %0(s32) = COPY $edi 422 %1(s32) = COPY $esi 423 %2(s8) = G_TRUNC %0(s32) 424 %3(s8) = G_TRUNC %1(s32) 425 %4(s8) = G_ASHR %2, %3 426 $al = COPY %4(s8) 427 RET 0, implicit $al 428 429... 430--- 431name: test_ashr_i8_imm 432alignment: 4 433legalized: true 434regBankSelected: true 435tracksRegLiveness: true 436registers: 437 - { id: 0, class: gpr, preferred-register: '' } 438 - { id: 1, class: gpr, preferred-register: '' } 439 - { id: 2, class: gpr, preferred-register: '' } 440 - { id: 3, class: gpr, preferred-register: '' } 441liveins: 442fixedStack: 443stack: 444constants: 445body: | 446 bb.1 (%ir-block.0): 447 liveins: $edi 448 449 ; ALL-LABEL: name: test_ashr_i8_imm 450 ; ALL: liveins: $edi 451 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 452 ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 453 ; ALL: [[SAR8ri:%[0-9]+]]:gr8 = SAR8ri [[COPY1]], 5, implicit-def $eflags 454 ; ALL: $al = COPY [[SAR8ri]] 455 ; ALL: RET 0, implicit $al 456 %0(s32) = COPY $edi 457 %2(s8) = G_CONSTANT i8 5 458 %1(s8) = G_TRUNC %0(s32) 459 %3(s8) = G_ASHR %1, %2 460 $al = COPY %3(s8) 461 RET 0, implicit $al 462 463... 464--- 465name: test_ashr_i8_imm1 466alignment: 4 467legalized: true 468regBankSelected: true 469tracksRegLiveness: true 470registers: 471 - { id: 0, class: gpr, preferred-register: '' } 472 - { id: 1, class: gpr, preferred-register: '' } 473 - { id: 2, class: gpr, preferred-register: '' } 474 - { id: 3, class: gpr, preferred-register: '' } 475liveins: 476fixedStack: 477stack: 478constants: 479body: | 480 bb.1 (%ir-block.0): 481 liveins: $edi 482 483 ; ALL-LABEL: name: test_ashr_i8_imm1 484 ; ALL: liveins: $edi 485 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 486 ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 487 ; ALL: [[SAR8r1_:%[0-9]+]]:gr8 = SAR8r1 [[COPY1]], implicit-def $eflags 488 ; ALL: $al = COPY [[SAR8r1_]] 489 ; ALL: RET 0, implicit $al 490 %0(s32) = COPY $edi 491 %2(s8) = G_CONSTANT i8 1 492 %1(s8) = G_TRUNC %0(s32) 493 %3(s8) = G_ASHR %1, %2 494 $al = COPY %3(s8) 495 RET 0, implicit $al 496 497... 498