1// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a -show-encoding < %s 2> %t | FileCheck %s 2// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s 3 .text 4 5 //AdvSIMD RDMA vector 6 sqrdmlah v0.4h, v1.4h, v2.4h 7 sqrdmlsh v0.4h, v1.4h, v2.4h 8 sqrdmlah v0.2s, v1.2s, v2.2s 9 sqrdmlsh v0.2s, v1.2s, v2.2s 10 sqrdmlah v0.4s, v1.4s, v2.4s 11 sqrdmlsh v0.4s, v1.4s, v2.4s 12 sqrdmlah v0.8h, v1.8h, v2.8h 13 sqrdmlsh v0.8h, v1.8h, v2.8h 14// CHECK: sqrdmlah v0.4h, v1.4h, v2.4h // encoding: [0x20,0x84,0x42,0x2e] 15// CHECK: sqrdmlsh v0.4h, v1.4h, v2.4h // encoding: [0x20,0x8c,0x42,0x2e] 16// CHECK: sqrdmlah v0.2s, v1.2s, v2.2s // encoding: [0x20,0x84,0x82,0x2e] 17// CHECK: sqrdmlsh v0.2s, v1.2s, v2.2s // encoding: [0x20,0x8c,0x82,0x2e] 18// CHECK: sqrdmlah v0.4s, v1.4s, v2.4s // encoding: [0x20,0x84,0x82,0x6e] 19// CHECK: sqrdmlsh v0.4s, v1.4s, v2.4s // encoding: [0x20,0x8c,0x82,0x6e] 20// CHECK: sqrdmlah v0.8h, v1.8h, v2.8h // encoding: [0x20,0x84,0x42,0x6e] 21// CHECK: sqrdmlsh v0.8h, v1.8h, v2.8h // encoding: [0x20,0x8c,0x42,0x6e] 22 23 sqrdmlah v0.2h, v1.2h, v2.2h 24// CHECK-ERROR: [[@LINE-1]]:12: error: invalid operand for instruction 25 sqrdmlsh v0.2h, v1.2h, v2.2h 26// CHECK-ERROR: [[@LINE-1]]:12: error: invalid operand for instruction 27 sqrdmlah v0.8s, v1.8s, v2.8s 28// CHECK-ERROR: [[@LINE-1]]:12: error: invalid vector kind qualifier 29// CHECK-ERROR: [[@LINE-2]]:19: error: invalid vector kind qualifier 30// CHECK-ERROR: [[@LINE-3]]:26: error: invalid vector kind qualifier 31 sqrdmlsh v0.8s, v1.8s, v2.8s 32// CHECK-ERROR: [[@LINE-1]]:12: error: invalid vector kind qualifier 33// CHECK-ERROR: [[@LINE-2]]:19: error: invalid vector kind qualifier 34// CHECK-ERROR: [[@LINE-3]]:26: error: invalid vector kind qualifier 35 sqrdmlah v0.2s, v1.4h, v2.8h 36// CHECK-ERROR: [[@LINE-1]]:19: error: invalid operand for instruction 37 sqrdmlsh v0.4s, v1.8h, v2.2s 38// CHECK-ERROR: [[@LINE-1]]:19: error: invalid operand for instruction 39 40 //AdvSIMD RDMA scalar 41 sqrdmlah h0, h1, h2 42 sqrdmlsh h0, h1, h2 43 sqrdmlah s0, s1, s2 44 sqrdmlsh s0, s1, s2 45// CHECK: sqrdmlah h0, h1, h2 // encoding: [0x20,0x84,0x42,0x7e] 46// CHECK: sqrdmlsh h0, h1, h2 // encoding: [0x20,0x8c,0x42,0x7e] 47// CHECK: sqrdmlah s0, s1, s2 // encoding: [0x20,0x84,0x82,0x7e] 48// CHECK: sqrdmlsh s0, s1, s2 // encoding: [0x20,0x8c,0x82,0x7e] 49 50 //AdvSIMD RDMA vector by-element 51 sqrdmlah v0.4h, v1.4h, v2.h[3] 52 sqrdmlsh v0.4h, v1.4h, v2.h[3] 53 sqrdmlah v0.2s, v1.2s, v2.s[1] 54 sqrdmlsh v0.2s, v1.2s, v2.s[1] 55 sqrdmlah v0.8h, v1.8h, v2.h[3] 56 sqrdmlsh v0.8h, v1.8h, v2.h[3] 57 sqrdmlah v0.4s, v1.4s, v2.s[3] 58 sqrdmlsh v0.4s, v1.4s, v2.s[3] 59// CHECK: sqrdmlah v0.4h, v1.4h, v2.h[3] // encoding: [0x20,0xd0,0x72,0x2f] 60// CHECK: sqrdmlsh v0.4h, v1.4h, v2.h[3] // encoding: [0x20,0xf0,0x72,0x2f] 61// CHECK: sqrdmlah v0.2s, v1.2s, v2.s[1] // encoding: [0x20,0xd0,0xa2,0x2f] 62// CHECK: sqrdmlsh v0.2s, v1.2s, v2.s[1] // encoding: [0x20,0xf0,0xa2,0x2f] 63// CHECK: sqrdmlah v0.8h, v1.8h, v2.h[3] // encoding: [0x20,0xd0,0x72,0x6f] 64// CHECK: sqrdmlsh v0.8h, v1.8h, v2.h[3] // encoding: [0x20,0xf0,0x72,0x6f] 65// CHECK: sqrdmlah v0.4s, v1.4s, v2.s[3] // encoding: [0x20,0xd8,0xa2,0x6f] 66// CHECK: sqrdmlsh v0.4s, v1.4s, v2.s[3] // encoding: [0x20,0xf8,0xa2,0x6f] 67 68 sqrdmlah v0.4s, v1.2s, v2.s[1] 69 sqrdmlsh v0.2s, v1.2d, v2.s[1] 70 sqrdmlah v0.8h, v1.8h, v2.s[3] 71 sqrdmlsh v0.8h, v1.8h, v2.h[8] 72// CHECK-ERROR: error: invalid operand for instruction 73// CHECK-ERROR: sqrdmlah v0.4s, v1.2s, v2.s[1] 74// CHECK-ERROR: ^ 75// CHECK-ERROR: error: invalid operand for instruction 76// CHECK-ERROR: sqrdmlsh v0.2s, v1.2d, v2.s[1] 77// CHECK-ERROR: ^ 78// CHECK-ERROR: error: invalid operand for instruction 79// CHECK-ERROR: sqrdmlah v0.8h, v1.8h, v2.s[3] 80// CHECK-ERROR: ^ 81// CHECK-ERROR: error: vector lane must be an integer in range [0, 7]. 82// CHECK-ERROR: sqrdmlsh v0.8h, v1.8h, v2.h[8] 83// CHECK-ERROR: ^ 84 85 //AdvSIMD RDMA scalar by-element 86 sqrdmlah h0, h1, v2.h[3] 87 sqrdmlsh h0, h1, v2.h[3] 88 sqrdmlah s0, s1, v2.s[3] 89 sqrdmlsh s0, s1, v2.s[3] 90// CHECK: sqrdmlah h0, h1, v2.h[3] // encoding: [0x20,0xd0,0x72,0x7f] 91// CHECK: sqrdmlsh h0, h1, v2.h[3] // encoding: [0x20,0xf0,0x72,0x7f] 92// CHECK: sqrdmlah s0, s1, v2.s[3] // encoding: [0x20,0xd8,0xa2,0x7f] 93// CHECK: sqrdmlsh s0, s1, v2.s[3] // encoding: [0x20,0xf8,0xa2,0x7f] 94 95 sqrdmlah b0, h1, v2.h[3] 96 sqrdmlah s0, d1, v2.s[3] 97 sqrdmlsh h0, h1, v2.s[3] 98 sqrdmlsh s0, s1, v2.s[4] 99// CHECK-ERROR: error: invalid operand for instruction 100// CHECK-ERROR: sqrdmlah b0, h1, v2.h[3] 101// CHECK-ERROR: ^ 102// CHECK-ERROR: error: invalid operand for instruction 103// CHECK-ERROR: sqrdmlah s0, d1, v2.s[3] 104// CHECK-ERROR: ^ 105// CHECK-ERROR: error: invalid operand for instruction 106// CHECK-ERROR: sqrdmlsh h0, h1, v2.s[3] 107// CHECK-ERROR: ^ 108// CHECK-ERROR: error: vector lane must be an integer in range [0, 3]. 109// CHECK-ERROR: sqrdmlsh s0, s1, v2.s[4] 110// CHECK-ERROR: ^ 111