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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2007 Michal Simek
4  * (C) Copyright 2004 Atmark Techno, Inc.
5  *
6  * Michal  SIMEK <monstr@monstr.eu>
7  * Yasushi SHOJI <yashi@atmark-techno.com>
8  */
9 
10 #include <common.h>
11 #include <command.h>
12 #include <fdtdec.h>
13 #include <malloc.h>
14 #include <asm/microblaze_intc.h>
15 #include <asm/asm.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
enable_interrupts(void)19 void enable_interrupts(void)
20 {
21 	debug("Enable interrupts for the whole CPU\n");
22 	MSRSET(0x2);
23 }
24 
disable_interrupts(void)25 int disable_interrupts(void)
26 {
27 	unsigned int msr;
28 
29 	MFS(msr, rmsr);
30 	MSRCLR(0x2);
31 	return (msr & 0x2) != 0;
32 }
33 
34 static struct irq_action *vecs;
35 static u32 irq_no;
36 
37 /* mapping structure to interrupt controller */
38 microblaze_intc_t *intc;
39 
40 /* default handler */
def_hdlr(void)41 static void def_hdlr(void)
42 {
43 	puts("def_hdlr\n");
44 }
45 
enable_one_interrupt(int irq)46 static void enable_one_interrupt(int irq)
47 {
48 	int mask;
49 	int offset = 1;
50 
51 	offset <<= irq;
52 	mask = intc->ier;
53 	intc->ier = (mask | offset);
54 
55 	debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
56 	      intc->ier);
57 	debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
58 	      intc->iar, intc->mer);
59 }
60 
disable_one_interrupt(int irq)61 static void disable_one_interrupt(int irq)
62 {
63 	int mask;
64 	int offset = 1;
65 
66 	offset <<= irq;
67 	mask = intc->ier;
68 	intc->ier = (mask & ~offset);
69 
70 	debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
71 	      intc->ier);
72 	debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
73 	      intc->iar, intc->mer);
74 }
75 
install_interrupt_handler(int irq,interrupt_handler_t * hdlr,void * arg)76 int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)
77 {
78 	struct irq_action *act;
79 
80 	/* irq out of range */
81 	if ((irq < 0) || (irq > irq_no)) {
82 		puts("IRQ out of range\n");
83 		return -1;
84 	}
85 	act = &vecs[irq];
86 	if (hdlr) {		/* enable */
87 		act->handler = hdlr;
88 		act->arg = arg;
89 		act->count = 0;
90 		enable_one_interrupt(irq);
91 		return 0;
92 	}
93 
94 	/* Disable */
95 	act->handler = (interrupt_handler_t *)def_hdlr;
96 	act->arg = (void *)irq;
97 	disable_one_interrupt(irq);
98 	return 1;
99 }
100 
101 /* initialization interrupt controller - hardware */
intc_init(void)102 static void intc_init(void)
103 {
104 	intc->mer = 0;
105 	intc->ier = 0;
106 	intc->iar = 0xFFFFFFFF;
107 	/* XIntc_Start - hw_interrupt enable and all interrupt enable */
108 	intc->mer = 0x3;
109 
110 	debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
111 	      intc->iar, intc->mer);
112 }
113 
interrupt_init(void)114 int interrupt_init(void)
115 {
116 	int i;
117 	const void *blob = gd->fdt_blob;
118 	int node = 0;
119 
120 	debug("INTC: Initialization\n");
121 
122 	node = fdt_node_offset_by_compatible(blob, node,
123 				"xlnx,xps-intc-1.00.a");
124 	if (node != -1) {
125 		fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
126 		if (base == FDT_ADDR_T_NONE)
127 			return -1;
128 
129 		debug("INTC: Base addr %lx\n", base);
130 		intc = (microblaze_intc_t *)base;
131 		irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0);
132 		debug("INTC: IRQ NO %x\n", irq_no);
133 	} else {
134 		return node;
135 	}
136 
137 	if (irq_no) {
138 		vecs = calloc(1, sizeof(struct irq_action) * irq_no);
139 		if (vecs == NULL) {
140 			puts("Interrupt vector allocation failed\n");
141 			return -1;
142 		}
143 
144 		/* initialize irq list */
145 		for (i = 0; i < irq_no; i++) {
146 			vecs[i].handler = (interrupt_handler_t *)def_hdlr;
147 			vecs[i].arg = (void *)i;
148 			vecs[i].count = 0;
149 		}
150 		/* initialize intc controller */
151 		intc_init();
152 		enable_interrupts();
153 	} else {
154 		puts("Undefined interrupt controller\n");
155 	}
156 	return 0;
157 }
158 
interrupt_handler(void)159 void interrupt_handler(void)
160 {
161 	int irqs = intc->ivr;	/* find active interrupt */
162 	int mask = 1;
163 	int value;
164 	struct irq_action *act = vecs + irqs;
165 
166 	debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
167 	      intc->iar, intc->mer);
168 #ifdef DEBUG
169 	R14(value);
170 #endif
171 	debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
172 
173 	debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
174 	      (u32)act->handler, act->count, (u32)act->arg);
175 	act->handler(act->arg);
176 	act->count++;
177 
178 	intc->iar = mask << irqs;
179 
180 	debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
181 	      intc->ier, intc->iar, intc->mer);
182 #ifdef DEBUG
183 	R14(value);
184 #endif
185 	debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
186 }
187 
188 #if defined(CONFIG_CMD_IRQ)
do_irqinfo(cmd_tbl_t * cmdtp,int flag,int argc,const char * argv[])189 int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, const char *argv[])
190 {
191 	int i;
192 	struct irq_action *act = vecs;
193 
194 	if (irq_no) {
195 		puts("\nInterrupt-Information:\n\n"
196 		      "Nr  Routine   Arg       Count\n"
197 		      "-----------------------------\n");
198 
199 		for (i = 0; i < irq_no; i++) {
200 			if (act->handler != (interrupt_handler_t *)def_hdlr) {
201 				printf("%02d  %08x  %08x  %d\n", i,
202 				       (int)act->handler, (int)act->arg,
203 				       act->count);
204 			}
205 			act++;
206 		}
207 		puts("\n");
208 	} else {
209 		puts("Undefined interrupt controller\n");
210 	}
211 	return 0;
212 }
213 #endif
214