1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2009 Wind River Systems, Inc.
4 * Tom Rix <Tom.Rix at windriver.com>
5 *
6 * twl4030_power_reset_init is derived from code on omapzoom,
7 * git://git.omapzoom.com/repo/u-boot.git
8 *
9 * Copyright (C) 2007-2009 Texas Instruments, Inc.
10 *
11 * twl4030_power_init is from cpu/omap3/common.c, power_init_r
12 *
13 * (C) Copyright 2004-2008
14 * Texas Instruments, <www.ti.com>
15 *
16 * Author :
17 * Sunil Kumar <sunilsaini05 at gmail.com>
18 * Shashi Ranjan <shashiranjanmca05 at gmail.com>
19 *
20 * Derived from Beagle Board and 3430 SDP code by
21 * Richard Woodruff <r-woodruff2 at ti.com>
22 * Syed Mohammed Khasim <khasim at ti.com>
23 */
24
25 #include <twl4030.h>
26
27 /*
28 * Power Reset
29 */
twl4030_power_reset_init(void)30 void twl4030_power_reset_init(void)
31 {
32 u8 val = 0;
33 if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
34 TWL4030_PM_MASTER_P1_SW_EVENTS, &val)) {
35 printf("Error:TWL4030: failed to read the power register\n");
36 printf("Could not initialize hardware reset\n");
37 } else {
38 val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON;
39 if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
40 TWL4030_PM_MASTER_P1_SW_EVENTS, val)) {
41 printf("Error:TWL4030: failed to write the power register\n");
42 printf("Could not initialize hardware reset\n");
43 }
44 }
45 }
46
47 /*
48 * Power off
49 */
twl4030_power_off(void)50 void twl4030_power_off(void)
51 {
52 u8 data;
53
54 /* PM master unlock (CFG and TST keys) */
55
56 data = 0xCE;
57 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
58 TWL4030_PM_MASTER_PROTECT_KEY, data);
59 data = 0xEC;
60 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
61 TWL4030_PM_MASTER_PROTECT_KEY, data);
62
63 /* VBAT start disable */
64
65 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
66 TWL4030_PM_MASTER_CFG_P1_TRANSITION, &data);
67 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
68 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
69 TWL4030_PM_MASTER_CFG_P1_TRANSITION, data);
70
71 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
72 TWL4030_PM_MASTER_CFG_P2_TRANSITION, &data);
73 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
74 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
75 TWL4030_PM_MASTER_CFG_P2_TRANSITION, data);
76
77 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
78 TWL4030_PM_MASTER_CFG_P3_TRANSITION, &data);
79 data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
80 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
81 TWL4030_PM_MASTER_CFG_P3_TRANSITION, data);
82
83 /* High jitter for PWRANA2 */
84
85 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
86 TWL4030_PM_MASTER_CFG_PWRANA2, &data);
87 data &= ~(TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV |
88 TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV);
89 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
90 TWL4030_PM_MASTER_CFG_PWRANA2, data);
91
92 /* PM master lock */
93
94 data = 0xFF;
95 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
96 TWL4030_PM_MASTER_PROTECT_KEY, data);
97
98 /* Power off */
99
100 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
101 TWL4030_PM_MASTER_P1_SW_EVENTS, &data);
102 data |= TWL4030_PM_MASTER_SW_EVENTS_DEVOFF;
103 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
104 TWL4030_PM_MASTER_P1_SW_EVENTS, data);
105 }
106
107 /*
108 * Set Device Group and Voltage
109 */
twl4030_pmrecv_vsel_cfg(u8 vsel_reg,u8 vsel_val,u8 dev_grp,u8 dev_grp_sel)110 void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
111 u8 dev_grp, u8 dev_grp_sel)
112 {
113 int ret;
114
115 /* Select the Voltage */
116 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg,
117 vsel_val);
118 if (ret != 0) {
119 printf("Could not write vsel to reg %02x (%d)\n",
120 vsel_reg, ret);
121 return;
122 }
123
124 /* Select the Device Group (enable the supply if dev_grp_sel != 0) */
125 ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp,
126 dev_grp_sel);
127 if (ret != 0)
128 printf("Could not write grp_sel to reg %02x (%d)\n",
129 dev_grp, ret);
130 }
131
twl4030_power_init(void)132 void twl4030_power_init(void)
133 {
134 /* set VAUX3 to 2.8V */
135 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED,
136 TWL4030_PM_RECEIVER_VAUX3_VSEL_28,
137 TWL4030_PM_RECEIVER_VAUX3_DEV_GRP,
138 TWL4030_PM_RECEIVER_DEV_GRP_P1);
139
140 /* set VPLL2 to 1.8V */
141 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED,
142 TWL4030_PM_RECEIVER_VPLL2_VSEL_18,
143 TWL4030_PM_RECEIVER_VPLL2_DEV_GRP,
144 TWL4030_PM_RECEIVER_DEV_GRP_ALL);
145
146 /* set VDAC to 1.8V */
147 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED,
148 TWL4030_PM_RECEIVER_VDAC_VSEL_18,
149 TWL4030_PM_RECEIVER_VDAC_DEV_GRP,
150 TWL4030_PM_RECEIVER_DEV_GRP_P1);
151 }
152
twl4030_power_mmc_init(int dev_index)153 void twl4030_power_mmc_init(int dev_index)
154 {
155 if (dev_index == 0) {
156 /* Set VMMC1 to 3.15 Volts */
157 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
158 TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
159 TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
160 TWL4030_PM_RECEIVER_DEV_GRP_P1);
161
162 mdelay(100); /* ramp-up delay from Linux code */
163 } else if (dev_index == 1) {
164 /* Set VMMC2 to 3.15 Volts */
165 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
166 TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
167 TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
168 TWL4030_PM_RECEIVER_DEV_GRP_P1);
169
170 mdelay(100); /* ramp-up delay from Linux code */
171 }
172 }
173
174 #ifdef CONFIG_CMD_POWEROFF
do_poweroff(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])175 int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
176 {
177 twl4030_power_off();
178
179 return 0;
180 }
181 #endif
182