1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2012 Samsung Electronics
4 *
5 * Author: Donghwa Lee <dh09.lee@samsung.com>
6 */
7
8 #include <common.h>
9 #include <asm/arch/mipi_dsim.h>
10
11 #include "exynos/exynos_mipi_dsi_lowlevel.h"
12 #include "exynos/exynos_mipi_dsi_common.h"
13
s6e8ax0_panel_cond(struct mipi_dsim_device * dsim_dev)14 static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
15 {
16 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
17 int reverse = dsim_dev->dsim_lcd_dev->reverse_panel;
18 static const unsigned char data_to_send[] = {
19 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
20 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
21 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
22 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
23 0xff, 0xff, 0xc8
24 };
25
26 static const unsigned char data_to_send_reverse[] = {
27 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
28 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
29 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
30 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
31 0xf6, 0xf6, 0xc1
32 };
33
34 if (reverse) {
35 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
36 data_to_send_reverse,
37 ARRAY_SIZE(data_to_send_reverse));
38 } else {
39 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
40 data_to_send, ARRAY_SIZE(data_to_send));
41 }
42 }
43
s6e8ax0_display_cond(struct mipi_dsim_device * dsim_dev)44 static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
45 {
46 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
47 static const unsigned char data_to_send[] = {
48 0xf2, 0x80, 0x03, 0x0d
49 };
50
51 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
52 data_to_send, ARRAY_SIZE(data_to_send));
53 }
54
s6e8ax0_gamma_cond(struct mipi_dsim_device * dsim_dev)55 static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
56 {
57 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
58 /* 7500K 2.2 Set : 30cd */
59 static const unsigned char data_to_send[] = {
60 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
61 0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
62 0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
63 };
64
65 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
66 data_to_send, ARRAY_SIZE(data_to_send));
67 }
68
s6e8ax0_gamma_update(struct mipi_dsim_device * dsim_dev)69 static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
70 {
71 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
72 static const unsigned char data_to_send[] = {
73 0xf7, 0x03
74 };
75
76 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
77 ARRAY_SIZE(data_to_send));
78 }
79
s6e8ax0_etc_source_control(struct mipi_dsim_device * dsim_dev)80 static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
81 {
82 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
83 static const unsigned char data_to_send[] = {
84 0xf6, 0x00, 0x02, 0x00
85 };
86
87 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
88 data_to_send, ARRAY_SIZE(data_to_send));
89 }
90
s6e8ax0_etc_pentile_control(struct mipi_dsim_device * dsim_dev)91 static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
92 {
93 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
94 static const unsigned char data_to_send[] = {
95 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
96 0x00
97 };
98
99 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
100 data_to_send, ARRAY_SIZE(data_to_send));
101 }
102
s6e8ax0_etc_mipi_control1(struct mipi_dsim_device * dsim_dev)103 static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
104 {
105 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
106 static const unsigned char data_to_send[] = {
107 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
108 };
109
110 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
111 data_to_send, ARRAY_SIZE(data_to_send));
112 }
113
s6e8ax0_etc_mipi_control2(struct mipi_dsim_device * dsim_dev)114 static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
115 {
116 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
117 static const unsigned char data_to_send[] = {
118 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
119 };
120
121 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
122 data_to_send, ARRAY_SIZE(data_to_send));
123 }
124
s6e8ax0_etc_power_control(struct mipi_dsim_device * dsim_dev)125 static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
126 {
127 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
128 static const unsigned char data_to_send[] = {
129 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
130 };
131
132 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
133 data_to_send, ARRAY_SIZE(data_to_send));
134 }
135
s6e8ax0_etc_mipi_control3(struct mipi_dsim_device * dsim_dev)136 static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
137 {
138 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
139 static const unsigned char data_to_send[] = {
140 0xe3, 0x40
141 };
142
143 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
144 ARRAY_SIZE(data_to_send));
145 }
146
s6e8ax0_etc_mipi_control4(struct mipi_dsim_device * dsim_dev)147 static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
148 {
149 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
150 static const unsigned char data_to_send[] = {
151 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
152 };
153
154 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
155 data_to_send, ARRAY_SIZE(data_to_send));
156 }
157
s6e8ax0_elvss_set(struct mipi_dsim_device * dsim_dev)158 static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
159 {
160 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
161 static const unsigned char data_to_send[] = {
162 0xb1, 0x04, 0x00
163 };
164
165 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
166 data_to_send, ARRAY_SIZE(data_to_send));
167 }
168
s6e8ax0_display_on(struct mipi_dsim_device * dsim_dev)169 static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
170 {
171 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
172 static const unsigned char data_to_send[] = {
173 0x29, 0x00
174 };
175
176 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
177 ARRAY_SIZE(data_to_send));
178 }
179
s6e8ax0_sleep_out(struct mipi_dsim_device * dsim_dev)180 static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
181 {
182 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
183 static const unsigned char data_to_send[] = {
184 0x11, 0x00
185 };
186
187 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
188 ARRAY_SIZE(data_to_send));
189 }
190
s6e8ax0_apply_level1_key(struct mipi_dsim_device * dsim_dev)191 static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
192 {
193 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
194 static const unsigned char data_to_send[] = {
195 0xf0, 0x5a, 0x5a
196 };
197
198 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
199 data_to_send, ARRAY_SIZE(data_to_send));
200 }
201
s6e8ax0_apply_mtp_key(struct mipi_dsim_device * dsim_dev)202 static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
203 {
204 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
205 static const unsigned char data_to_send[] = {
206 0xf1, 0x5a, 0x5a
207 };
208
209 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
210 data_to_send, ARRAY_SIZE(data_to_send));
211 }
212
s6e8ax0_panel_init(struct mipi_dsim_device * dsim_dev)213 static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
214 {
215 /*
216 * in case of setting gamma and panel condition at first,
217 * it shuold be setting like below.
218 * set_gamma() -> set_panel_condition()
219 */
220
221 s6e8ax0_apply_level1_key(dsim_dev);
222 s6e8ax0_apply_mtp_key(dsim_dev);
223
224 s6e8ax0_sleep_out(dsim_dev);
225 mdelay(5);
226 s6e8ax0_panel_cond(dsim_dev);
227 s6e8ax0_display_cond(dsim_dev);
228 s6e8ax0_gamma_cond(dsim_dev);
229 s6e8ax0_gamma_update(dsim_dev);
230
231 s6e8ax0_etc_source_control(dsim_dev);
232 s6e8ax0_elvss_set(dsim_dev);
233 s6e8ax0_etc_pentile_control(dsim_dev);
234 s6e8ax0_etc_mipi_control1(dsim_dev);
235 s6e8ax0_etc_mipi_control2(dsim_dev);
236 s6e8ax0_etc_power_control(dsim_dev);
237 s6e8ax0_etc_mipi_control3(dsim_dev);
238 s6e8ax0_etc_mipi_control4(dsim_dev);
239 }
240
s6e8ax0_panel_set(struct mipi_dsim_device * dsim_dev)241 static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
242 {
243 s6e8ax0_panel_init(dsim_dev);
244
245 return 0;
246 }
247
s6e8ax0_display_enable(struct mipi_dsim_device * dsim_dev)248 static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
249 {
250 s6e8ax0_display_on(dsim_dev);
251 }
252
253 static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
254 .name = "s6e8ax0",
255 .id = -1,
256
257 .mipi_panel_init = s6e8ax0_panel_set,
258 .mipi_display_on = s6e8ax0_display_enable,
259 };
260
s6e8ax0_init(void)261 void s6e8ax0_init(void)
262 {
263 exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
264 }
265