1 #ifndef __UAPI_MSM_GEMINI_H 2 #define __UAPI_MSM_GEMINI_H 3 4 #include <linux/types.h> 5 #include <linux/ioctl.h> 6 7 #define MSM_GMN_IOCTL_MAGIC 'g' 8 9 #define MSM_GMN_IOCTL_GET_HW_VERSION \ 10 _IOW(MSM_GMN_IOCTL_MAGIC, 1, struct msm_gemini_hw_cmd *) 11 12 #define MSM_GMN_IOCTL_RESET \ 13 _IOW(MSM_GMN_IOCTL_MAGIC, 2, struct msm_gemini_ctrl_cmd *) 14 15 #define MSM_GMN_IOCTL_STOP \ 16 _IOW(MSM_GMN_IOCTL_MAGIC, 3, struct msm_gemini_hw_cmds *) 17 18 #define MSM_GMN_IOCTL_START \ 19 _IOW(MSM_GMN_IOCTL_MAGIC, 4, struct msm_gemini_hw_cmds *) 20 21 #define MSM_GMN_IOCTL_INPUT_BUF_ENQUEUE \ 22 _IOW(MSM_GMN_IOCTL_MAGIC, 5, struct msm_gemini_buf *) 23 24 #define MSM_GMN_IOCTL_INPUT_GET \ 25 _IOW(MSM_GMN_IOCTL_MAGIC, 6, struct msm_gemini_buf *) 26 27 #define MSM_GMN_IOCTL_INPUT_GET_UNBLOCK \ 28 _IOW(MSM_GMN_IOCTL_MAGIC, 7, int) 29 30 #define MSM_GMN_IOCTL_OUTPUT_BUF_ENQUEUE \ 31 _IOW(MSM_GMN_IOCTL_MAGIC, 8, struct msm_gemini_buf *) 32 33 #define MSM_GMN_IOCTL_OUTPUT_GET \ 34 _IOW(MSM_GMN_IOCTL_MAGIC, 9, struct msm_gemini_buf *) 35 36 #define MSM_GMN_IOCTL_OUTPUT_GET_UNBLOCK \ 37 _IOW(MSM_GMN_IOCTL_MAGIC, 10, int) 38 39 #define MSM_GMN_IOCTL_EVT_GET \ 40 _IOW(MSM_GMN_IOCTL_MAGIC, 11, struct msm_gemini_ctrl_cmd *) 41 42 #define MSM_GMN_IOCTL_EVT_GET_UNBLOCK \ 43 _IOW(MSM_GMN_IOCTL_MAGIC, 12, int) 44 45 #define MSM_GMN_IOCTL_HW_CMD \ 46 _IOW(MSM_GMN_IOCTL_MAGIC, 13, struct msm_gemini_hw_cmd *) 47 48 #define MSM_GMN_IOCTL_HW_CMDS \ 49 _IOW(MSM_GMN_IOCTL_MAGIC, 14, struct msm_gemini_hw_cmds *) 50 51 #define MSM_GMN_IOCTL_TEST_DUMP_REGION \ 52 _IOW(MSM_GMN_IOCTL_MAGIC, 15, unsigned long) 53 54 #define MSM_GMN_IOCTL_SET_MODE \ 55 _IOW(MSM_GMN_IOCTL_MAGIC, 16, enum msm_gmn_out_mode) 56 57 #define MSM_GEMINI_MODE_REALTIME_ENCODE 0 58 #define MSM_GEMINI_MODE_OFFLINE_ENCODE 1 59 #define MSM_GEMINI_MODE_REALTIME_ROTATION 2 60 #define MSM_GEMINI_MODE_OFFLINE_ROTATION 3 61 62 enum msm_gmn_out_mode { 63 MSM_GMN_OUTMODE_FRAGMENTED, 64 MSM_GMN_OUTMODE_SINGLE 65 }; 66 67 struct msm_gemini_ctrl_cmd { 68 uint32_t type; 69 uint32_t len; 70 void *value; 71 }; 72 73 #define MSM_GEMINI_EVT_RESET 0 74 #define MSM_GEMINI_EVT_FRAMEDONE 1 75 #define MSM_GEMINI_EVT_ERR 2 76 77 struct msm_gemini_buf { 78 uint32_t type; 79 int fd; 80 81 void *vaddr; 82 83 uint32_t y_off; 84 uint32_t y_len; 85 uint32_t framedone_len; 86 87 uint32_t cbcr_off; 88 uint32_t cbcr_len; 89 90 uint32_t num_of_mcu_rows; 91 uint32_t offset; 92 }; 93 94 #define MSM_GEMINI_HW_CMD_TYPE_READ 0 95 #define MSM_GEMINI_HW_CMD_TYPE_WRITE 1 96 #define MSM_GEMINI_HW_CMD_TYPE_WRITE_OR 2 97 #define MSM_GEMINI_HW_CMD_TYPE_UWAIT 3 98 #define MSM_GEMINI_HW_CMD_TYPE_MWAIT 4 99 #define MSM_GEMINI_HW_CMD_TYPE_MDELAY 5 100 #define MSM_GEMINI_HW_CMD_TYPE_UDELAY 6 101 struct msm_gemini_hw_cmd { 102 103 uint32_t type:4; 104 105 /* n microseconds of timeout for WAIT */ 106 /* n microseconds of time for DELAY */ 107 /* repeat n times for READ/WRITE */ 108 /* max is 0xFFF, 4095 */ 109 uint32_t n:12; 110 uint32_t offset:16; 111 uint32_t mask; 112 union { 113 uint32_t data; /* for single READ/WRITE/WAIT, n = 1 */ 114 uint32_t *pdata; /* for multiple READ/WRITE/WAIT, n > 1 */ 115 }; 116 }; 117 118 struct msm_gemini_hw_cmds { 119 uint32_t m; /* number of elements in the hw_cmd array */ 120 struct msm_gemini_hw_cmd hw_cmd[1]; 121 }; 122 123 #endif /* __UAPI_MSM_GEMINI_H */ 124