• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /******************************************************************************
2  *
3  *  Copyright 1999-2012 Broadcom Corporation
4  *
5  *  Licensed under the Apache License, Version 2.0 (the "License");
6  *  you may not use this file except in compliance with the License.
7  *  You may obtain a copy of the License at:
8  *
9  *  http://www.apache.org/licenses/LICENSE-2.0
10  *
11  *  Unless required by applicable law or agreed to in writing, software
12  *  distributed under the License is distributed on an "AS IS" BASIS,
13  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  *  See the License for the specific language governing permissions and
15  *  limitations under the License.
16  *
17  ******************************************************************************/
18 
19 /******************************************************************************
20  *
21  *  This file contains function of the HCIC unit to format and send HCI
22  *  commands.
23  *
24  ******************************************************************************/
25 
26 #include "bt_common.h"
27 #include "bt_target.h"
28 #include "btu.h"
29 #include "hcidefs.h"
30 #include "hcimsgs.h"
31 
32 #include <stddef.h>
33 #include <string.h>
34 
35 #include "btm_int.h" /* Included for UIPC_* macro definitions */
36 
btsnd_hcic_inquiry(const LAP inq_lap,uint8_t duration,uint8_t response_cnt)37 void btsnd_hcic_inquiry(const LAP inq_lap, uint8_t duration,
38                         uint8_t response_cnt) {
39   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
40   uint8_t* pp = (uint8_t*)(p + 1);
41 
42   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_INQUIRY;
43   p->offset = 0;
44 
45   UINT16_TO_STREAM(pp, HCI_INQUIRY);
46   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_INQUIRY);
47 
48   LAP_TO_STREAM(pp, inq_lap);
49   UINT8_TO_STREAM(pp, duration);
50   UINT8_TO_STREAM(pp, response_cnt);
51 
52   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
53 }
54 
btsnd_hcic_inq_cancel(void)55 void btsnd_hcic_inq_cancel(void) {
56   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
57   uint8_t* pp = (uint8_t*)(p + 1);
58 
59   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_INQ_CANCEL;
60   p->offset = 0;
61   UINT16_TO_STREAM(pp, HCI_INQUIRY_CANCEL);
62   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_INQ_CANCEL);
63 
64   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
65 }
66 
btsnd_hcic_per_inq_mode(uint16_t max_period,uint16_t min_period,const LAP inq_lap,uint8_t duration,uint8_t response_cnt)67 void btsnd_hcic_per_inq_mode(uint16_t max_period, uint16_t min_period,
68                              const LAP inq_lap, uint8_t duration,
69                              uint8_t response_cnt) {
70   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
71   uint8_t* pp = (uint8_t*)(p + 1);
72 
73   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PER_INQ_MODE;
74   p->offset = 0;
75 
76   UINT16_TO_STREAM(pp, HCI_PERIODIC_INQUIRY_MODE);
77   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PER_INQ_MODE);
78 
79   UINT16_TO_STREAM(pp, max_period);
80   UINT16_TO_STREAM(pp, min_period);
81   LAP_TO_STREAM(pp, inq_lap);
82   UINT8_TO_STREAM(pp, duration);
83   UINT8_TO_STREAM(pp, response_cnt);
84 
85   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
86 }
87 
btsnd_hcic_exit_per_inq(void)88 void btsnd_hcic_exit_per_inq(void) {
89   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
90   uint8_t* pp = (uint8_t*)(p + 1);
91 
92   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_EXIT_PER_INQ;
93   p->offset = 0;
94   UINT16_TO_STREAM(pp, HCI_EXIT_PERIODIC_INQUIRY_MODE);
95   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_EXIT_PER_INQ);
96 
97   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
98 }
99 
btsnd_hcic_create_conn(const RawAddress & dest,uint16_t packet_types,uint8_t page_scan_rep_mode,uint8_t page_scan_mode,uint16_t clock_offset,uint8_t allow_switch)100 void btsnd_hcic_create_conn(const RawAddress& dest, uint16_t packet_types,
101                             uint8_t page_scan_rep_mode, uint8_t page_scan_mode,
102                             uint16_t clock_offset, uint8_t allow_switch) {
103   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
104   uint8_t* pp = (uint8_t*)(p + 1);
105 
106 #ifndef BT_10A
107   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN;
108 #else
109   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN - 1;
110 #endif
111   p->offset = 0;
112 
113   UINT16_TO_STREAM(pp, HCI_CREATE_CONNECTION);
114 #ifndef BT_10A
115   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CREATE_CONN);
116 #else
117   UINT8_TO_STREAM(pp, (HCIC_PARAM_SIZE_CREATE_CONN - 1));
118 #endif
119   BDADDR_TO_STREAM(pp, dest);
120   UINT16_TO_STREAM(pp, packet_types);
121   UINT8_TO_STREAM(pp, page_scan_rep_mode);
122   UINT8_TO_STREAM(pp, page_scan_mode);
123   UINT16_TO_STREAM(pp, clock_offset);
124 #if !defined(BT_10A)
125   UINT8_TO_STREAM(pp, allow_switch);
126 #endif
127   btm_acl_paging(p, dest);
128 }
129 
btsnd_hcic_disconnect(uint16_t handle,uint8_t reason)130 void btsnd_hcic_disconnect(uint16_t handle, uint8_t reason) {
131   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
132   uint8_t* pp = (uint8_t*)(p + 1);
133 
134   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_DISCONNECT;
135   p->offset = 0;
136 
137   UINT16_TO_STREAM(pp, HCI_DISCONNECT);
138   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_DISCONNECT);
139   UINT16_TO_STREAM(pp, handle);
140   UINT8_TO_STREAM(pp, reason);
141 
142   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
143 }
144 
btsnd_hcic_add_SCO_conn(uint16_t handle,uint16_t packet_types)145 void btsnd_hcic_add_SCO_conn(uint16_t handle, uint16_t packet_types) {
146   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
147   uint8_t* pp = (uint8_t*)(p + 1);
148 
149   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ADD_SCO_CONN;
150   p->offset = 0;
151 
152   UINT16_TO_STREAM(pp, HCI_ADD_SCO_CONNECTION);
153   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ADD_SCO_CONN);
154 
155   UINT16_TO_STREAM(pp, handle);
156   UINT16_TO_STREAM(pp, packet_types);
157 
158   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
159 }
160 
btsnd_hcic_create_conn_cancel(const RawAddress & dest)161 void btsnd_hcic_create_conn_cancel(const RawAddress& dest) {
162   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
163   uint8_t* pp = (uint8_t*)(p + 1);
164 
165   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN_CANCEL;
166   p->offset = 0;
167 
168   UINT16_TO_STREAM(pp, HCI_CREATE_CONNECTION_CANCEL);
169   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CREATE_CONN_CANCEL);
170 
171   BDADDR_TO_STREAM(pp, dest);
172 
173   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
174 }
175 
btsnd_hcic_accept_conn(const RawAddress & dest,uint8_t role)176 void btsnd_hcic_accept_conn(const RawAddress& dest, uint8_t role) {
177   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
178   uint8_t* pp = (uint8_t*)(p + 1);
179 
180   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ACCEPT_CONN;
181   p->offset = 0;
182 
183   UINT16_TO_STREAM(pp, HCI_ACCEPT_CONNECTION_REQUEST);
184   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ACCEPT_CONN);
185   BDADDR_TO_STREAM(pp, dest);
186   UINT8_TO_STREAM(pp, role);
187 
188   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
189 }
190 
btsnd_hcic_reject_conn(const RawAddress & dest,uint8_t reason)191 void btsnd_hcic_reject_conn(const RawAddress& dest, uint8_t reason) {
192   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
193   uint8_t* pp = (uint8_t*)(p + 1);
194 
195   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REJECT_CONN;
196   p->offset = 0;
197 
198   UINT16_TO_STREAM(pp, HCI_REJECT_CONNECTION_REQUEST);
199   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REJECT_CONN);
200 
201   BDADDR_TO_STREAM(pp, dest);
202   UINT8_TO_STREAM(pp, reason);
203 
204   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
205 }
206 
btsnd_hcic_link_key_req_reply(const RawAddress & bd_addr,const LinkKey & link_key)207 void btsnd_hcic_link_key_req_reply(const RawAddress& bd_addr,
208                                    const LinkKey& link_key) {
209   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
210   uint8_t* pp = (uint8_t*)(p + 1);
211 
212   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LINK_KEY_REQ_REPLY;
213   p->offset = 0;
214 
215   UINT16_TO_STREAM(pp, HCI_LINK_KEY_REQUEST_REPLY);
216   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LINK_KEY_REQ_REPLY);
217 
218   BDADDR_TO_STREAM(pp, bd_addr);
219   ARRAY16_TO_STREAM(pp, link_key.data());
220 
221   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
222 }
223 
btsnd_hcic_link_key_neg_reply(const RawAddress & bd_addr)224 void btsnd_hcic_link_key_neg_reply(const RawAddress& bd_addr) {
225   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
226   uint8_t* pp = (uint8_t*)(p + 1);
227 
228   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LINK_KEY_NEG_REPLY;
229   p->offset = 0;
230 
231   UINT16_TO_STREAM(pp, HCI_LINK_KEY_REQUEST_NEG_REPLY);
232   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LINK_KEY_NEG_REPLY);
233 
234   BDADDR_TO_STREAM(pp, bd_addr);
235 
236   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
237 }
238 
btsnd_hcic_pin_code_req_reply(const RawAddress & bd_addr,uint8_t pin_code_len,PIN_CODE pin_code)239 void btsnd_hcic_pin_code_req_reply(const RawAddress& bd_addr,
240                                    uint8_t pin_code_len, PIN_CODE pin_code) {
241   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
242   uint8_t* pp = (uint8_t*)(p + 1);
243   int i;
244 
245   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PIN_CODE_REQ_REPLY;
246   p->offset = 0;
247 
248   UINT16_TO_STREAM(pp, HCI_PIN_CODE_REQUEST_REPLY);
249   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PIN_CODE_REQ_REPLY);
250 
251   BDADDR_TO_STREAM(pp, bd_addr);
252   UINT8_TO_STREAM(pp, pin_code_len);
253 
254   for (i = 0; i < pin_code_len; i++) *pp++ = *pin_code++;
255 
256   for (; i < PIN_CODE_LEN; i++) *pp++ = 0;
257 
258   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
259 }
260 
btsnd_hcic_pin_code_neg_reply(const RawAddress & bd_addr)261 void btsnd_hcic_pin_code_neg_reply(const RawAddress& bd_addr) {
262   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
263   uint8_t* pp = (uint8_t*)(p + 1);
264 
265   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PIN_CODE_NEG_REPLY;
266   p->offset = 0;
267 
268   UINT16_TO_STREAM(pp, HCI_PIN_CODE_REQUEST_NEG_REPLY);
269   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PIN_CODE_NEG_REPLY);
270 
271   BDADDR_TO_STREAM(pp, bd_addr);
272 
273   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
274 }
275 
btsnd_hcic_change_conn_type(uint16_t handle,uint16_t packet_types)276 void btsnd_hcic_change_conn_type(uint16_t handle, uint16_t packet_types) {
277   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
278   uint8_t* pp = (uint8_t*)(p + 1);
279 
280   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_CONN_TYPE;
281   p->offset = 0;
282 
283   UINT16_TO_STREAM(pp, HCI_CHANGE_CONN_PACKET_TYPE);
284   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CHANGE_CONN_TYPE);
285 
286   UINT16_TO_STREAM(pp, handle);
287   UINT16_TO_STREAM(pp, packet_types);
288 
289   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
290 }
291 
btsnd_hcic_auth_request(uint16_t handle)292 void btsnd_hcic_auth_request(uint16_t handle) {
293   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
294   uint8_t* pp = (uint8_t*)(p + 1);
295 
296   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
297   p->offset = 0;
298 
299   UINT16_TO_STREAM(pp, HCI_AUTHENTICATION_REQUESTED);
300   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
301 
302   UINT16_TO_STREAM(pp, handle);
303 
304   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
305 }
306 
btsnd_hcic_set_conn_encrypt(uint16_t handle,bool enable)307 void btsnd_hcic_set_conn_encrypt(uint16_t handle, bool enable) {
308   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
309   uint8_t* pp = (uint8_t*)(p + 1);
310 
311   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_CONN_ENCRYPT;
312   p->offset = 0;
313 
314   UINT16_TO_STREAM(pp, HCI_SET_CONN_ENCRYPTION);
315   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SET_CONN_ENCRYPT);
316 
317   UINT16_TO_STREAM(pp, handle);
318   UINT8_TO_STREAM(pp, enable);
319 
320   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
321 }
322 
btsnd_hcic_rmt_name_req(const RawAddress & bd_addr,uint8_t page_scan_rep_mode,uint8_t page_scan_mode,uint16_t clock_offset)323 void btsnd_hcic_rmt_name_req(const RawAddress& bd_addr,
324                              uint8_t page_scan_rep_mode, uint8_t page_scan_mode,
325                              uint16_t clock_offset) {
326   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
327   uint8_t* pp = (uint8_t*)(p + 1);
328 
329   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_NAME_REQ;
330   p->offset = 0;
331 
332   UINT16_TO_STREAM(pp, HCI_RMT_NAME_REQUEST);
333   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_NAME_REQ);
334 
335   BDADDR_TO_STREAM(pp, bd_addr);
336   UINT8_TO_STREAM(pp, page_scan_rep_mode);
337   UINT8_TO_STREAM(pp, page_scan_mode);
338   UINT16_TO_STREAM(pp, clock_offset);
339 
340   btm_acl_paging(p, bd_addr);
341 }
342 
btsnd_hcic_rmt_name_req_cancel(const RawAddress & bd_addr)343 void btsnd_hcic_rmt_name_req_cancel(const RawAddress& bd_addr) {
344   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
345   uint8_t* pp = (uint8_t*)(p + 1);
346 
347   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_NAME_REQ_CANCEL;
348   p->offset = 0;
349 
350   UINT16_TO_STREAM(pp, HCI_RMT_NAME_REQUEST_CANCEL);
351   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_NAME_REQ_CANCEL);
352 
353   BDADDR_TO_STREAM(pp, bd_addr);
354 
355   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
356 }
357 
btsnd_hcic_rmt_features_req(uint16_t handle)358 void btsnd_hcic_rmt_features_req(uint16_t handle) {
359   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
360   uint8_t* pp = (uint8_t*)(p + 1);
361 
362   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
363   p->offset = 0;
364 
365   UINT16_TO_STREAM(pp, HCI_READ_RMT_FEATURES);
366   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
367 
368   UINT16_TO_STREAM(pp, handle);
369 
370   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
371 }
372 
btsnd_hcic_rmt_ext_features(uint16_t handle,uint8_t page_num)373 void btsnd_hcic_rmt_ext_features(uint16_t handle, uint8_t page_num) {
374   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
375   uint8_t* pp = (uint8_t*)(p + 1);
376 
377   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_EXT_FEATURES;
378   p->offset = 0;
379 
380   UINT16_TO_STREAM(pp, HCI_READ_RMT_EXT_FEATURES);
381   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_EXT_FEATURES);
382 
383   UINT16_TO_STREAM(pp, handle);
384   UINT8_TO_STREAM(pp, page_num);
385 
386   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
387 }
388 
btsnd_hcic_rmt_ver_req(uint16_t handle)389 void btsnd_hcic_rmt_ver_req(uint16_t handle) {
390   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
391   uint8_t* pp = (uint8_t*)(p + 1);
392 
393   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
394   p->offset = 0;
395 
396   UINT16_TO_STREAM(pp, HCI_READ_RMT_VERSION_INFO);
397   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
398 
399   UINT16_TO_STREAM(pp, handle);
400 
401   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
402 }
403 
btsnd_hcic_read_rmt_clk_offset(uint16_t handle)404 void btsnd_hcic_read_rmt_clk_offset(uint16_t handle) {
405   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
406   uint8_t* pp = (uint8_t*)(p + 1);
407 
408   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
409   p->offset = 0;
410 
411   UINT16_TO_STREAM(pp, HCI_READ_RMT_CLOCK_OFFSET);
412   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
413 
414   UINT16_TO_STREAM(pp, handle);
415 
416   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
417 }
418 
btsnd_hcic_read_lmp_handle(uint16_t handle)419 void btsnd_hcic_read_lmp_handle(uint16_t handle) {
420   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
421   uint8_t* pp = (uint8_t*)(p + 1);
422 
423   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
424   p->offset = 0;
425 
426   UINT16_TO_STREAM(pp, HCI_READ_LMP_HANDLE);
427   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
428 
429   UINT16_TO_STREAM(pp, handle);
430 
431   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
432 }
433 
btsnd_hcic_setup_esco_conn(uint16_t handle,uint32_t transmit_bandwidth,uint32_t receive_bandwidth,uint16_t max_latency,uint16_t voice,uint8_t retrans_effort,uint16_t packet_types)434 void btsnd_hcic_setup_esco_conn(uint16_t handle, uint32_t transmit_bandwidth,
435                                 uint32_t receive_bandwidth,
436                                 uint16_t max_latency, uint16_t voice,
437                                 uint8_t retrans_effort, uint16_t packet_types) {
438   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
439   uint8_t* pp = (uint8_t*)(p + 1);
440 
441   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SETUP_ESCO;
442   p->offset = 0;
443 
444   UINT16_TO_STREAM(pp, HCI_SETUP_ESCO_CONNECTION);
445   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SETUP_ESCO);
446 
447   UINT16_TO_STREAM(pp, handle);
448   UINT32_TO_STREAM(pp, transmit_bandwidth);
449   UINT32_TO_STREAM(pp, receive_bandwidth);
450   UINT16_TO_STREAM(pp, max_latency);
451   UINT16_TO_STREAM(pp, voice);
452   UINT8_TO_STREAM(pp, retrans_effort);
453   UINT16_TO_STREAM(pp, packet_types);
454 
455   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
456 }
457 
btsnd_hcic_accept_esco_conn(const RawAddress & bd_addr,uint32_t transmit_bandwidth,uint32_t receive_bandwidth,uint16_t max_latency,uint16_t content_fmt,uint8_t retrans_effort,uint16_t packet_types)458 void btsnd_hcic_accept_esco_conn(const RawAddress& bd_addr,
459                                  uint32_t transmit_bandwidth,
460                                  uint32_t receive_bandwidth,
461                                  uint16_t max_latency, uint16_t content_fmt,
462                                  uint8_t retrans_effort,
463                                  uint16_t packet_types) {
464   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
465   uint8_t* pp = (uint8_t*)(p + 1);
466 
467   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ACCEPT_ESCO;
468   p->offset = 0;
469 
470   UINT16_TO_STREAM(pp, HCI_ACCEPT_ESCO_CONNECTION);
471   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ACCEPT_ESCO);
472 
473   BDADDR_TO_STREAM(pp, bd_addr);
474   UINT32_TO_STREAM(pp, transmit_bandwidth);
475   UINT32_TO_STREAM(pp, receive_bandwidth);
476   UINT16_TO_STREAM(pp, max_latency);
477   UINT16_TO_STREAM(pp, content_fmt);
478   UINT8_TO_STREAM(pp, retrans_effort);
479   UINT16_TO_STREAM(pp, packet_types);
480 
481   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
482 }
483 
btsnd_hcic_reject_esco_conn(const RawAddress & bd_addr,uint8_t reason)484 void btsnd_hcic_reject_esco_conn(const RawAddress& bd_addr, uint8_t reason) {
485   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
486   uint8_t* pp = (uint8_t*)(p + 1);
487 
488   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REJECT_ESCO;
489   p->offset = 0;
490 
491   UINT16_TO_STREAM(pp, HCI_REJECT_ESCO_CONNECTION);
492   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REJECT_ESCO);
493 
494   BDADDR_TO_STREAM(pp, bd_addr);
495   UINT8_TO_STREAM(pp, reason);
496 
497   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
498 }
499 
btsnd_hcic_hold_mode(uint16_t handle,uint16_t max_hold_period,uint16_t min_hold_period)500 void btsnd_hcic_hold_mode(uint16_t handle, uint16_t max_hold_period,
501                           uint16_t min_hold_period) {
502   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
503   uint8_t* pp = (uint8_t*)(p + 1);
504 
505   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_HOLD_MODE;
506   p->offset = 0;
507 
508   UINT16_TO_STREAM(pp, HCI_HOLD_MODE);
509   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_HOLD_MODE);
510 
511   UINT16_TO_STREAM(pp, handle);
512   UINT16_TO_STREAM(pp, max_hold_period);
513   UINT16_TO_STREAM(pp, min_hold_period);
514 
515   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
516 }
517 
btsnd_hcic_sniff_mode(uint16_t handle,uint16_t max_sniff_period,uint16_t min_sniff_period,uint16_t sniff_attempt,uint16_t sniff_timeout)518 void btsnd_hcic_sniff_mode(uint16_t handle, uint16_t max_sniff_period,
519                            uint16_t min_sniff_period, uint16_t sniff_attempt,
520                            uint16_t sniff_timeout) {
521   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
522   uint8_t* pp = (uint8_t*)(p + 1);
523 
524   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SNIFF_MODE;
525   p->offset = 0;
526 
527   UINT16_TO_STREAM(pp, HCI_SNIFF_MODE);
528   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SNIFF_MODE);
529 
530   UINT16_TO_STREAM(pp, handle);
531   UINT16_TO_STREAM(pp, max_sniff_period);
532   UINT16_TO_STREAM(pp, min_sniff_period);
533   UINT16_TO_STREAM(pp, sniff_attempt);
534   UINT16_TO_STREAM(pp, sniff_timeout);
535 
536   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
537 }
538 
btsnd_hcic_exit_sniff_mode(uint16_t handle)539 void btsnd_hcic_exit_sniff_mode(uint16_t handle) {
540   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
541   uint8_t* pp = (uint8_t*)(p + 1);
542 
543   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
544   p->offset = 0;
545 
546   UINT16_TO_STREAM(pp, HCI_EXIT_SNIFF_MODE);
547   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
548 
549   UINT16_TO_STREAM(pp, handle);
550 
551   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
552 }
553 
btsnd_hcic_park_mode(uint16_t handle,uint16_t beacon_max_interval,uint16_t beacon_min_interval)554 void btsnd_hcic_park_mode(uint16_t handle, uint16_t beacon_max_interval,
555                           uint16_t beacon_min_interval) {
556   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
557   uint8_t* pp = (uint8_t*)(p + 1);
558 
559   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PARK_MODE;
560   p->offset = 0;
561 
562   UINT16_TO_STREAM(pp, HCI_PARK_MODE);
563   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PARK_MODE);
564 
565   UINT16_TO_STREAM(pp, handle);
566   UINT16_TO_STREAM(pp, beacon_max_interval);
567   UINT16_TO_STREAM(pp, beacon_min_interval);
568 
569   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
570 }
571 
btsnd_hcic_exit_park_mode(uint16_t handle)572 void btsnd_hcic_exit_park_mode(uint16_t handle) {
573   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
574   uint8_t* pp = (uint8_t*)(p + 1);
575 
576   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
577   p->offset = 0;
578 
579   UINT16_TO_STREAM(pp, HCI_EXIT_PARK_MODE);
580   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
581 
582   UINT16_TO_STREAM(pp, handle);
583 
584   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
585 }
586 
btsnd_hcic_qos_setup(uint16_t handle,uint8_t flags,uint8_t service_type,uint32_t token_rate,uint32_t peak,uint32_t latency,uint32_t delay_var)587 void btsnd_hcic_qos_setup(uint16_t handle, uint8_t flags, uint8_t service_type,
588                           uint32_t token_rate, uint32_t peak, uint32_t latency,
589                           uint32_t delay_var) {
590   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
591   uint8_t* pp = (uint8_t*)(p + 1);
592 
593   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_QOS_SETUP;
594   p->offset = 0;
595 
596   UINT16_TO_STREAM(pp, HCI_QOS_SETUP);
597   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_QOS_SETUP);
598 
599   UINT16_TO_STREAM(pp, handle);
600   UINT8_TO_STREAM(pp, flags);
601   UINT8_TO_STREAM(pp, service_type);
602   UINT32_TO_STREAM(pp, token_rate);
603   UINT32_TO_STREAM(pp, peak);
604   UINT32_TO_STREAM(pp, latency);
605   UINT32_TO_STREAM(pp, delay_var);
606 
607   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
608 }
609 
btsnd_hcic_switch_role(const RawAddress & bd_addr,uint8_t role)610 void btsnd_hcic_switch_role(const RawAddress& bd_addr, uint8_t role) {
611   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
612   uint8_t* pp = (uint8_t*)(p + 1);
613 
614   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SWITCH_ROLE;
615   p->offset = 0;
616 
617   UINT16_TO_STREAM(pp, HCI_SWITCH_ROLE);
618   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SWITCH_ROLE);
619 
620   BDADDR_TO_STREAM(pp, bd_addr);
621   UINT8_TO_STREAM(pp, role);
622 
623   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
624 }
625 
btsnd_hcic_write_policy_set(uint16_t handle,uint16_t settings)626 void btsnd_hcic_write_policy_set(uint16_t handle, uint16_t settings) {
627   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
628   uint8_t* pp = (uint8_t*)(p + 1);
629 
630   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_POLICY_SET;
631   p->offset = 0;
632   UINT16_TO_STREAM(pp, HCI_WRITE_POLICY_SETTINGS);
633   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_POLICY_SET);
634 
635   UINT16_TO_STREAM(pp, handle);
636   UINT16_TO_STREAM(pp, settings);
637 
638   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
639 }
640 
btsnd_hcic_write_def_policy_set(uint16_t settings)641 void btsnd_hcic_write_def_policy_set(uint16_t settings) {
642   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
643   uint8_t* pp = (uint8_t*)(p + 1);
644 
645   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_DEF_POLICY_SET;
646   p->offset = 0;
647   UINT16_TO_STREAM(pp, HCI_WRITE_DEF_POLICY_SETTINGS);
648   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_DEF_POLICY_SET);
649 
650   UINT16_TO_STREAM(pp, settings);
651 
652   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
653 }
654 
btsnd_hcic_set_event_filter(uint8_t filt_type,uint8_t filt_cond_type,uint8_t * filt_cond,uint8_t filt_cond_len)655 void btsnd_hcic_set_event_filter(uint8_t filt_type, uint8_t filt_cond_type,
656                                  uint8_t* filt_cond, uint8_t filt_cond_len) {
657   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
658   uint8_t* pp = (uint8_t*)(p + 1);
659 
660   p->offset = 0;
661 
662   UINT16_TO_STREAM(pp, HCI_SET_EVENT_FILTER);
663 
664   if (filt_type) {
665     p->len = (uint16_t)(HCIC_PREAMBLE_SIZE + 2 + filt_cond_len);
666     UINT8_TO_STREAM(pp, (uint8_t)(2 + filt_cond_len));
667 
668     UINT8_TO_STREAM(pp, filt_type);
669     UINT8_TO_STREAM(pp, filt_cond_type);
670 
671     if (filt_cond_type == HCI_FILTER_COND_DEVICE_CLASS) {
672       DEVCLASS_TO_STREAM(pp, filt_cond);
673       filt_cond += DEV_CLASS_LEN;
674       DEVCLASS_TO_STREAM(pp, filt_cond);
675       filt_cond += DEV_CLASS_LEN;
676 
677       filt_cond_len -= (2 * DEV_CLASS_LEN);
678     } else if (filt_cond_type == HCI_FILTER_COND_BD_ADDR) {
679       BDADDR_TO_STREAM(pp, *((RawAddress*)filt_cond));
680       filt_cond += BD_ADDR_LEN;
681 
682       filt_cond_len -= BD_ADDR_LEN;
683     }
684 
685     if (filt_cond_len) ARRAY_TO_STREAM(pp, filt_cond, filt_cond_len);
686   } else {
687     p->len = (uint16_t)(HCIC_PREAMBLE_SIZE + 1);
688     UINT8_TO_STREAM(pp, 1);
689 
690     UINT8_TO_STREAM(pp, filt_type);
691   }
692 
693   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
694 }
695 
btsnd_hcic_write_pin_type(uint8_t type)696 void btsnd_hcic_write_pin_type(uint8_t type) {
697   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
698   uint8_t* pp = (uint8_t*)(p + 1);
699 
700   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
701   p->offset = 0;
702 
703   UINT16_TO_STREAM(pp, HCI_WRITE_PIN_TYPE);
704   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
705 
706   UINT8_TO_STREAM(pp, type);
707 
708   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
709 }
710 
btsnd_hcic_delete_stored_key(const RawAddress & bd_addr,bool delete_all_flag)711 void btsnd_hcic_delete_stored_key(const RawAddress& bd_addr,
712                                   bool delete_all_flag) {
713   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
714   uint8_t* pp = (uint8_t*)(p + 1);
715 
716   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_DELETE_STORED_KEY;
717   p->offset = 0;
718 
719   UINT16_TO_STREAM(pp, HCI_DELETE_STORED_LINK_KEY);
720   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_DELETE_STORED_KEY);
721 
722   BDADDR_TO_STREAM(pp, bd_addr);
723   UINT8_TO_STREAM(pp, delete_all_flag);
724 
725   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
726 }
727 
btsnd_hcic_change_name(BD_NAME name)728 void btsnd_hcic_change_name(BD_NAME name) {
729   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
730   uint8_t* pp = (uint8_t*)(p + 1);
731   uint16_t len = strlen((char*)name) + 1;
732 
733   memset(pp, 0, HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_NAME);
734 
735   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_NAME;
736   p->offset = 0;
737 
738   UINT16_TO_STREAM(pp, HCI_CHANGE_LOCAL_NAME);
739   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CHANGE_NAME);
740 
741   if (len > HCIC_PARAM_SIZE_CHANGE_NAME) len = HCIC_PARAM_SIZE_CHANGE_NAME;
742 
743   ARRAY_TO_STREAM(pp, name, len);
744 
745   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
746 }
747 
btsnd_hcic_read_name(void)748 void btsnd_hcic_read_name(void) {
749   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
750   uint8_t* pp = (uint8_t*)(p + 1);
751 
752   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
753   p->offset = 0;
754 
755   UINT16_TO_STREAM(pp, HCI_READ_LOCAL_NAME);
756   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
757 
758   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
759 }
760 
btsnd_hcic_write_page_tout(uint16_t timeout)761 void btsnd_hcic_write_page_tout(uint16_t timeout) {
762   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
763   uint8_t* pp = (uint8_t*)(p + 1);
764 
765   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM2;
766   p->offset = 0;
767 
768   UINT16_TO_STREAM(pp, HCI_WRITE_PAGE_TOUT);
769   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM2);
770 
771   UINT16_TO_STREAM(pp, timeout);
772 
773   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
774 }
775 
btsnd_hcic_write_scan_enable(uint8_t flag)776 void btsnd_hcic_write_scan_enable(uint8_t flag) {
777   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
778   uint8_t* pp = (uint8_t*)(p + 1);
779 
780   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
781   p->offset = 0;
782 
783   UINT16_TO_STREAM(pp, HCI_WRITE_SCAN_ENABLE);
784   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
785 
786   UINT8_TO_STREAM(pp, flag);
787 
788   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
789 }
790 
btsnd_hcic_write_pagescan_cfg(uint16_t interval,uint16_t window)791 void btsnd_hcic_write_pagescan_cfg(uint16_t interval, uint16_t window) {
792   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
793   uint8_t* pp = (uint8_t*)(p + 1);
794 
795   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PAGESCAN_CFG;
796   p->offset = 0;
797 
798   UINT16_TO_STREAM(pp, HCI_WRITE_PAGESCAN_CFG);
799   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PAGESCAN_CFG);
800 
801   UINT16_TO_STREAM(pp, interval);
802   UINT16_TO_STREAM(pp, window);
803 
804   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
805 }
806 
btsnd_hcic_write_inqscan_cfg(uint16_t interval,uint16_t window)807 void btsnd_hcic_write_inqscan_cfg(uint16_t interval, uint16_t window) {
808   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
809   uint8_t* pp = (uint8_t*)(p + 1);
810 
811   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_INQSCAN_CFG;
812   p->offset = 0;
813 
814   UINT16_TO_STREAM(pp, HCI_WRITE_INQUIRYSCAN_CFG);
815   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_INQSCAN_CFG);
816 
817   UINT16_TO_STREAM(pp, interval);
818   UINT16_TO_STREAM(pp, window);
819 
820   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
821 }
822 
btsnd_hcic_write_auth_enable(uint8_t flag)823 void btsnd_hcic_write_auth_enable(uint8_t flag) {
824   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
825   uint8_t* pp = (uint8_t*)(p + 1);
826 
827   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
828   p->offset = 0;
829 
830   UINT16_TO_STREAM(pp, HCI_WRITE_AUTHENTICATION_ENABLE);
831   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
832 
833   UINT8_TO_STREAM(pp, flag);
834 
835   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
836 }
837 
btsnd_hcic_write_dev_class(DEV_CLASS dev_class)838 void btsnd_hcic_write_dev_class(DEV_CLASS dev_class) {
839   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
840   uint8_t* pp = (uint8_t*)(p + 1);
841 
842   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM3;
843   p->offset = 0;
844 
845   UINT16_TO_STREAM(pp, HCI_WRITE_CLASS_OF_DEVICE);
846   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM3);
847 
848   DEVCLASS_TO_STREAM(pp, dev_class);
849 
850   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
851 }
852 
btsnd_hcic_write_voice_settings(uint16_t flags)853 void btsnd_hcic_write_voice_settings(uint16_t flags) {
854   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
855   uint8_t* pp = (uint8_t*)(p + 1);
856 
857   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM2;
858   p->offset = 0;
859 
860   UINT16_TO_STREAM(pp, HCI_WRITE_VOICE_SETTINGS);
861   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM2);
862 
863   UINT16_TO_STREAM(pp, flags);
864 
865   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
866 }
867 
btsnd_hcic_write_auto_flush_tout(uint16_t handle,uint16_t tout)868 void btsnd_hcic_write_auto_flush_tout(uint16_t handle, uint16_t tout) {
869   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
870   uint8_t* pp = (uint8_t*)(p + 1);
871 
872   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_AUTOMATIC_FLUSH_TIMEOUT;
873   p->offset = 0;
874 
875   UINT16_TO_STREAM(pp, HCI_WRITE_AUTOMATIC_FLUSH_TIMEOUT);
876   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_AUTOMATIC_FLUSH_TIMEOUT);
877 
878   UINT16_TO_STREAM(pp, handle);
879   UINT16_TO_STREAM(pp, tout);
880 
881   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
882 }
883 
btsnd_hcic_read_tx_power(uint16_t handle,uint8_t type)884 void btsnd_hcic_read_tx_power(uint16_t handle, uint8_t type) {
885   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
886   uint8_t* pp = (uint8_t*)(p + 1);
887 
888   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_TX_POWER;
889   p->offset = 0;
890 
891   UINT16_TO_STREAM(pp, HCI_READ_TRANSMIT_POWER_LEVEL);
892   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_TX_POWER);
893 
894   UINT16_TO_STREAM(pp, handle);
895   UINT8_TO_STREAM(pp, type);
896 
897   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
898 }
899 
btsnd_hcic_host_num_xmitted_pkts(uint8_t num_handles,uint16_t * handle,uint16_t * num_pkts)900 void btsnd_hcic_host_num_xmitted_pkts(uint8_t num_handles, uint16_t* handle,
901                                       uint16_t* num_pkts) {
902   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
903   uint8_t* pp = (uint8_t*)(p + 1);
904 
905   p->len = HCIC_PREAMBLE_SIZE + 1 + (num_handles * 4);
906   p->offset = 0;
907 
908   UINT16_TO_STREAM(pp, HCI_HOST_NUM_PACKETS_DONE);
909   UINT8_TO_STREAM(pp, p->len - HCIC_PREAMBLE_SIZE);
910 
911   UINT8_TO_STREAM(pp, num_handles);
912 
913   for (int i = 0; i < num_handles; i++) {
914     UINT16_TO_STREAM(pp, handle[i]);
915     UINT16_TO_STREAM(pp, num_pkts[i]);
916   }
917 
918   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
919 }
920 
btsnd_hcic_write_link_super_tout(uint8_t local_controller_id,uint16_t handle,uint16_t timeout)921 void btsnd_hcic_write_link_super_tout(uint8_t local_controller_id,
922                                       uint16_t handle, uint16_t timeout) {
923   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
924   uint8_t* pp = (uint8_t*)(p + 1);
925 
926   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_LINK_SUPER_TOUT;
927   p->offset = 0;
928 
929   UINT16_TO_STREAM(pp, HCI_WRITE_LINK_SUPER_TOUT);
930   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_LINK_SUPER_TOUT);
931 
932   UINT16_TO_STREAM(pp, handle);
933   UINT16_TO_STREAM(pp, timeout);
934 
935   btu_hcif_send_cmd(local_controller_id, p);
936 }
937 
btsnd_hcic_write_cur_iac_lap(uint8_t num_cur_iac,LAP * const iac_lap)938 void btsnd_hcic_write_cur_iac_lap(uint8_t num_cur_iac, LAP* const iac_lap) {
939   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
940   uint8_t* pp = (uint8_t*)(p + 1);
941 
942   p->len = HCIC_PREAMBLE_SIZE + 1 + (LAP_LEN * num_cur_iac);
943   p->offset = 0;
944 
945   UINT16_TO_STREAM(pp, HCI_WRITE_CURRENT_IAC_LAP);
946   UINT8_TO_STREAM(pp, p->len - HCIC_PREAMBLE_SIZE);
947 
948   UINT8_TO_STREAM(pp, num_cur_iac);
949 
950   for (int i = 0; i < num_cur_iac; i++) LAP_TO_STREAM(pp, iac_lap[i]);
951 
952   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
953 }
954 
955 /******************************************
956  *    Lisbon Features
957  ******************************************/
958 #if (BTM_SSR_INCLUDED == TRUE)
959 
btsnd_hcic_sniff_sub_rate(uint16_t handle,uint16_t max_lat,uint16_t min_remote_lat,uint16_t min_local_lat)960 void btsnd_hcic_sniff_sub_rate(uint16_t handle, uint16_t max_lat,
961                                uint16_t min_remote_lat,
962                                uint16_t min_local_lat) {
963   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
964   uint8_t* pp = (uint8_t*)(p + 1);
965 
966   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SNIFF_SUB_RATE;
967   p->offset = 0;
968 
969   UINT16_TO_STREAM(pp, HCI_SNIFF_SUB_RATE);
970   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SNIFF_SUB_RATE);
971 
972   UINT16_TO_STREAM(pp, handle);
973   UINT16_TO_STREAM(pp, max_lat);
974   UINT16_TO_STREAM(pp, min_remote_lat);
975   UINT16_TO_STREAM(pp, min_local_lat);
976 
977   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
978 }
979 #endif /* BTM_SSR_INCLUDED */
980 
981 /**** Extended Inquiry Response Commands ****/
btsnd_hcic_write_ext_inquiry_response(void * buffer,uint8_t fec_req)982 void btsnd_hcic_write_ext_inquiry_response(void* buffer, uint8_t fec_req) {
983   BT_HDR* p = (BT_HDR*)buffer;
984   uint8_t* pp = (uint8_t*)(p + 1);
985 
986   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_EXT_INQ_RESP;
987   p->offset = 0;
988 
989   UINT16_TO_STREAM(pp, HCI_WRITE_EXT_INQ_RESPONSE);
990   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_EXT_INQ_RESP);
991 
992   UINT8_TO_STREAM(pp, fec_req);
993 
994   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
995 }
996 
btsnd_hcic_io_cap_req_reply(const RawAddress & bd_addr,uint8_t capability,uint8_t oob_present,uint8_t auth_req)997 void btsnd_hcic_io_cap_req_reply(const RawAddress& bd_addr, uint8_t capability,
998                                  uint8_t oob_present, uint8_t auth_req) {
999   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1000   uint8_t* pp = (uint8_t*)(p + 1);
1001 
1002   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_IO_CAP_RESP;
1003   p->offset = 0;
1004 
1005   UINT16_TO_STREAM(pp, HCI_IO_CAPABILITY_REQUEST_REPLY);
1006   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_IO_CAP_RESP);
1007 
1008   BDADDR_TO_STREAM(pp, bd_addr);
1009   UINT8_TO_STREAM(pp, capability);
1010   UINT8_TO_STREAM(pp, oob_present);
1011   UINT8_TO_STREAM(pp, auth_req);
1012 
1013   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1014 }
1015 
btsnd_hcic_enhanced_set_up_synchronous_connection(uint16_t conn_handle,enh_esco_params_t * p_params)1016 void btsnd_hcic_enhanced_set_up_synchronous_connection(
1017     uint16_t conn_handle, enh_esco_params_t* p_params) {
1018   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1019   uint8_t* pp = (uint8_t*)(p + 1);
1020 
1021   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENH_SET_ESCO_CONN;
1022   p->offset = 0;
1023 
1024   UINT16_TO_STREAM(pp, HCI_ENH_SETUP_ESCO_CONNECTION);
1025   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENH_SET_ESCO_CONN);
1026 
1027   UINT16_TO_STREAM(pp, conn_handle);
1028   UINT32_TO_STREAM(pp, p_params->transmit_bandwidth);
1029   UINT32_TO_STREAM(pp, p_params->receive_bandwidth);
1030   UINT8_TO_STREAM(pp, p_params->transmit_coding_format.coding_format);
1031   UINT16_TO_STREAM(pp, p_params->transmit_coding_format.company_id);
1032   UINT16_TO_STREAM(pp,
1033                    p_params->transmit_coding_format.vendor_specific_codec_id);
1034   UINT8_TO_STREAM(pp, p_params->receive_coding_format.coding_format);
1035   UINT16_TO_STREAM(pp, p_params->receive_coding_format.company_id);
1036   UINT16_TO_STREAM(pp,
1037                    p_params->receive_coding_format.vendor_specific_codec_id);
1038   UINT16_TO_STREAM(pp, p_params->transmit_codec_frame_size);
1039   UINT16_TO_STREAM(pp, p_params->receive_codec_frame_size);
1040   UINT32_TO_STREAM(pp, p_params->input_bandwidth);
1041   UINT32_TO_STREAM(pp, p_params->output_bandwidth);
1042   UINT8_TO_STREAM(pp, p_params->input_coding_format.coding_format);
1043   UINT16_TO_STREAM(pp, p_params->input_coding_format.company_id);
1044   UINT16_TO_STREAM(pp, p_params->input_coding_format.vendor_specific_codec_id);
1045   UINT8_TO_STREAM(pp, p_params->output_coding_format.coding_format);
1046   UINT16_TO_STREAM(pp, p_params->output_coding_format.company_id);
1047   UINT16_TO_STREAM(pp, p_params->output_coding_format.vendor_specific_codec_id);
1048   UINT16_TO_STREAM(pp, p_params->input_coded_data_size);
1049   UINT16_TO_STREAM(pp, p_params->output_coded_data_size);
1050   UINT8_TO_STREAM(pp, p_params->input_pcm_data_format);
1051   UINT8_TO_STREAM(pp, p_params->output_pcm_data_format);
1052   UINT8_TO_STREAM(pp, p_params->input_pcm_payload_msb_position);
1053   UINT8_TO_STREAM(pp, p_params->output_pcm_payload_msb_position);
1054   UINT8_TO_STREAM(pp, p_params->input_data_path);
1055   UINT8_TO_STREAM(pp, p_params->output_data_path);
1056   UINT8_TO_STREAM(pp, p_params->input_transport_unit_size);
1057   UINT8_TO_STREAM(pp, p_params->output_transport_unit_size);
1058   UINT16_TO_STREAM(pp, p_params->max_latency_ms);
1059   UINT16_TO_STREAM(pp, p_params->packet_types);
1060   UINT8_TO_STREAM(pp, p_params->retransmission_effort);
1061 
1062   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1063 }
1064 
btsnd_hcic_enhanced_accept_synchronous_connection(const RawAddress & bd_addr,enh_esco_params_t * p_params)1065 void btsnd_hcic_enhanced_accept_synchronous_connection(
1066     const RawAddress& bd_addr, enh_esco_params_t* p_params) {
1067   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1068   uint8_t* pp = (uint8_t*)(p + 1);
1069 
1070   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENH_ACC_ESCO_CONN;
1071   p->offset = 0;
1072 
1073   UINT16_TO_STREAM(pp, HCI_ENH_ACCEPT_ESCO_CONNECTION);
1074   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENH_ACC_ESCO_CONN);
1075 
1076   BDADDR_TO_STREAM(pp, bd_addr);
1077   UINT32_TO_STREAM(pp, p_params->transmit_bandwidth);
1078   UINT32_TO_STREAM(pp, p_params->receive_bandwidth);
1079   UINT8_TO_STREAM(pp, p_params->transmit_coding_format.coding_format);
1080   UINT16_TO_STREAM(pp, p_params->transmit_coding_format.company_id);
1081   UINT16_TO_STREAM(pp,
1082                    p_params->transmit_coding_format.vendor_specific_codec_id);
1083   UINT8_TO_STREAM(pp, p_params->receive_coding_format.coding_format);
1084   UINT16_TO_STREAM(pp, p_params->receive_coding_format.company_id);
1085   UINT16_TO_STREAM(pp,
1086                    p_params->receive_coding_format.vendor_specific_codec_id);
1087   UINT16_TO_STREAM(pp, p_params->transmit_codec_frame_size);
1088   UINT16_TO_STREAM(pp, p_params->receive_codec_frame_size);
1089   UINT32_TO_STREAM(pp, p_params->input_bandwidth);
1090   UINT32_TO_STREAM(pp, p_params->output_bandwidth);
1091   UINT8_TO_STREAM(pp, p_params->input_coding_format.coding_format);
1092   UINT16_TO_STREAM(pp, p_params->input_coding_format.company_id);
1093   UINT16_TO_STREAM(pp, p_params->input_coding_format.vendor_specific_codec_id);
1094   UINT8_TO_STREAM(pp, p_params->output_coding_format.coding_format);
1095   UINT16_TO_STREAM(pp, p_params->output_coding_format.company_id);
1096   UINT16_TO_STREAM(pp, p_params->output_coding_format.vendor_specific_codec_id);
1097   UINT16_TO_STREAM(pp, p_params->input_coded_data_size);
1098   UINT16_TO_STREAM(pp, p_params->output_coded_data_size);
1099   UINT8_TO_STREAM(pp, p_params->input_pcm_data_format);
1100   UINT8_TO_STREAM(pp, p_params->output_pcm_data_format);
1101   UINT8_TO_STREAM(pp, p_params->input_pcm_payload_msb_position);
1102   UINT8_TO_STREAM(pp, p_params->output_pcm_payload_msb_position);
1103   UINT8_TO_STREAM(pp, p_params->input_data_path);
1104   UINT8_TO_STREAM(pp, p_params->output_data_path);
1105   UINT8_TO_STREAM(pp, p_params->input_transport_unit_size);
1106   UINT8_TO_STREAM(pp, p_params->output_transport_unit_size);
1107   UINT16_TO_STREAM(pp, p_params->max_latency_ms);
1108   UINT16_TO_STREAM(pp, p_params->packet_types);
1109   UINT8_TO_STREAM(pp, p_params->retransmission_effort);
1110 
1111   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1112 }
1113 
btsnd_hcic_io_cap_req_neg_reply(const RawAddress & bd_addr,uint8_t err_code)1114 void btsnd_hcic_io_cap_req_neg_reply(const RawAddress& bd_addr,
1115                                      uint8_t err_code) {
1116   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1117   uint8_t* pp = (uint8_t*)(p + 1);
1118 
1119   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_IO_CAP_NEG_REPLY;
1120   p->offset = 0;
1121 
1122   UINT16_TO_STREAM(pp, HCI_IO_CAP_REQ_NEG_REPLY);
1123   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_IO_CAP_NEG_REPLY);
1124 
1125   BDADDR_TO_STREAM(pp, bd_addr);
1126   UINT8_TO_STREAM(pp, err_code);
1127 
1128   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1129 }
1130 
btsnd_hcic_read_local_oob_data(void)1131 void btsnd_hcic_read_local_oob_data(void) {
1132   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1133   uint8_t* pp = (uint8_t*)(p + 1);
1134 
1135   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_R_LOCAL_OOB;
1136   p->offset = 0;
1137 
1138   UINT16_TO_STREAM(pp, HCI_READ_LOCAL_OOB_DATA);
1139   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_R_LOCAL_OOB);
1140 
1141   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1142 }
1143 
btsnd_hcic_user_conf_reply(const RawAddress & bd_addr,bool is_yes)1144 void btsnd_hcic_user_conf_reply(const RawAddress& bd_addr, bool is_yes) {
1145   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1146   uint8_t* pp = (uint8_t*)(p + 1);
1147 
1148   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_UCONF_REPLY;
1149   p->offset = 0;
1150 
1151   if (!is_yes) {
1152     /* Negative reply */
1153     UINT16_TO_STREAM(pp, HCI_USER_CONF_VALUE_NEG_REPLY);
1154   } else {
1155     /* Confirmation */
1156     UINT16_TO_STREAM(pp, HCI_USER_CONF_REQUEST_REPLY);
1157   }
1158 
1159   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_UCONF_REPLY);
1160 
1161   BDADDR_TO_STREAM(pp, bd_addr);
1162 
1163   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1164 }
1165 
btsnd_hcic_user_passkey_reply(const RawAddress & bd_addr,uint32_t value)1166 void btsnd_hcic_user_passkey_reply(const RawAddress& bd_addr, uint32_t value) {
1167   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1168   uint8_t* pp = (uint8_t*)(p + 1);
1169 
1170   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_U_PKEY_REPLY;
1171   p->offset = 0;
1172 
1173   UINT16_TO_STREAM(pp, HCI_USER_PASSKEY_REQ_REPLY);
1174   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_U_PKEY_REPLY);
1175 
1176   BDADDR_TO_STREAM(pp, bd_addr);
1177   UINT32_TO_STREAM(pp, value);
1178 
1179   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1180 }
1181 
btsnd_hcic_user_passkey_neg_reply(const RawAddress & bd_addr)1182 void btsnd_hcic_user_passkey_neg_reply(const RawAddress& bd_addr) {
1183   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1184   uint8_t* pp = (uint8_t*)(p + 1);
1185 
1186   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_U_PKEY_NEG_REPLY;
1187   p->offset = 0;
1188 
1189   UINT16_TO_STREAM(pp, HCI_USER_PASSKEY_REQ_NEG_REPLY);
1190   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_U_PKEY_NEG_REPLY);
1191 
1192   BDADDR_TO_STREAM(pp, bd_addr);
1193 
1194   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1195 }
1196 
btsnd_hcic_rem_oob_reply(const RawAddress & bd_addr,const Octet16 & c,const Octet16 & r)1197 void btsnd_hcic_rem_oob_reply(const RawAddress& bd_addr, const Octet16& c,
1198                               const Octet16& r) {
1199   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1200   uint8_t* pp = (uint8_t*)(p + 1);
1201 
1202   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REM_OOB_REPLY;
1203   p->offset = 0;
1204 
1205   UINT16_TO_STREAM(pp, HCI_REM_OOB_DATA_REQ_REPLY);
1206   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REM_OOB_REPLY);
1207 
1208   BDADDR_TO_STREAM(pp, bd_addr);
1209   ARRAY16_TO_STREAM(pp, c.data());
1210   ARRAY16_TO_STREAM(pp, r.data());
1211 
1212   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1213 }
1214 
btsnd_hcic_rem_oob_neg_reply(const RawAddress & bd_addr)1215 void btsnd_hcic_rem_oob_neg_reply(const RawAddress& bd_addr) {
1216   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1217   uint8_t* pp = (uint8_t*)(p + 1);
1218 
1219   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REM_OOB_NEG_REPLY;
1220   p->offset = 0;
1221 
1222   UINT16_TO_STREAM(pp, HCI_REM_OOB_DATA_REQ_NEG_REPLY);
1223   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REM_OOB_NEG_REPLY);
1224 
1225   BDADDR_TO_STREAM(pp, bd_addr);
1226 
1227   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1228 }
1229 
btsnd_hcic_read_inq_tx_power(void)1230 void btsnd_hcic_read_inq_tx_power(void) {
1231   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1232   uint8_t* pp = (uint8_t*)(p + 1);
1233 
1234   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_R_TX_POWER;
1235   p->offset = 0;
1236 
1237   UINT16_TO_STREAM(pp, HCI_READ_INQ_TX_POWER_LEVEL);
1238   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_R_TX_POWER);
1239 
1240   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1241 }
1242 
btsnd_hcic_send_keypress_notif(const RawAddress & bd_addr,uint8_t notif)1243 void btsnd_hcic_send_keypress_notif(const RawAddress& bd_addr, uint8_t notif) {
1244   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1245   uint8_t* pp = (uint8_t*)(p + 1);
1246 
1247   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SEND_KEYPRESS_NOTIF;
1248   p->offset = 0;
1249 
1250   UINT16_TO_STREAM(pp, HCI_SEND_KEYPRESS_NOTIF);
1251   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SEND_KEYPRESS_NOTIF);
1252 
1253   BDADDR_TO_STREAM(pp, bd_addr);
1254   UINT8_TO_STREAM(pp, notif);
1255 
1256   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1257 }
1258 
1259 /**** end of Simple Pairing Commands ****/
1260 
1261 #if (L2CAP_NON_FLUSHABLE_PB_INCLUDED == TRUE)
btsnd_hcic_enhanced_flush(uint16_t handle,uint8_t packet_type)1262 void btsnd_hcic_enhanced_flush(uint16_t handle, uint8_t packet_type) {
1263   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1264   uint8_t* pp = (uint8_t*)(p + 1);
1265 
1266   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENHANCED_FLUSH;
1267   p->offset = 0;
1268   UINT16_TO_STREAM(pp, HCI_ENHANCED_FLUSH);
1269   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENHANCED_FLUSH);
1270 
1271   UINT16_TO_STREAM(pp, handle);
1272   UINT8_TO_STREAM(pp, packet_type);
1273 
1274   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1275 }
1276 #endif
1277 
1278 /*************************
1279  * End of Lisbon Commands
1280  *************************/
1281 
btsnd_hcic_get_link_quality(uint16_t handle)1282 void btsnd_hcic_get_link_quality(uint16_t handle) {
1283   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1284   uint8_t* pp = (uint8_t*)(p + 1);
1285 
1286   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1287   p->offset = 0;
1288 
1289   UINT16_TO_STREAM(pp, HCI_GET_LINK_QUALITY);
1290   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1291 
1292   UINT16_TO_STREAM(pp, handle);
1293 
1294   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1295 }
1296 
btsnd_hcic_read_rssi(uint16_t handle)1297 void btsnd_hcic_read_rssi(uint16_t handle) {
1298   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1299   uint8_t* pp = (uint8_t*)(p + 1);
1300 
1301   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1302   p->offset = 0;
1303 
1304   UINT16_TO_STREAM(pp, HCI_READ_RSSI);
1305   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1306 
1307   UINT16_TO_STREAM(pp, handle);
1308 
1309   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1310 }
1311 
read_encryption_key_size_complete(ReadEncKeySizeCb cb,uint8_t * return_parameters,uint16_t return_parameters_length)1312 static void read_encryption_key_size_complete(ReadEncKeySizeCb cb, uint8_t* return_parameters,
1313                                               uint16_t return_parameters_length) {
1314   uint8_t status;
1315   uint16_t handle;
1316   uint8_t key_size;
1317   STREAM_TO_UINT8(status, return_parameters);
1318   STREAM_TO_UINT16(handle, return_parameters);
1319   STREAM_TO_UINT8(key_size, return_parameters);
1320 
1321   std::move(cb).Run(status, handle, key_size);
1322 }
1323 
btsnd_hcic_read_encryption_key_size(uint16_t handle,ReadEncKeySizeCb cb)1324 void btsnd_hcic_read_encryption_key_size(uint16_t handle, ReadEncKeySizeCb cb) {
1325   constexpr uint8_t len = 2;
1326   uint8_t param[len];
1327   memset(param, 0, len);
1328 
1329   uint8_t* p = param;
1330   UINT16_TO_STREAM(p, handle);
1331 
1332   btu_hcif_send_cmd_with_cb(FROM_HERE, HCI_READ_ENCR_KEY_SIZE, param, len,
1333                             base::Bind(&read_encryption_key_size_complete, base::Passed(&cb)));
1334 }
1335 
btsnd_hcic_read_failed_contact_counter(uint16_t handle)1336 void btsnd_hcic_read_failed_contact_counter(uint16_t handle) {
1337   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1338   uint8_t* pp = (uint8_t*)(p + 1);
1339 
1340   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1341   p->offset = 0;
1342 
1343   UINT16_TO_STREAM(pp, HCI_READ_FAILED_CONTACT_COUNTER);
1344   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1345 
1346   UINT16_TO_STREAM(pp, handle);
1347 
1348   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1349 }
1350 
btsnd_hcic_read_automatic_flush_timeout(uint16_t handle)1351 void btsnd_hcic_read_automatic_flush_timeout(uint16_t handle) {
1352   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1353   uint8_t* pp = (uint8_t*)(p + 1);
1354 
1355   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1356   p->offset = 0;
1357 
1358   UINT16_TO_STREAM(pp, HCI_READ_AUTOMATIC_FLUSH_TIMEOUT);
1359   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1360 
1361   UINT16_TO_STREAM(pp, handle);
1362 
1363   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1364 }
1365 
btsnd_hcic_enable_test_mode(void)1366 void btsnd_hcic_enable_test_mode(void) {
1367   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1368   uint8_t* pp = (uint8_t*)(p + 1);
1369 
1370   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
1371   p->offset = 0;
1372 
1373   UINT16_TO_STREAM(pp, HCI_ENABLE_DEV_UNDER_TEST_MODE);
1374   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
1375 
1376   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1377 }
1378 
btsnd_hcic_write_inqscan_type(uint8_t type)1379 void btsnd_hcic_write_inqscan_type(uint8_t type) {
1380   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1381   uint8_t* pp = (uint8_t*)(p + 1);
1382 
1383   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1384   p->offset = 0;
1385 
1386   UINT16_TO_STREAM(pp, HCI_WRITE_INQSCAN_TYPE);
1387   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1388 
1389   UINT8_TO_STREAM(pp, type);
1390 
1391   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1392 }
1393 
btsnd_hcic_write_inquiry_mode(uint8_t mode)1394 void btsnd_hcic_write_inquiry_mode(uint8_t mode) {
1395   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1396   uint8_t* pp = (uint8_t*)(p + 1);
1397 
1398   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1399   p->offset = 0;
1400 
1401   UINT16_TO_STREAM(pp, HCI_WRITE_INQUIRY_MODE);
1402   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1403 
1404   UINT8_TO_STREAM(pp, mode);
1405 
1406   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1407 }
1408 
btsnd_hcic_write_pagescan_type(uint8_t type)1409 void btsnd_hcic_write_pagescan_type(uint8_t type) {
1410   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1411   uint8_t* pp = (uint8_t*)(p + 1);
1412 
1413   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1414   p->offset = 0;
1415 
1416   UINT16_TO_STREAM(pp, HCI_WRITE_PAGESCAN_TYPE);
1417   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1418 
1419   UINT8_TO_STREAM(pp, type);
1420 
1421   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1422 }
1423 
1424 /* Must have room to store BT_HDR + max VSC length + callback pointer */
1425 #if (HCI_CMD_BUF_SIZE < 268)
1426 #error "HCI_CMD_BUF_SIZE must be larger than 268"
1427 #endif
1428 
btsnd_hcic_vendor_spec_cmd(void * buffer,uint16_t opcode,uint8_t len,uint8_t * p_data,void * p_cmd_cplt_cback)1429 void btsnd_hcic_vendor_spec_cmd(void* buffer, uint16_t opcode, uint8_t len,
1430                                 uint8_t* p_data, void* p_cmd_cplt_cback) {
1431   BT_HDR* p = (BT_HDR*)buffer;
1432   uint8_t* pp = (uint8_t*)(p + 1);
1433 
1434   p->len = HCIC_PREAMBLE_SIZE + len;
1435   p->offset = sizeof(void*);
1436 
1437   *((void**)pp) =
1438       p_cmd_cplt_cback; /* Store command complete callback in buffer */
1439   pp += sizeof(void*);  /* Skip over callback pointer */
1440 
1441   UINT16_TO_STREAM(pp, HCI_GRP_VENDOR_SPECIFIC | opcode);
1442   UINT8_TO_STREAM(pp, len);
1443   ARRAY_TO_STREAM(pp, p_data, len);
1444 
1445   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1446 }
1447