3014   Register dividend = InputRegisterAt(instruction, 0);  in FOR_EACH_CONDITION_INSTRUCTION()  local
3018     __ Add(out, dividend, Operand(dividend, LSR, bits - 1));  in FOR_EACH_CONDITION_INSTRUCTION()
3022     __ Add(temp, dividend, abs_imm - 1);  in FOR_EACH_CONDITION_INSTRUCTION()
3023     __ Cmp(dividend, 0);  in FOR_EACH_CONDITION_INSTRUCTION()
3024     __ Csel(out, temp, dividend, lt);  in FOR_EACH_CONDITION_INSTRUCTION()
3043   Register dividend = InputRegisterAt(instruction, 0);  in GenerateDivRemWithAnyConstant()  local
3060     __ Smulh(temp, dividend, temp);  in GenerateDivRemWithAnyConstant()
3062     __ Smull(temp.X(), dividend, temp);  in GenerateDivRemWithAnyConstant()
3067     __ Add(temp, temp, dividend);  in GenerateDivRemWithAnyConstant()
3069     __ Sub(temp, temp, dividend);  in GenerateDivRemWithAnyConstant()
3083     __ Msub(out, temp, temp_imm, dividend);  in GenerateDivRemWithAnyConstant()
3112     Register dividend = InputRegisterAt(instruction, 0);  in GenerateIntDiv()  local
3114     __ Sdiv(out, dividend, divisor);  in GenerateIntDiv()
5373   Register dividend = InputRegisterAt(instruction, 0);  in GenerateIntRemForPower2Denom()  local
5376     __ Cmp(dividend, 0);  in GenerateIntRemForPower2Denom()
5377     __ And(out, dividend, 1);  in GenerateIntRemForPower2Denom()
5383     __ Negs(temp, dividend);  in GenerateIntRemForPower2Denom()
5384     __ And(out, dividend, abs_imm - 1);  in GenerateIntRemForPower2Denom()
5420     Register dividend = InputRegisterAt(instruction, 0);  in GenerateIntRem()  local
5424     __ Sdiv(temp, dividend, divisor);  in GenerateIntRem()
5425     __ Msub(out, temp, divisor, dividend);  in GenerateIntRem()